JPH0798633A - Information storage medium using system - Google Patents

Abstract

PURPOSE:To provide an information storage medium using system inputting/ outputting data such as picture information and sound information to/from an external system. CONSTITUTION:An information storage medium 2 recording information, an information storage medium reading control part 3 reading information recorded in the information storage medium 2, a picture information processing part 5 processing picture information, a sound information processing part 7 processing sound information, a bus interface part 10 connected with the external system and a central processing part 1 controlling the information storage medium reading control part 3, the picture information processing part 5, the sound information processing part 7 and the bus interface part 10 are provided. Information of the information storage medium 2 is read from the information storage medium reading control part 3 to a local bus 4 by a control of a central processing part 1. When it is picture information, data is transferred to the picture information processing part 5. When it is sound information, it is transferred to the sound information processing part 7. Then, data is transferred to the external system 9 through the bus interface part 10 by a data transfer request from the external system 9.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an information storage medium utilization system that utilizes image information, audio information, etc. stored in an information storage medium, and more particularly to an external system for transmitting image information, audio information, etc. The present invention relates to an information storage medium utilization system for inputting / outputting data.

[0002]

2. Description of the Related Art As an example of a conventional information storage medium utilization system, for example, there is a game machine system utilizing a ROM cartridge and an optical disk memory described in Japanese Patent Laid-Open No. 4-303488.

A game machine system using this ROM cartridge and an optical disk memory uses a processing program such as image processing stored in a semiconductor ROM in the ROM cartridge and a read program to convert the image data and audio data stored in the optical disk memory. It is characterized by being used.

[0004]

In the above-mentioned prior art, no consideration was given to inputting / outputting data such as image information and audio information to / from an external system.

The object of the present invention is to
It is to realize the input and output of data such as image information and audio information.

[0006]

In order to achieve the above object, an information storage medium utilization system of the present invention is an information storage medium on which information is recorded, and an information storage medium for reading information recorded on the information storage medium. A read control unit, an image information processing unit that processes image information recorded in the information storage medium,
A voice information processing unit that processes voice information recorded in an information storage medium, a bus interface unit that is coupled to an external system, an information storage medium read control unit, an image information processing unit, a voice information processing unit, and a bus interface unit are controlled. It is composed of a central processing unit.

[0007]

According to the information storage medium utilization system of the present invention, the information storage medium read control unit mounted with the information storage medium
The information recorded in the information storage medium is read out to the local bus under the control of the central processing unit, and if the information is image information, the data is transferred to the image information processing unit that processes the image information, and the information is transmitted as voice. If it is information, the data is transferred to a voice information processing unit that processes voice information. Then, the data transfer request from the external system is transmitted to the central processing unit via the bus interface unit, and the data required by the external system is transferred to the external system via the bus interface unit under the control of the central processing unit. Transfer to.

[0008]

Embodiments of the present invention will be described below with reference to the drawings.

FIG. 1 is a block diagram for explaining the concept of an information storage medium utilization system according to the present invention. In the following embodiments, an optical disc is assumed as an example of the information storage medium.

The central processing unit 1 reads the information recorded on the optical disc 2 by the optical disc read control unit 3 and judges the content of the information recorded on the optical disc 2.
Then, if the information recorded on the optical disc 2 is image information, the central processing unit 1 transfers the data to the image processing unit 5 via the local bus 4 and displays the processed result on the display 6. If the information recorded on the optical disc 2 is audio information, the data is transferred to the audio processing unit 7 via the local bus 4, and the processed result is output from the speaker 8. The data transfer request from the external system 9 is
Data transmitted to the central processing unit 1 via the bus interface unit 10 and the local bus 4 and controlled by the central processing unit 1 is used to externally transmit data requested by the external system 9 via the local bus 4 and the bus interface unit 10. Data is transferred to the system 9.

FIG. 2 is a block diagram showing a first embodiment of an information storage medium utilization system according to the present invention. However,
The same parts as those in FIG. 1 have the same numbers.

In this embodiment, a compact disc (CD) 11 is used as an optical disc, and an MPEG (Moving Picture Ex) is used as image information and audio information.
The compressed data according to the Pert Group standard is adopted. The connection with the external system is directly connected to the signal bus (host bus) of the external system.

A compact disc (CD) 11 mounted in the CD reading section 12 is a data disc (CD-R).
In the case of an OM disc), the output signal of the CD reading unit 12 is converted into CD-ROM data by the CD-ROM decoder 13 and stored in the CD-ROM work memory 14.

The central processing unit 1 judges the contents of the CD-ROM data, and if the CD-ROM data is image information, the C
Data is transferred from the D-ROM work memory 14 to the MPEG video processing unit 15 via the local bus 4. M
In the PEG video processing unit 15, the data is once MPE
After being stored in the G work memory 16, the MPEG work memory 1
The compressed image data in 6 is decoded into digital video data and displayed on the display 6 via the video reproducing unit 17.

When the CD-ROM data is audio information, the data is transferred from the CD-ROM work memory 14 to the MPEG audio processing section 18 via the local bus 4. The MPEG audio processing unit 18 decodes the compressed audio data into an audio signal, and outputs the audio from the speaker 8 via the audio reproduction unit 19.

The buffer memory 20 is a memory managed by the central processing unit 1, and stores data that cannot be stored in the CD-ROM work memory 14 or temporarily stores the data in the CD-ROM work memory 14. Memory 2
0 and used as a data buffer for data transfer to the MPEG video processing unit 15 and the MPEG audio processing unit 18.

A data transfer request from an external system is reflected on the host bus 21 and transmitted to the central processing unit 1 via the bus interface unit 10 and the local bus 4. The central processing unit 1 transfers the data requested by the external system to the host bus 21 (external system) via the local bus 4 and the bus interface unit 10.

When the compact disc (CD) 11 mounted on the CD reading unit 12 is an audio disc, the central processing unit 1 selects the audio signal input of the audio reproducing unit 19 by the audio switching signal and inputs the CD audio signal. The output signal of the CD reading unit 12 is output to the outside as sound (music) from the speaker 8 via the sound reproducing unit 19. That is, in this case, the information storage medium utilization system of the present invention operates as a general CD audio player.

FIG. 3 is a block diagram showing a second embodiment of the information storage medium utilization system according to the present invention. However,
2 are the same as those in FIG.

In this embodiment, the CD-ROM work memory 14 and the buffer memory 20 are used in common. Effective in reducing the number of parts.

CD-R from CD-ROM decoder 13
After the OM data is stored in the buffer memory 20, C
Error correction (layered ECC) as a D-ROM is performed. This error correction is real time (real time processing)
However, since it may be completed before the data is read from the buffer memory 20, it is possible to delay the start time of error correction in consideration of the priority and processing time of other control processing. I can.

That is, while the CD-ROM data from the CD-ROM decoder 13 is stored in the buffer memory 20, the error correction (layered ECC) as the CD-ROM is time-divisionally performed. This process is performed by the buffer memory 20.
Can be performed until the buffer capacity of is exceeded.

FIG. 4 is a block diagram showing a third embodiment of the information storage medium utilization system according to the present invention. However,
2 are the same as those in FIG.

In this embodiment, the MPEG video processing unit 15
An output signal (digital video data) from the host bus 21 is directly transmitted via the bus interface unit 10.
Transfer data to (external system). This is highly effective for speeding up data transfer when transferring the decoded image data to an external system.

FIG. 5 is a block diagram showing a fourth embodiment of the information storage medium utilization system according to the present invention. However,
2 are the same as those in FIG.

In this embodiment, the CD-ROM decoder 13
Of the data stored in the CD-ROM work memory 14 via the local bus 4 to another block (MP
EG video processing unit 15, MPEG audio processing unit 1
8, or via the bus interface unit 10,
Data is directly transferred to the host bus 21) of the external system.

In this case, the central processing unit 1 is a CD-ROM.
The control of the decoder 13 and the control of a general CD audio player when the compact disc (CD) 11 mounted on the CD reading unit 12 is an audio disc are performed. That is, the processing load on the central processing unit 1 is small, and a central processing unit with low capability can be employed, which is highly effective in reducing the cost.

FIG. 6 is a block diagram showing an embodiment of the bus interface unit 10 in the information storage medium utilization system according to the present invention. However, the same components as those in FIG. 2 have the same numbers.

A data transfer request from the external system is written in the command register 22 as a data transfer request command via the host bus 21. The central processing unit (not shown) reads the content (data transfer request) of the command register 22 via the local bus 4 and determines the content of the data transfer.

When a control parameter is required in association with the data transfer request command, the parameter register 23
Control parameters are exchanged via.

The operation status indicating the operation state in the information storage medium utilization system is transmitted to the host bus 21 (external system) via the status register 24.
There are two types of operation status: hardware status generated by the logic of the circuit and software status managed by the central processing unit by software. Regarding the hardware status, the logic of the circuit automatically generates, so the central processing unit reads the hardware status when the hardware status changes,
Although it is necessary to judge the content, since the same content of the software status is stored in the register in the central processing unit, it is sufficient to write it in the status register 24 only when the software status is changed.

Data required by the external system is transferred from the local bus 4 to the host bus 21 via the data bus matching circuit 25.

The parameter register 23 can be dispensed with if the control parameters necessary for the data transfer request command are provided via the data bus matching circuit 25.

FIG. 7 is a block diagram showing a second embodiment of the bus interface section 10 in the information storage medium utilization system of the present invention. However, the same components as those in FIG. 2 have the same numbers.

The inside of the bus interface section 10 is composed of a plurality of registers as in FIG.

The individual registers will be described below.

The DATAFIFO register 71 includes a local bus (central processing unit) and a host bus (external system) 2.
FIFO (Firstst) used when transferring data to and from
In First Out) register.

The DATASTAT register 72 is the DAT
This is a register for confirming the state of the AFIFO register 71.

The contents are stored in the DATAFIFO register 7
DIR flag indicating data transfer direction of 1 (0: local bus → host bus, 1: host → local bus), DA
A FUL flag (0: not full state, 1: full state) indicating that the data is full in the TAFIFO register 71, and an EMP flag (0: indicating that the data is empty in the DATAFIFO register 71). It is made up of three flags: not empty, 1: empty.

The HIRQREQ register 73 is an interrupt factor register to the host bus (external system) 21.

The contents are the CRPS flag (0: response set not yet, indicating that the response has been set).
1: Response 8 byte set completed), DATAR flag indicating that data transfer preparation is completed (0: Data transfer preparation not completed, 1: Data transfer preparation completed), MPEG flag (0 indicating that MPEG data preparation is completed) : MP
EG data preparation not completed, 1: MPEG data preparation completed),
DRAMS flag (0: data input / stopped, 1: 1 sector set to DRAM complete) indicating that one sector of data has been set in the DRAM which is the buffer memory, CMDOK flag indicating whether command writing is possible (0: Command write prohibited, 1: Command write enabled), BFUL flag indicating that the buffer memory is full (0: buffer memory has space, 1: buffer memory is full), data read for the specified sector is complete. REN indicating that
D flag (0: Data input / stopped, 1: Data of specified sector is stored in DRAM which is buffer memory)
7 flags.

In this register, only "0" can be written and "1" cannot be written. If only the bit to be cleared is written as "0" and the other bits are written as "1", only the relevant bit changes from "1" to "0".

The interrupt output (IRQ signal output) to the host bus (external system) 21 is a logical sum output (OR output) of all interrupt factors. Therefore, it is necessary to clear all the factors to clear the IRQ output. As an actual process of the host bus (external system) 21, when the interrupt factor process is executed, the relevant factor bit is cleared.

The HIRQMSK register 74 is a register for masking the generation of an interrupt to the host bus (external system) 21.

The contents of the HIRQREQ register 73
For the interrupt factor flag of (1), whether the interrupt is enabled or disabled by the interrupt factor flag (0: interrupt mask, 1: interrupt enabled).

When the interrupt is masked (corresponding bit is set to "0"), it is not reflected in the IRQ output when the corresponding interrupt factor occurs. However, since it is reflected in the HIRQREQ register 73, polling processing by software is possible.

The COMMAND register 75 is a register for issuing a command from the host bus (external system) 21 to the local bus (central processing unit).
There are 4 words (8 bytes) up to 3.

COMMAND register 75 (COMMA
The four words of ND0 to 3) have different addresses, and the host bus (external system) 21 uses COMMA.
When a command is written in the ND 3, a command input interrupt is generated in the local bus (central processing unit) 4.
Therefore, when writing a command, COMMAND3 is written last.

The RESPONSE register 76 is a register for response response from the local bus (central processing unit) 4 to the host bus (external system) 21.
There are 4 words (8 bytes) from NSE 0 to 3.

RESPONSE register 76 (RESP
The four words of ONSE0 to 3) have different addresses, and the local bus (central processing unit) 4 has RESP.
When a response is written to ONSE3, a “response 8-byte set complete” interrupt (CRPS of HIRQREQ register 73) is issued to the host bus (external system) 21.
Flag) occurs. Therefore, the response is written so that RESPONSE3 is written last.

COMMAND register 75 and RESPO
The NSE register 76 has the same address (4 words), but is C when the host bus (external system) 21 is writing.
It is written in the OMMAND register 75, and when the host bus (external system) 21 reads it, the value of the RESPONSE register 76 is read.

The MPEG register 77 stores the decoded MP
Host bus (external system) for EG data (RGB video data, PCM audio data, user data) 2
This is a register for transferring to 1.

The external system issues a command to the central processing unit via the host bus 21, the bus interface unit 10 and the local bus 4.

The command relating to the data transfer between the external system and the central processing unit is DAT_EN for notifying the central processing unit of the completion or termination of the data transfer currently being performed.
D command, notifying the central processing unit of the temporary suspension of the current data transfer DAT_PAUSE command, notifying the central processing unit of the resumption of the suspended data transfer D
Three commands, AT_CONT command, are prepared.

The external system must always set D at the end of data transfer.
Issue the AT_END command. In this case, the contents of the various data transfer registers managed by the central processing unit are invalidated. As a response, the number of data transfers is returned.

When the external system side issues the DAT_PAUSE command to suspend the data transfer, the contents of the various data transfer registers managed by the central processing unit side are saved.

After executing the DAT_PAUSE command, the external system side must issue either a DAT_END command (stop data transfer) or a DAT_CONT command (resume data transfer).

The DAT_CONT command is DAT_P
Only after the AUSE command (temporary stop of data transfer) is performed, this command is accepted, and the process of restarting the data transfer is performed according to the settings of the various data transfer registers that have been saved.

When the number of data transfers on the external system side and the number of data transfers on the central processing unit side do not match, or when one of them is reset for some reason, the WAIT signal (signal for stopping the processing of the external system) is output to the host bus. May occur,
DMA (Direct Memory) on the central processing unit side
Access) processing may be suspended.

In order to avoid this state, the following processing is performed in this embodiment.

(1) The number of data transfers on the side of the central processing unit (local bus 4) is the external system (host bus 21)
When the number of data transfers is larger than the number of data transfers on the side, the central processing unit side is in a state where the burst mode DMA is suspended, so that the CPU cycle can be executed, and therefore the command receiving process from the external system side can be performed. The external system side issues a data transfer related command to control the DMA on the central processing unit side.

When the external system side determines that the data transfer is completed, it issues the DAT_END command. The external system side must be DAT after the data transfer is completed.
Issue the _END command.

The central processing unit side resets the register related to the DMA even if the data transfer is not completed.

(2) The number of data transfers on the side of the central processing unit (local bus 4) is the external system (host bus 21)
If it is less than the number of data transfers on the side,
Although the data transfer is completed, a WAIT signal is generated on the external system side for data read / write.

In this case, depending on the hardware, the WAIT
Cancels the signal and transfers dummy data to the external system. Actually, data is not transmitted or received.

(3) When the external system side resets during data transfer The external system side soft resets the central processing unit side at the time of reset start. The central processing unit side clears the DMA register.

(4) When the central processing unit side is reset during data transfer The same procedure as (2) above is performed.

By performing these processes, it is possible to prevent hang-up of data transfer.

FIGS. 8, 9 and 10 show the case where the register of the bus interface unit 10 in FIG. 7 is used.
It is a flow chart which shows a concrete procedure.

FIG. 8 is a control flow on the side of the central processing unit (local bus 4), and FIGS. 9 and 10 are control flows on the side of the external system (host bus 21).

The control flow on the side of the central processing unit (local bus 4) will be described below.

Issuing commands and receiving responses
Follow the procedure below.

(Step 801) The start phase of interrupt processing is executed.

(Step 802) Investigate the cause of interruption,
Identifies an interrupt due to command input.

(Step 803) The registers used in this processing routine are saved.

(Step 804) Command 4 words to C
It is read from the OMMAND register 75 (COMMAND0 to 3).

(Step 805) The identification code of the command is judged, the response corresponding to the command is set, and the RESPONSE register 76 (RESPONSE) is set.
Write the set response in 4 words in 0-3).

At this point, the host bus (external system)
C indicating that the response in the HIRQREQ register 73, which is the interrupt factor register for the No. 21 is set
The RPS flag (0: response set not set, 1: response 8 byte set completed) is set to "1" by hardware.
Is set to.

(Step 806) HIRQR which is an interrupt factor register to the host bus (external system) 21
CMD in the EQ register 73 indicating whether or not a command can be written
"1" is set to the OK flag (0: command writing prohibited, 1: command writing permitted).

(Step 807) If there is no need for data transfer, the procedure moves to Step 811, and if there is a need for data transfer, the procedure moves to Step 808.

(Step 808) DMA setting such as transfer start address and transfer number, DATAFIFO register 7
Preparations for data transfer such as setting of a DIR flag (0: local bus → host bus, 1: host → local bus) indicating the data transfer direction of 1 are made.

(Step 809) HIRQR which is an interrupt factor register to the host bus (external system) 21
A DATAR flag (0: data transfer preparation not completed, indicating that data transfer preparation is completed) in the EQ register 73
1: Data transfer ready) is set to "1".

(Step 810) Permit execution of DMA and execute data transfer.

(Step 811) The saved registers are restored.

(Step 812) The termination phase of interrupt processing is executed.

In the central processing unit, during command reception processing,
Dedicated to command reception processing from the host bus (external system) 21. However, the central processing unit performs DMA to MPEG or the like.
During the data transfer by, the command receiving process of the central processing unit is interrupted, so the receiving process is delayed.

Whether or not the host has read the response data is not confirmed. Therefore, when the host issues the next command without reading the response data, the response data for the command is overwritten.

The control flow on the external system (host bus 21) side will be described below.

(Step 901) The start phase is executed.

(Step 902) HIRQR which is an interrupt factor register to the host bus (external system) 21
CMD in the EQ register 73 indicating whether or not a command can be written
Wait for the OK flag (0: command write prohibited, 1: command write permitted) to be set to "1".

(Step 903) After confirming that the CMDOK flag is set to "1", "0" is set to this CMDOK flag.

(Step 904) A command is set in the COMMAND register 75 (COMMAND0 to 3).

At this point, a command setting interrupt is generated on the local bus 4 side.

(Step 905) Initialize a timer for performing the timeout process.

(Step 906) HIRQR which is an interrupt factor register to the host bus (external system) 21
A CRPS flag (0: response set not yet, 1: in the EQ register 73) indicating that a response has been set.
Wait for the response 8 bytes to be set) to be set to "1" while monitoring the timer.

(Step 907) It is judged whether or not the set timer has timed out.

(Step 908) If the timer set has timed out, a communication error is set,
Control goes to step 909.

(Step 909) This is the step of connecting FIG. 9 and FIG. 10, and the process proceeds to step 922.

(Step 910) After confirming that the CRPS flag is set to "1", "0" is set to this CRPS flag.

(Step 911) The set response is read from the RESPONSE register 76 (RESPONSE0 to 3).

(Step 912) This is a connecting step between FIG. 9 and FIG. 10, and the process proceeds to step 913.

(Step 913) If there is no need for data transfer, then the procedure advances to Step 922, and if there is a need for data transfer, then the procedure advances to Step 914.

(Step 914) Initialize a timer for time-out processing.

(Step 915) HIRQR which is an interrupt factor register to the host bus (external system) 21
A DATAR flag (0: data transfer preparation not completed, indicating that data transfer preparation is completed) in the EQ register 73
1: Waiting for data transfer preparation) to be set to "1" while monitoring the timer.

(Step 916) It is judged whether or not the set timer has timed out.

(Step 917) If the set timer is timed out, a data transfer time-out error is set, and the process proceeds to step 922.

(Step 918) After confirming that the DATAR flag is set to "1", "0" is set to this DATAR flag.

(Step 919) DATASTA which is a register for checking the state of the DATAFIFO register 71.
The DIR flag (0: local bus → host bus, 1: host → local bus) in the T register 72 indicating the data transfer direction of the DATAFIFO register 71 is identified.

(Step 920) The DIR flag is "0".
In the case of, since the data transfer is from the local bus 4 to the host bus 21, the external system executes the data read process.

(Step 921) The DIR flag is "1".
In the case of, since the data transfer is from the host bus 21 to the local bus 4, the external system executes the data write process.

(Step 922) The end phase is executed.

In the description of FIGS. 8, 9 and 10, HIRQ is used.
A CRPS flag indicating that the response in the REQ register 73 has been set (0: response set not yet,
1: Response 8 bytes set), and the command and response were exchanged using the CMDOK flag (0: Command write prohibited, 1: Command write enabled) indicating whether command writing is possible. The CRPS flag and the CMDOK flag can be made common and one flag can be used in common.

The specific procedure will be described below.

Here, it is assumed that the CRPS flag and the CMDOK flag are deleted and the COMOK flag is newly provided.

On the side of the central processing unit (local bus 4), CO
The MOK flag is set to "1" to inform the external system (host bus 21) side that the command can be accepted.

The external system (host bus 21) side is C
After confirming that the OMOK flag is "1", COMO
The K flag is set to "0". And the command is CO
It is set in the MMAND register 75 (COMMAND 0 to 3).

On the central processing unit (local bus 4) side, the command is COMMAND register 75 (COMMAND0).
~ After confirming that it was set to 3), RES the response
Set in the PONSE register 76 (RESPONSE0 to 3). Then, the COMOK flag is set to "1".

The external system (host bus 21) side is C
After confirming that the OMOK flag is "1", the response is returned to the RESPONSE register 76 (RESPONSE
0-3).

By the above procedure, the exchange of the command and the response can be realized by one flag.

FIG. 11 is an explanatory diagram for explaining the data format of one sector in the CD-ROM disc.

FIG. 11A shows the data format of one sector in mode 2 form 2 of a general CD-ROM disc. 1 sector 2352 bytes, sync signal part 12 bytes, header part 4 bytes, sub-header part 8 bytes, data part 2324 bytes, EDC
The (Error Detection Code) section is composed of 4 bytes. The 4-byte EDC portion may be 4-byte 0 data.

FIG. 11 (b) is a diagram showing the contents of the data portion 2324 bytes for storing the MPEG video data. It is composed of a header part composed of an MPEG header part and a video header part, and a video data part.

FIG. 11C is a diagram showing the contents of the data portion 2324 bytes for storing the MPEG audio data. It is composed of a header section composed of an MPEG header section and an audio header section, and an audio data section.

FIG. 11 (d) is a diagram showing the contents of the data portion 2324 bytes for storing the MPEG user data. It is composed of a header section composed of an MPEG header section and a user data header section, and a user data section.

M recorded on a CD-ROM disc
The PEG video data sector, MPEG audio data sector, and MPEG user data sector are identified by their respective header parts (video header part, audio header part,
This is done by judging the user data header section).

FIG. 12 shows an MPEG video data sector (V), MPEG recorded on a CD-ROM disc.
It is a figure showing an example of physical arrangement of an audio data sector (A) and an MPEG user data sector (D).

The MPEG video data is compressed moving picture data, and the decoded video data depends on the data compression rate, but is equivalent to one sector of the interleaved MPEG audio data sector (A) and MPEG user data sector (D). (13 ms at standard speed, about 6.7 ms at double speed) is sufficiently complemented, and the decoded video data is displayed as a moving image on the display every 1/30 second.

The MPEG audio data is audio compression data, and the data for one sector of the MPEG audio data sector (A) varies depending on the data compression rate, but in the example of FIG. 8, it corresponds to 5 to 6 sectors of the CD-ROM sector. Time (standard speed is about 67ms to 80ms, double speed is about 63ms to 4ms)
0ms) Output as continuous sound from the speaker.

MPEG user data is compressed user data, and by using this compressed data, the equivalent data transfer rate can be increased by the data compression rate. In addition, the utilization efficiency of the CD-ROM disc can be improved.

FIG. 13 is an explanatory diagram for explaining the state of data transfer on the time axis of the local bus (data bus width is 16 bits). T means the operation clock cycle time of the central processing unit. In this embodiment, 1T = 62.
It is 5 ns (operating clock frequency = 16 MHz). Here, in the embodiment of FIG. 2, CPU occupation, DRAM
It is assumed that refresh, MPEG video data transfer, MPEG audio data transfer, CD-ROM data transfer, and data transfer with the host are all performed, and the local bus is most crowded on the time axis.

The buffer memory used in the embodiment of FIG. 2 is a DRAM (Dynamic Random Acc).
ess Memory), so a refresh operation is required. The cycle of refresh operation is about 1
Once every 5.6 μs. This time corresponds to a time of about 250T. In this embodiment, the CPU occupation period (3T
× 5 times), DRAM refresh period (3T), MPE
A value of 202T (250T-48T) or less in consideration of the G video data transfer period (6T), the MPEG audio data transfer period (6T), the CD-ROM data transfer period (6T), and the data transfer period with the host (12T). Is set to the time of the repeating cycle for performing the refresh operation.

The data transfer cycle of the MPEG audio data is once every about 60 μs (2 bytes = 16 bits of data is transferred).

The average data transfer cycle of MPEG video data is once (about 2 bytes = 16 bits of data transfer) about every 5.6 μs in the case of double speed data transfer.

The average data transfer cycle of the CD-ROM data is the same as the average data transfer cycle of the MPEG video data in the case of double speed data transfer, and once every about 5.6 μs (data transfer of 2 bytes = 16 bits). Is done).

The maximum data transfer cycle with the host is 937.5 ns (15
T) or more. The host bus is assumed to have a data bus width of 32 bits.

FIG. 14 is an explanatory view for explaining the priority order of each period in FIG.

Since the DRAM refresh operation cannot be delayed, the priority is set to the highest. In principle, if the work memory is owned and the maximum time delay of 48T can be tolerated, it is not necessary to pay attention to the priority order.

In the above embodiments, an optical disc is assumed, but it goes without saying that any medium can be used as long as it can store information, not limited to an optical disc.

Further, although the image processing unit and the voice processing unit are incorporated in the information storage medium utilizing system, they may be incorporated in the external system side if the data transfer is sufficiently high speed.

[0140]

According to the information storage medium utilization system of the present invention, it is possible to realize input / output of data such as image information and audio information with respect to an external system.

[Brief description of drawings]

FIG. 1 is a block diagram illustrating the concept of an information storage medium utilization system according to the present invention.

FIG. 2 is a block diagram showing a first embodiment of an information storage medium utilization system according to the present invention.

FIG. 3 is a block diagram showing a second embodiment of the information storage medium utilization system according to the present invention.

FIG. 4 is a block diagram showing a third embodiment of the information storage medium utilization system according to the present invention.

FIG. 5 is a block diagram showing a fourth embodiment of the information storage medium utilization system according to the present invention.

FIG. 6 is a block diagram showing an embodiment of a bus interface unit 10 in the information storage medium utilization system according to the present invention.

FIG. 7 is a block diagram showing a second embodiment of the bus interface unit 10 in the information storage medium utilization system of the present invention.

8 is a flowchart showing a specific procedure on the side of the central processing unit (local bus 4) when using the register of the bus interface unit 10 in FIG.

9 is a diagram illustrating an external system (host bus 2 when using the register of the bus interface unit 10 in FIG. 7).
It is a first half flow chart which shows the concrete procedure of 1) side.

10 is a latter half flow chart showing a specific procedure on the external system (host bus 21) side when using the register of the bus interface unit 10 in FIG. 7. FIG.

FIG. 11 is an explanatory diagram illustrating a data format of one sector in a CD-ROM disc.

FIG. 12: MP recorded on a CD-ROM disc
EG video data sector (V), MPEG audio data sector (A), MPEG user data sector (D)
It is an explanatory view explaining an example of a physical arrangement of.

FIG. 13: Local bus (data bus width is 16 bits)
FIG. 6 is an explanatory diagram illustrating a state of data transfer on the time axis of FIG.

14 is an explanatory diagram illustrating a priority order of each period in FIG. 13. FIG.

[Explanation of symbols]

DESCRIPTION OF SYMBOLS 1 ... Central processing part, 2 ... Optical disk, 3 ... Optical disk read-out control part, 4 ... Local bus, 5 ... Image processing part, 6 ...
Display, 7 ... Voice processing unit, 8 ... Speaker 9, External system, 10 ... Bus interface unit, 11 ... Compact disc (CD), 12 ... CD reading unit, 13
... CD-ROM decoder, 14 ... CD-ROM work memory, 15 ... MPEG video processing section, 16 ... MPEG work memory, 17 ... Video playback section, 18 ... MPEG audio processing section, 19 ... Audio playback section, 20 ... Buffer memory , 21 ... Host bus, 22 ... Command register, 23
... Parameter register, 24 ... Status register, 2
5 ... Data bus matching circuit.

Front Page Continuation (72) Inventor Yoshinobu Imada 292 Yoshida-cho, Totsuka-ku, Yokohama-shi, Kanagawa Stock Information Media Division, Hitachi, Ltd.

Claims (15)

[Claims] 1. An information storage medium on which information is recorded, an information storage medium read control unit for reading out the information recorded on the information storage medium, and image information for processing image information recorded on the information storage medium. From a processing unit, an audio information processing unit that processes audio information recorded in the information storage medium, and a central processing unit that controls the information storage medium read control unit, the image information processing unit, and the audio information processing unit. In this information storage medium utilization system, a bus interface unit that is connected to an external system under the control of the central processing unit is added, and information such as the image information and the audio information is transmitted to the external system via the bus interface unit. An information storage medium utilization system characterized by being capable of inputting and outputting by means of the following. 2. The information storage medium use system according to claim 1, wherein the information storage medium is an optical disk. 3. The information storage medium use system according to claim 2, wherein the optical disc is a CD-ROM disc. 4. The information storage medium use system according to claim 1, further comprising a storage unit managed by the central processing unit. 5. The information storage medium use system according to claim 3, wherein a CD-ROM decoder section is added. 6. The information storage medium utilization system according to claim 5, wherein the CD-ROM decoder section has a CD.
An information storage medium utilization system characterized in that a work memory dedicated to a ROM decoder is added. 7. The information storage medium utilization system according to claim 6, wherein the storage unit managed by the central processing unit, which is a constituent element according to any one of claims 4 to 6, and the CD-R.
An information storage medium utilization system characterized in that the work memory dedicated to the OM decoder is the same memory. 8. The information storage medium utilizing system according to claim 1, wherein the image information and the audio information are MPEG (Moving Picture E).
The information storage medium utilization system is characterized in that it is compressed data according to the xpert group standard. 9. The information storage medium use system according to claim 8, wherein an MPEG work memory dedicated to MPEG image information processing is added to the image information processing unit. 10. The information storage medium utilization system according to claim 9, wherein a storage unit managed by the central processing unit, which is a component according to any one of claims 4 to 9, and the MPE.
An information storage medium utilization system characterized in that an MPEG work memory dedicated to G image information processing is the same memory. 11. The information storage medium utilization system according to claim 8, wherein the output data after MPEG decoding from the image information processing unit is connected to an external system under the control of the central processing unit. An information storage medium utilization system characterized by being capable of being output to an external system via a section. 12. The information storage medium use system according to claim 1, wherein the information storage medium use system is controlled by a command instruction from the external system. system. 13. The information storage medium use system according to claim 12, wherein the information storage medium use system responds with a response to a command instruction from the external system. Media utilization system. 14. The information storage medium utilization system according to claim 1, wherein the number of data transfers to the external system managed by the central processing unit is less than the number of data transfers managed by the external system. An information storage medium utilization system, characterized in that the number of data transfers is matched to the external system by dummy data. 15. The information storage medium use system according to any one of claims 1 to 14, wherein the data transfer register of the bus interface unit comprises a FIFO.