JPH0789742B2 - Power converter - Google Patents

Power converter

Info

Publication number
JPH0789742B2
JPH0789742B2 JP62033534A JP3353487A JPH0789742B2 JP H0789742 B2 JPH0789742 B2 JP H0789742B2 JP 62033534 A JP62033534 A JP 62033534A JP 3353487 A JP3353487 A JP 3353487A JP H0789742 B2 JPH0789742 B2 JP H0789742B2
Authority
JP
Japan
Prior art keywords
phase
current
positive
negative
power supply
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
JP62033534A
Other languages
Japanese (ja)
Other versions
JPS63202271A (en
Inventor
健明 朝枝
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Mitsubishi Electric Corp
Original Assignee
Mitsubishi Electric Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Mitsubishi Electric Corp filed Critical Mitsubishi Electric Corp
Priority to JP62033534A priority Critical patent/JPH0789742B2/en
Publication of JPS63202271A publication Critical patent/JPS63202271A/en
Publication of JPH0789742B2 publication Critical patent/JPH0789742B2/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Description

【発明の詳細な説明】 〔産業上の利用分野〕 この発明は3相の交流電力を直流電力に変換する電力変
換装置に関するものである。
TECHNICAL FIELD The present invention relates to a power converter that converts three-phase AC power into DC power.

〔従来の技術〕[Conventional technology]

第9図は例えば昭和61年度電気学会全国大会講演論文集
(574ページ)に示された従来の電力変換装置の原理を
示す回路構成図である。図において1はダイオード整流
器で、単相ブリッジ回路により構成され、交流側はリア
クトル2を介して商用交流電源ACに接続されている。3
は直流スイッチであって上記ダイオード整流器1の直流
側に並列接続されている。4はダイオードで、上記ダイ
オード整流器1の正側の出力端(P)にアノード側が接
続されている。5はコンデンサで前記ダイオード4のカ
ソード側と上記ダイオード整流器1の負側の出力端
(N)に接続されている。6は負荷であって上記コンデ
ンサ5に並列に接続されている。
FIG. 9 is a circuit configuration diagram showing the principle of a conventional power conversion device shown in, for example, the 1986 National Conference of the Institute of Electrical Engineers of Japan (Page 574). In the figure, 1 is a diode rectifier, which is configured by a single-phase bridge circuit, and the AC side is connected to a commercial AC power source AC via a reactor 2. Three
Is a DC switch and is connected in parallel to the DC side of the diode rectifier 1. Reference numeral 4 denotes a diode, the anode side of which is connected to the positive output terminal (P) of the diode rectifier 1. A capacitor 5 is connected to the cathode side of the diode 4 and the negative output terminal (N) of the diode rectifier 1. A load 6 is connected in parallel to the capacitor 5.

次に動作は第10図の動作波形図にもとづき説明する。ま
ず、第9図に示した従来例は単相交流電力を直列電力に
変換する場合を示しており、直流スイッチ3を高周波ス
イッチング動作でオンオフさせ、交流電源に流れる電流
を正弦波状に波形制御するとともに力率をほぼ1に近く
制御するものである。ここで直流スイッチ3としては自
己消弧型スイッチング素子、例えば、トランジスタ,ゲ
ートターンオフサイリスタ,MOSFETなどが一般に用いら
れており、数KHzから数10KHzのスイッチング周波数でオ
ン−オフ制御される。また、第10図において、交流電源
電流Iacは交流電源電圧Vacと同相で、かつ大きさは入出
力間の電力の平衡条件より の関係に従って制御される。ここで交流電源電圧Vcはコ
ンデンサ5の平均直流電圧、ILは負荷6の平均直流電流
を示す。直流電流IPは交流電源電圧Vacの正の半サイク
ル期間(t1〜t2)ではダイオード整流器1のアーム素子
D1,D4を介して流れ、また負の半サイクル期間(t2
t3)ではアーム素子D2,D3を介して流れるため、交流電
流Iacの全波整流波形になる。また、期間t4〜t6は直流
スイッチ3のスイッチング周期を示し、このスイッチ動
作波形の一部をISWでIDで示している。ここでISWは直流
スイッチ3の電流波形,IDはダイオード4の電流波形で
ある。時刻t4〜t5の期間、直流スイッチ3をオンすれ
ば、直流スイッチ3の電流ISWはリアクトル2、ダイオ
ード整流器D1,D4を介して流れ、リアクトル2にエネル
ギーが蓄積される。次に時刻t5〜t6期間、直流スイッチ
3をオフすれば、リアクトル2のエネルギーはダイオー
ド4を介してコンデンサ5に放出される。従ってコンデ
ンサ5の電圧は交流電源電圧Vacよりも常に大きい電圧
レベルに保持される。
Next, the operation will be described based on the operation waveform chart of FIG. First, the conventional example shown in FIG. 9 shows a case where single-phase AC power is converted into series power. The DC switch 3 is turned on / off by a high-frequency switching operation, and the current flowing in the AC power supply is waveform-controlled in a sinusoidal waveform. At the same time, the power factor is controlled to be close to 1. Here, as the DC switch 3, a self-extinguishing type switching element, for example, a transistor, a gate turn-off thyristor, a MOSFET, etc. is generally used, and on / off control is performed at a switching frequency of several KHz to several tens KHz. In addition, in FIG. 10, the AC power supply current I ac is in phase with the AC power supply voltage V ac , and its magnitude depends on the equilibrium condition of power between the input and output. Controlled according to the relationship. Here the AC power supply voltage V c is the average DC voltage of the capacitor 5, the I L indicates the average DC current of the load 6. The direct current I P is the arm element of the diode rectifier 1 during the positive half cycle period (t 1 to t 2 ) of the AC power supply voltage V ac.
Flow through D 1 , D 4 and also negative half cycle period (t 2 ~
At t 3 ), since it flows through the arm elements D 2 and D 3 , the full-wave rectified waveform of the alternating current I ac is obtained. Further, the periods t 4 to t 6 show the switching cycle of the DC switch 3, and a part of the switch operation waveform is shown by I SW and I D. Here, I SW is the current waveform of the DC switch 3, and I D is the current waveform of the diode 4. When the DC switch 3 is turned on during the period from time t 4 to t 5 , the current I SW of the DC switch 3 flows through the reactor 2 and the diode rectifiers D 1 and D 4 , and energy is stored in the reactor 2. Next time t 5 ~t 6 period, if off the DC switch 3, the energy of the reactor 2 is discharged to the capacitor 5 through the diode 4. Therefore, the voltage of the capacitor 5 is always kept at a voltage level higher than the AC power supply voltage V ac .

なお、リアクトル2はダイオード整流器1の出力端と直
流スイッチ3の間に挿入しても同様の昇圧チョッパの動
作を行う。
Even if the reactor 2 is inserted between the output end of the diode rectifier 1 and the DC switch 3, the same operation of the boost chopper is performed.

〔発明が解決しようとする問題点〕[Problems to be solved by the invention]

従来の電力変換装置は以上のように構成されているの
で、ダイオード整流器を介して昇圧チョッパ動作を行う
各アーム素子の通流期間は180゜であり、交流電流を正
弦波状に制御することになる。しかしこれを3相交流電
源に適用する場合には単にダイオード整流器を3相ブリ
ッジ構成にしただけでは各アームの通流期間が120゜と
なり、交流電流を正弦波状に制御できず、5次,7次等の
低次数の高調波成分が多く含まれる等の問題点があっ
た。
Since the conventional power conversion device is configured as described above, the conduction period of each arm element that performs the step-up chopper operation via the diode rectifier is 180 °, and the alternating current is controlled in a sinusoidal shape. . However, when this is applied to a three-phase AC power supply, if the diode rectifier is simply a three-phase bridge structure, the conduction period of each arm will be 120 °, and the AC current cannot be controlled in a sinusoidal manner. There has been a problem that many low-order harmonic components such as the order are included.

この発明は上記のような問題点を解消するためになされ
たもので、交流電流を正弦波状に制御できるとともに電
源の力率を略1に制御することのできる3相交流の電力
変換装置を得ることを目的とする。
The present invention has been made to solve the above problems, and provides a three-phase AC power converter capable of controlling an alternating current in a sine wave shape and controlling a power factor of a power source to approximately 1. The purpose is to

〔問題点を解決するための手段〕[Means for solving problems]

この発明に係る電力変換装置は、3相ブリッジ構成のダ
イオード整流器の直流出力側に2段にカスケード接続さ
れた昇圧チョッパを並列接続するとともに、この昇圧チ
ョッパの中間点と3相交流電源間に両方向通電形の3相
交流スイッチを設け、各々の昇圧チョッパは対応する極
性の3相半波整流の電圧波形と相似な電流波形の電流を
流すようにそれぞれ制御され、それぞれの昇圧チョッパ
の入力電流の差分を3相交流スイッチを介して3相交流
電源に流すようにして電力変換装置の主回路部とし、上
記昇圧チョッパの出力電圧の電圧制御器と交流電源電流
の電流制御器とを設けたものである。
In the power converter according to the present invention, a step-up chopper cascade-connected in two stages is connected in parallel to the DC output side of a diode rectifier having a three-phase bridge configuration, and a bidirectional connection is provided between an intermediate point of the step-up chopper and a three-phase AC power source. An energization type three-phase AC switch is provided, and each step-up chopper is controlled so as to flow a current having a current waveform similar to the voltage waveform of the corresponding three-phase half-wave rectification, and the input current of each step-up chopper is changed. A main circuit section of the power converter in which the difference is passed through a three-phase AC power supply through a three-phase AC switch, and a voltage controller for the output voltage of the boost chopper and a current controller for the AC power supply current are provided. Is.

〔作 用〕[Work]

この発明における電力変換装置は電圧制御器の出力信号
と負荷電流値とから交流電源電流基準を演算し、さらに
この交流電源電流基準から正負群両昇圧チョッパの電流
基準を演算してこの両昇圧チョッパにより互いに位相が
180゜ずれた3相半波整流波形状にダイオード整流器の
P側及びN側の出力電流を電流制御器により波形制御し
て、P側及びN側の直流電流の差分を3相交流スイッチ
を介して交流電源へ流すように制御する。
The power converter according to the present invention calculates an AC power supply current reference from the output signal of the voltage controller and the load current value, and further calculates a current reference of the positive and negative group both step-up choppers from this AC power supply current reference to obtain both the step-up choppers. Are in phase with each other
Waveform control of P-side and N-side output currents of the diode rectifier by a current controller in a three-phase half-wave rectified wave form shifted by 180 °, and the difference between the P-side and N-side DC currents is passed through a 3-phase AC switch. Control to flow to AC power.

〔実施例〕〔Example〕

以下、この発明の一実施例を図について説明する。図中
第9図と同一の部分は同一の符号をもって図示した第1
図において、10は3相ブリッジ接続されたダイオード整
流器で、その交流端は3相交流電源(eu,ev,ew)に接続
されている。2P,2Nはこのダイオード整流器10の正側出
力端(P)及び負側出力端(N)に各々接続されたリア
クトル、3P,3Nはこのリアクトル2P,2Nの両端間に直列接
続された昇圧チョッパ8P,8Nの直流スイッチ、4P,4Nは各
々上記リアクトル2Pと直流スイッチ3Pの接続点及び上記
リアクトル2Nと直流スイッチ3Nの接続点に、上記ダイオ
ード整流器10の直流電路に対して順方向に接続されたダ
イオード、5P,5Nはこの両ダイオード4P,4Nの出力端間に
直列接続されたコンデンサで、このコンデンサ5P,5Nの
中間接続点は上記直流スイッチ3P,3Nの中間接続点に接
続される。6はこの両コンデンサ5P,5Nの両端に接続さ
れた負荷、7は3相交流スイッチであって上記昇圧チョ
ッパ8P,8Nの直流スイッチ3P,3Nの中間接続点と上記3相
交流電源(eu,ev,ew)間に接続される。
An embodiment of the present invention will be described below with reference to the drawings. In the figure, the same parts as in FIG.
In the figure, 10 is a diode rectifier connected in a three-phase bridge, and its AC end is connected to a three-phase AC power supply ( eu , ev , ew ). 2P and 2N are reactors respectively connected to the positive output terminal (P) and the negative output terminal (N) of the diode rectifier 10, and 3P and 3N are boost choppers connected in series between both ends of the reactors 2P and 2N. 8P, 8N DC switch, 4P, 4N are respectively connected to the connection point of the reactor 2P and the DC switch 3P and the connection point of the reactor 2N and the DC switch 3N, in the forward direction with respect to the DC circuit of the diode rectifier 10. The diodes 5P and 5N are capacitors connected in series between the output terminals of the diodes 4P and 4N, and the intermediate connection point of the capacitors 5P and 5N is connected to the intermediate connection point of the DC switches 3P and 3N. 6 is a load connected to both ends of both capacitors 5P and 5N, and 7 is a three-phase AC switch, which is an intermediate connection point between the DC switches 3P and 3N of the step-up choppers 8P and 8N and the three-phase AC power supply (e u , ev , ew )).

次に第2図に示す動作波形図を参照して動作について説
明する。図においてeu,ev,ewは3相交流電源(eu,ev,
ew)の相電圧波形を示す。IPはリアクトル2Pの電流波形
を示し、リアクトル2Pと直流スイッチ3Pとダイオード4P
とで構成される正群の昇圧チョッパ8Pによって、3相交
流電源(eu,ev,ew)の正極性の3相半波整流の電圧波形
と相似な電流波形に制御される。INはリアクトル2Nの電
流波形を示し、リアクトル2Nと直流スイッチ3Nとダイオ
ード4Nとで構成される負群の昇圧チョッパ8Nによって、
3相交流電源(eu,ev,ew)の負極性の3相半波整流の電
圧波形と相似な電流波形に制御される。ここでリアクト
ル2P及び2Nの電流波形IP及びINには実際上、各々正群及
び負群の昇圧チョッパ8P,8Nのスイッチング周波数成分
の電流リップル成分が重畳されているが、簡単のため第
2図では省略して示している。IOは3相交流スイッチ7
の電流波形を示しIO=IP−INとなる。ここでIP,INは互
いに180゜位相差の電源周波数acの3倍の周波数のリ
ップル分を有し、大きさは同一であるため、前記IOは3
acの交流波形になる。IP,INのリップル分を無視した
ときのピーク値を とすれば3相交流スイッチ7の電流波形IOのピーク値は となる。Iu,Iv,Iwは交流電源の電流波形を示す。Iuはu
相電流であり、時刻t1〜t2の期間は3相交流スイッチ7
のアーム素子Suをオンすることにより電流IOを流し、時
刻t2〜t4の期間はダイオード整流器10のアーム素子Du
よって電流IPを流し、時刻t4〜t5の期間は再び3相交流
スイッチ7のアーム素子Suをオンして電流IOを流し、時
刻t5〜t7の期間はダイオード整流器10のアーム素子DX
よって電流INを流し正弦波状の交流電流波形を得ること
ができる。ここで3相交流スイッチ7がない場合には、
ダイオード整流器10によってのみしか交流電流Iuを流す
ことができないため、正弦波電流は得られないことが分
る。v相の交流電流Ivはu相の交流電流Iuに対して120
゜の位相遅れの波形であり、同様にしてダイオード整流
器10のアーム素子Dv及びDyと3相交流スイッチ7のアー
ム素子Svによって正弦波状の波形が得られる。w相の交
流電流Iwはu相の交流電流Iuに対して240゜の位相遅れ
の波形であり、同様にしてダイオード整流器10のアーム
素子Dw及びDzと3相交流スイッチ7のアーム素子Swによ
って正弦波状の波形が得られる。なお、ダイオード整流
器10の各アーム素子(Du,Dv,Dw,Dx,Dy,Dz)の転流は通
常のダイオード整流器の動作と同様に交流電源の電圧
(eu,ev,ew)によって行なわれるが、3相交流スイッチ
7の各アーム素子(Su,Sv,Sw)の転流は強制的に行なわ
れなければならない。例えば、時刻t5においてスイッチ
SuからスイッチSwへの転流を考えるとこの時刻ではeu
ewであるため電源転流は行えない。他の転流タイミング
でも同様であり、各相電圧のクロス点で転流しなければ
ならないため電源転流は行えない。時刻t1〜t7は交流電
源の1周期を6等分したものに相当し、各交流スイッチ
(Su,Sv,Sw)は60゜間づつ導通される。ダイオード整流
器10の各アーム素子(Du,Dv,Dw,Dx,Dy,Dz)は通常のダ
イオード整流器と同様に120゜づつ導通するため、この
ダイオード整流器10のアーム素子の導通の休止期間中は
各交流スイッチ(Su,Sv,Sw)によって交流電流を流せば
よい。
Next, the operation will be described with reference to the operation waveform diagram shown in FIG. In the figure, eu , ev , ew are three-phase AC power supplies ( eu , ev ,
e w ) shows the phase voltage waveform. I P shows the current waveform of reactor 2P, reactor 2P, DC switch 3P, diode 4P
The step-up chopper 8P of positive group composed of the three-phase AC power source (e u, e v, e w) is controlled in the positive polarity of the three-phase half-wave rectified voltage waveform, similar to a current waveform. I N represents the current waveform of the reactor 2N, and by the negative group boost chopper 8N composed of the reactor 2N, the DC switch 3N, and the diode 4N,
The current waveform is controlled to be similar to the voltage waveform of the negative polarity three-phase half-wave rectification of the three-phase AC power supply ( eu , ev , ew ). Here, the current ripples I P and I N of the reactors 2P and 2N are actually superimposed with the current ripple components of the switching frequency components of the boost choppers 8P and 8N of the positive group and the negative group, respectively. It is omitted in FIG. I O is a three-phase AC switch 7
Shows the current waveform of I O = I P −I N. Here, since I P and I N have a ripple component of a frequency three times the power supply frequency ac with a phase difference of 180 ° and have the same magnitude, I O is 3
It becomes AC waveform of the ac. The peak value when the ripple of I P and I N is ignored If so, the peak value of the current waveform I O of the three-phase AC switch 7 is Becomes I u , I v , and I w represent the current waveform of the AC power supply. I u is u
It is a phase current, and is a three-phase AC switch 7 during the period from time t 1 to t 2.
The current I O is made to flow by turning on the arm element S u of the diode, the current I P is made to flow by the arm element D u of the diode rectifier 10 during the period of time t 2 to t 4 , and the period I of time t 4 to t 5 is again set. turn on the arm element S u of the three-phase AC switch 7 electric current I O, the period of time t 5 ~t 7 depending arm element D X of diode rectifier 10 an alternating current waveform of the sinusoidal electric current I N Obtainable. If there is no 3-phase AC switch 7 here,
It can be seen that a sinusoidal current cannot be obtained because the alternating current I u can only flow through the diode rectifier 10. The v-phase AC current I v is 120 with respect to the u-phase AC current I u .
A phase lag waveform of .degree., And similarly, a sinusoidal waveform is obtained by the arm elements D v and D y of the diode rectifier 10 and the arm element S v of the three-phase AC switch 7. The w-phase AC current I w has a waveform with a phase delay of 240 ° with respect to the u-phase AC current I u , and similarly, the arm elements D w and D z of the diode rectifier 10 and the arm of the three-phase AC switch 7 are formed. sinusoidal waveform is obtained by the element S w. The commutation of each arm element (D u , D v , D w , D x , D y , D z ) of the diode rectifier 10 is similar to the operation of a normal diode rectifier, and the voltage (e u , e v , ew ), but commutation of each arm element (S u , S v , S w ) of the three-phase AC switch 7 must be forced. For example, at time t 5 , the switch
Considering the commutation from S u to switch S w , at this time e u =
not be the power supply commutation because it is a e w. The same applies to other commutation timings, and power commutation cannot be performed because commutation must be performed at the cross point of each phase voltage. Time t 1 ~t 7 corresponds to that 6 equal one cycle of the AC power supply, the AC switch (S u, S v, S w) is conducting at a time between 60 DEG. Since each arm element (D u , D v , D w , D x , D y , D z ) of the diode rectifier 10 conducts by 120 ° like a normal diode rectifier, the arm element of the diode rectifier 10 conducts. During the rest period, the AC current may be passed by each AC switch (S u , S v , S w ).

次にこの発明の電力変換装置の制御装置の一実施例を図
について説明する。第3図は正群及び負群の昇圧チョッ
パ8P及び8Nのスイッチ手段3P,3Nとしてゲートターンオ
フサイリスタ(以下GTOと略す)3P,3Nを適用したもの
で、3相交流スイッチ(Su,Sv,Sw)として単相ダイオー
ドブリッジの直流端間にGTO3P,3Nを接続し両方向通電可
能なように回路構成したものである。また、20P,20N,20
Lは電流検出器であって、各々ダイオード整流器10の正
極出力電流,負極出力電流,負荷6の電流を検出し、I
Pb,INb,ILbの電流検出信号を得ている。22
は絶縁トランスであって、1次側は交流電源(AC)へ接
続され、2次側に1次側より30゜遅相の3相信号(eu1,
ev1,ew1)を得ている。また、論理演算手段は次のよう
に構成される。すなわち23は零クロスコンパレータであ
って絶縁トランス22の2次側の3相信号(eu1,ev1,
ew1)の正,負の極性を判別する。24は排他的論理和回
路であって、零クロスコンパレータ23の3相出力信号
(eu2,ev2,ew2)の内、各々2相毎に排他的論理和のNOT
の演算を行い、3相信号(eu3,ev3,ew3)を得ている。2
5はゲート増幅器であって排他的論理和回路24の出力信
号(eu3,ev3,ew3)を増幅し、ゲート信号として、3相
交流スイッチ(Su,Sv,Sw)へ与えられる(上記23〜25を
論理演算手段と呼ぶ)。21は電圧検出器であって正群及
び負群の昇圧チョッパ8P,8Nの両出力電圧Vcを検出し、
cbの電圧検出信号を得ている。29は電圧制御器で
あって、正群及び負群の昇圧チョッパ8P,8Nの両出力電
圧Vcの基準信号Vcreと検出信号Vcbの偏差を増
幅する。30は掛算器であって負荷電流検出信号ILb
と、両昇圧チョッパ8P,8Nの出力電圧検出信号Vcb
が掛算される。26は絶縁トランスであって、1次側は交
流電源(AC)に接続され、2次側は1次側と同相の6相
電圧信号(eu4,ev4,ew4,ex4,ey4,ez4)を得ている。28
は波高値検出器であって絶縁トランス26の2次側の6相
信号を整流してコンデンサで平滑にして交流電源ACの相
電圧Vacの波高値Vacpに比例した信号Vacp′を得てい
る。31は割算器であって、波高値検出信号Vacp′で掛算
器30の出力信号を割算し、可変抵抗器32を介して交流電
流波高値変換信号Iacp′を得ている。33は加算器であっ
て、この交流電流波高値変換信号Iacp′と電圧制御器29
の出力信号ΔIcを加算し、交流電流波高値基準信号I
acpreをこれら交流電流波高値基準信号制御手段29〜3
3によって得ている。また27P,27Nは3相半波整流回路
(3相半波整流手段)であって、各々絶縁トランス26の
2次電圧(eu4,ev4,ew4)及び(ex4,ey4,ez4)を整流し
て3相半波交流信号e27P及びe27Nを得ている。34P,34N
は掛算器であって、この3相半波整流信号e27P及びe27N
と、上記交流電流波高値基準信号Iacpreを掛算して
正群及び負群の昇圧チョッパ8P,8Nの電流基準信号I
pre及びINreを得ている。35P,35Nは両昇圧チョッ
パ8P,8Nの電流制御器で、この両昇圧チョッパの電流基
準信号IPre及びINreと上記ダイオード整流器10の
正極及び負極出力電流検出信号IPb及びINb
の偏差を増幅する(昇圧チョッパ電流制御手段)。36P,
36Nはパルス幅変調回路(以下PWM回路と略す)で、この
電流制御器35P及び35Nの出力信号と三角波キャリヤ信号
Vcaのレベルを比較する。そして37P,37Nはゲート増幅器
でこのPWM回路36P,36Nの出力信号を増幅して上記昇圧チ
ョッパ8P,8NのGTO3P,3Nへゲート信号として与える(昇
圧チョッパ素子制御手段)。
Next, an embodiment of a control device for a power converter according to the present invention will be described with reference to the drawings. Figure 3 is the positive group and negative group of the step-up chopper 8P and 8N switching means 3-Way, (hereinafter abbreviated as GTO) gate turn-off thyristor as a 3N 3-Way, obtained by applying the 3N, 3-phase AC switch (S u, S v , S w ), GTO3P, 3N is connected between the DC ends of the single-phase diode bridge, and the circuit is configured so that bidirectional conduction is possible. Also, 20P, 20N, 20
L is a current detector, which detects the positive electrode output current, the negative electrode output current, and the load 6 current of the diode rectifier 10,
Current detection signals of Pb , INb and ILb are obtained. twenty two
Is an isolation transformer, the primary side is connected to an AC power source (AC), and the secondary side is a three-phase signal (e u1 ,
e v1 , e w1 ). Further, the logical operation means is configured as follows. That is, 23 is a zero-cross comparator, which is a three-phase signal (e u1 , e v1 ,
Determine the positive and negative polarities of e w1 ). Reference numeral 24 is an exclusive OR circuit, and among the three-phase output signals (e u2 , e v2 , e w2 ) of the zero-cross comparator 23, the exclusive-OR NOT is provided for every two phases.
Is performed to obtain a three-phase signal (e u3 , e v3 , e w3 ). 2
Reference numeral 5 denotes a gate amplifier which amplifies the output signal (e u3 , e v3 , e w3 ) of the exclusive OR circuit 24 and supplies it as a gate signal to the three-phase AC switch (S u , S v , S w ). (23 to 25 are referred to as logical operation means). Reference numeral 21 is a voltage detector that detects both output voltages V c of the positive group and negative group boost choppers 8P, 8N,
A voltage detection signal of V cb is obtained. A voltage controller 29 amplifies the deviation between the reference signal V cre and the detection signal V cb of the output voltages V c of both the positive group and negative group boost choppers 8P and 8N. 30 is a multiplier, which is a load current detection signal I Lb
And the output voltage detection signal V cb of both boost choppers 8P and 8N
Is multiplied by. 26 is an isolation transformer, the primary side of which is connected to an AC power supply (AC), and the secondary side of which is a six-phase voltage signal (e u4 , e v4 , e w4 , e x4 , e y4 ) in phase with the primary side. , e z4 ). 28
Is a peak value detector, which rectifies the 6-phase signal on the secondary side of the insulation transformer 26 and smoothes it with a capacitor to obtain a signal V acp ′ proportional to the peak value V acp of the phase voltage V ac of the AC power supply AC. ing. Reference numeral 31 is a divider, which divides the output signal of the multiplier 30 by the peak value detection signal V acp ′ to obtain the AC current peak value converted signal I acp ′ via the variable resistor 32. Reference numeral 33 is an adder, which converts the AC current peak value conversion signal I acp ′ and the voltage controller 29.
It adds the output signal [Delta] I c, alternating current peak value reference signal I
The acpre is the AC current peak value reference signal control means 29 to 3
You're getting by 3. 27P and 27N are three-phase half-wave rectification circuits (three-phase half-wave rectification means), which are secondary voltages (e u4 , e v4 , e w4 ) and (e x4 , e y4 , e) of the insulating transformer 26, respectively. The three-phase half-wave AC signals e 27P and e 27N are obtained by rectifying z4 ). 34P, 34N
Is a multiplier, and these three-phase half-wave rectified signals e 27P and e 27N
And the AC current peak value reference signal I acpre are multiplied to obtain the current reference signals I of the positive and negative group boost choppers 8P and 8N.
I got pre and I Nre . 35P, the deviation of 35N both boost chopper 8P, a current controller of 8N, this both boost chopper current reference signal I Pre and I Nre the positive electrode and the negative electrode output current detection signal of the diode rectifier 10 I Pb and I Nb Is amplified (step-up chopper current control means). 36P,
36N is a pulse width modulation circuit (hereinafter abbreviated as PWM circuit), which outputs the output signals of the current controllers 35P and 35N and the triangular wave carrier signal.
Compare V ca levels. 37P and 37N are gate amplifiers which amplify the output signals of the PWM circuits 36P and 36N and give them as gate signals to the GTOs 3P and 3N of the step-up choppers 8P and 8N (step-up chopper element control means).

次に第3図に示す電力変換装置の制御装置の動作につい
て説明する。第4図は3相交流スイッチ(Su,Sv,Sw)の
ゲート信号の形成を示す動作波形図である。絶縁トラン
ス22の2次側電圧(eu1,ev1,ew1)は交流電源電圧(eu,
ev,ew)より30゜位相が遅れており、零クロスコンパレ
ータ23の出力信号(eu2,ev2,ew2)は180゜幅の矩形波信
号であり、交流電源電圧(eu,ev,ew)より30゜位相が遅
れる。排他的論理和回路24の出力信号(eu3,ev3,ew3
は各々零クロスコンパレータ23の出力信号eu2とev2,ev2
とew2,ew2とeu2の排他的論理和のNOTの演算により得ら
れ、各々60゜幅の矩形波信号で交流電源の1サイクル期
間中2回発生する。3相交流スイッチ(Su,Sv,Sw)のON
ゲート信号はこの排他的論理和回路24の出力信号(eu3,
ev3,ew3)と同期して発生し、第2図に示す主回路部の
動作波形に対応している。
Next, the operation of the control device for the power converter shown in FIG. 3 will be described. FIG. 4 is an operation waveform diagram showing formation of gate signals of the three-phase AC switches (S u , S v , S w ). The secondary side voltage (e u1 , e v1 , e w1 ) of the isolation transformer 22 is the AC power supply voltage (e u ,
e v, e w) from 30-degree phase are delayed, the output signal of the zero-cross comparator 23 (e u2, e v2, e w2) is a rectangular wave signal of 180 ° width, the AC power supply voltage (e u, The phase is delayed by 30 degrees from e v , e w ). Output signal of exclusive OR circuit 24 (e u3 , e v3 , e w3 ).
Are the output signals e u2 and e v2 , e v2 of the zero-cross comparator 23, respectively.
And e w2, obtained by the operation of the NOT exclusive OR of e w2 and e u2, occurs twice during one cycle of the AC power supply in the rectangular wave signal of each 60 ° wide. Turn on the three-phase AC switch (S u , S v , S w ).
The gate signal is the output signal (e u3 ,
e v3 , e w3 ), which corresponds to the operation waveform of the main circuit section shown in FIG.

次に昇圧チョッパ8P,8Nの電流基準信号IPer,INer
は、交流電源及び負荷電力の平衡条件より得られる。交
流電源の電力Pacは力率を1とすれば、 ここで、VacpとIacpは各々交流電源の相電圧のピーク値
と交流電源電流のピーク値を示し、次式で表わされる。
Next, the current reference signals I Per and I Ner of the boost choppers 8P and 8N
Is obtained from the balance condition of the AC power supply and the load power. If the power factor of the AC power P ac is 1, Here, V acp and I acp represent the peak value of the phase voltage of the AC power supply and the peak value of the AC power supply current, and are represented by the following equations.

一方、負荷電圧PLは、 PL=IL・VC …(2) で示される。電力の平衡条件より定常状態ではPac=PL
となり、(1),(2)式より の関係式が得られる。(3)式の電圧,電流値にそれぞ
れ対応した検出信号を代入すれば(4)式が得られる。
On the other hand, the load voltage P L is shown by P L = I L · V C (2) P ac = P L in steady state due to power balance condition
Then, from equations (1) and (2) The relational expression of is obtained. By substituting the detection signals corresponding to the voltage and current values of the equation (3), the equation (4) can be obtained.

Iacp′=K1ICb・VCb/Vacp′ …(4) ここでK1は比例定数である。Vacp′は波高値検出器28よ
り得られ、この(4)式の演算は掛算器30,割算器31及
び可変抵抗器32で実行され、交流電流波高値変換信号I
acp′が得られる。電圧制御器29はコンデンサ5P,5Nの両
端電圧VCを基準信号VCreに対応した値に制御するも
ので、この電圧制御器29の出力信号ΔIcはコンデンサ5
P,5Nに注入する電流成分の基準信号を示す。交流電流波
高値基準信号Iacpreは Iacpre=ΔIc+Iacp …(5) で与えられ、加算器33で実行される。
I acp ′ = K 1 I Cb · V Cb / V acp ′ (4) where K 1 is a proportional constant. V acp ′ is obtained from the peak value detector 28, and the operation of the equation (4) is executed by the multiplier 30, the divider 31 and the variable resistor 32, and the AC current peak value conversion signal I
acp ′ is obtained. The voltage controller 29 controls the voltage V C across the capacitors 5P and 5N to a value corresponding to the reference signal V Cre. The output signal ΔI c of the voltage controller 29 is the capacitor 5P.
The reference signal of the current component injected into P and 5N is shown. The alternating current peak value reference signal I acpre is given by I acpre = ΔI c + I acp (5) and executed by the adder 33.

この交流電流波高値基準信号Iacpreは次式により正
群及び負群の昇圧チョッパ8P,8Nの電流基準信号IPre
及びINreに変換される。
This AC current peak value reference signal I acpre is a current reference signal I Pre of the boost choppers 8P and 8N of the positive group and the negative group according to the following equation.
And I Nre .

(6)式は掛算器34P,34Nで実行される。第5図にその
動作波形図を示す。絶縁トランス26の2次電圧は60゜位
相差の6相波形であり、その内120゜位相差の3相信号
(eu4,ev4,ew4)及び(ex4,ey4,ez4)の3相半波整流回
路27P及び27Nにより、交流電源電圧に同期した正極性及
び負極性に相似の3相半波整流信号e27Pとe27Nが得られ
る。これらの信号と交流電流波高値基準信号Iacpre
が掛算され、正群及び負群チョッパ8P,8Nの電流基準信
号IPre,INreが得られる。ここで交流電流波高値基
準信号Iacpreがフラットな波形であれば、この電流
基準信号IPre,INreの波形は3相半波整流信号
e27P,e27Nと相似な波形となり、第2図の主回路部の動
作波形図に示すリアクトル2P及び2Nの電流IP及びINに対
応する。
Expression (6) is executed by the multipliers 34P and 34N. FIG. 5 shows the operation waveform diagram. The secondary voltage of the isolation transformer 26 is a six-phase waveform with a phase difference of 60 °, of which the three-phase signals with a phase difference of 120 ° (e u4 , e v4 , e w4 ) and (e x4 , e y4 , e z4 ) By the three-phase half-wave rectification circuits 27P and 27N, the three-phase half-wave rectification signals e27P and e27N that are similar to the positive polarity and the negative polarity and are synchronized with the AC power supply voltage are obtained. These signals and AC current peak value reference signal I acpre
Is multiplied to obtain current reference signals I Pre and I Nre of the positive group and negative group choppers 8P and 8N. If the AC current peak value reference signal I acpre has a flat waveform, the waveforms of the current reference signals I Pre and I Nre are three-phase half-wave rectified signals.
The waveforms are similar to those of e 27P and e 27N and correspond to the currents I P and I N of the reactors 2P and 2N shown in the operation waveform diagram of the main circuit portion of FIG.

電流制御器35P,35Nによって正群及び負群の昇圧チョッ
パ8P,8Nの電流IP,ICは電流基準信号IPre,INreに従
って制御される。この電流制御器35P,35Nの出力信号e
35P,e35NはPWM回路36P,36Nによって高周波のスイッチン
グ信号に変調される。この変調周波数は3角波変調信号
Vcaによって決定されるが、このPWM回路は公知であるた
め、詳細な説明は省略する。
The currents I P and I C of the positive and negative group boost choppers 8P and 8N are controlled by the current controllers 35P and 35N according to the current reference signals I Pre and I Nre . The output signal e of this current controller 35P, 35N
The 35P and e 35N are modulated into high frequency switching signals by the PWM circuits 36P and 36N. This modulation frequency is a triangular wave modulation signal
Although it is determined by V ca , this PWM circuit is publicly known and therefore detailed description thereof is omitted.

なお、電流制御器35P,35NとPWM回路36P,36Nの組合せの
代りに公知であるヒステリシスコンパレータを設けて電
流の瞬時値を制御するように構成したものであってもよ
い。
Instead of the combination of the current controllers 35P and 35N and the PWM circuits 36P and 36N, a known hysteresis comparator may be provided to control the instantaneous value of the current.

また、上記実施例で正群及び負群の昇圧チョッパのスイ
ッチ3P,3Nのスイッチ手段として機械的スイッチあるい
はGTOを設けたものを示したが、トランジスタMOSFETな
どの高周波スイッチングが可能な自己消弧形半導体素子
であってもよく、また、3相交流スイッチ7のスイッチ
手段も同様にGTO以外の自己消弧形半導体素子であって
もよく、さらに自己消弧形半導体素子を逆並列に接続構
成したものであってもよい。
Further, in the above embodiment, a mechanical switch or GTO is provided as the switch means of the positive group and negative group boost chopper switches 3P, 3N, but a self-extinguishing type capable of high frequency switching such as a transistor MOSFET is shown. A semiconductor element may be used, and the switching means of the three-phase AC switch 7 may also be a self-extinguishing semiconductor element other than GTO. Further, the self-extinguishing semiconductor element is connected in antiparallel. It may be one.

また、第3図に示す制御装置の実施例ではアナログ回路
を主体に構成したものを示したが、マイクロプロセッサ
を利用したディジタル回路でも容易に実現できる。更に
第6図はディジタル回路で構成した制御装置の回路構成
図を示す。41は単相トランスであって、1次側は交流電
源のw−v相間に接続される。42はフィルタ回路であっ
て、この単相トランス41の2次側に接続され、90゜位相
遅れの電圧信号Vac′を発生する。43はPLL(フェーズ・
ルックド・ループ)回路でフィルタ回路42の出力信号V
ac′を零クロスコンパレータを介して矩形波に波形変換
された信号に同期した位相信号θをPLL,フィルタ,VCO,
カウンターで構成したPLL回路43で発生するもので公知
の回路である。44は(第1の)ROMテーブルであって、
この位相信号に対応して、3相交流スイッチ(Su,Sv,
Sw)のON信号(eu3,ev3,ew3)を発生するようにテーブ
ル化されている。45は(第2の)ROMテーブルであって
上記位相信号θに対応して3相半波整流信号e27P′,e
27N′を発生するようにテーブル化されている。46は割
込制御回路であって上記位相信号θに対応して所定の位
相で割込信号INTを発生し、マイクロプロセッサ(μ−
Pと以下略す)49に与えられる。47はマルチプレクサー
(MPXと以下略す)であって、交流電圧信号Vac′,正群
の昇圧チョッパ電流の検出信号IPb,負群の昇圧チ
ョッパ電流の検出信号INb,負荷電流の検出信号I
Lb,両昇圧チョッパの両端の出力電圧検出信号V
Cbの各信号がμ−P49からの指令に従い、選択され
てA/D変換器48を介してμ−P49に与えられる。36はPWM
回路であってμ−P49の出力信号にもとづき、変調信号
を作りゲート増幅器37を介してスイッチ3P,3NへON信号
を与える。第7図(A)に(第1の)ROMテーブル44及
び(第2の)ROMテーブル45の動作波形をアナログ的な
表現で示す。単相トランス41の1次側電圧ew-vは交流電
源のU相電圧euに対して90゜進み位相であり、フィルタ
回路42で90゜位相の遅れた信号Vac′は結局U相電圧eu
と同相のものが得られる。その結果PLL回路43の出力信
号θは交流電源のU相電圧euと同期した信号になり、こ
の例ではアップカウントされたアナログ表現の波形を示
している。なお位相信号θは特にU相電圧に同期させな
ければならないとうものではなく、他の相の電圧に同期
させてもよく、またフィルタ回路42で90゜遅らせなけれ
ばならないということもない。(第1の)ROMテーブル4
4はこの位相信号θに対して3相の論理信号(eu3,ev3,e
w3)を発生する。例えば論理信号eu3では位相信号θが
0゜〜30゜,150゜〜210゜,330゜〜360゜間にハイレベル
「H」の信号を出力するようにテーブル化されている。
(第2の)ROMテーブル45は位相信号θに対して正及び
負の3相半波整流波形に相似の波形の出力信号を
e27P′,e27N′として出力するようにテーブル化されて
いる。例えば正の3相半波整流波形信号e27P′では位相
信号θが0゜〜30゜間はcos(θ+30゜),30゜〜150゜
間はcos(θ−90゜),150゜〜270゜間はcos(θ−210
゜),270゜〜360゜間はcos(θ−330゜)の関数でテー
ブル化されている。割込制御回路46は位相信号θに対応
して割込信号INTをμ−P49に与え、この割込信号INTに
応じてμ−P49は演算処理を行い、この割込信号は複数
のものであってもよく、この場合の優先順位は次のよう
に一般に設けられる。例えばθ=90゜の時点でのみ発生
する割込信号INT90゜30゜毎に発生する割込信号IN
T30゜,360゜/256毎に発生する割込信号INTPWMの3種類
の割込信号によって、第7図(B)に示す制御フローに
従ってμ−P49は演算を実行するが、基本的には第3図
のアナログ回路と同一演算をタイムシェアリングで行
う。なおPWM回路36の演算処理をμ−P49にて実行される
こともできる。また、電圧制御器29及び電流制御器35P,
35Nの演算ではP,PI,PIDなどの一般によく知られた古典
的制御論理による演算方法の他にデッドビート制御など
の現代制御理論による演算方法であってもよい。
In the embodiment of the control device shown in FIG. 3, an analog circuit is mainly constituted, but it can be easily realized by a digital circuit using a microprocessor. Further, FIG. 6 shows a circuit configuration diagram of a control device constituted by a digital circuit. Reference numeral 41 is a single-phase transformer, the primary side of which is connected between the w and v phases of the AC power supply. Reference numeral 42 denotes a filter circuit, which is connected to the secondary side of the single-phase transformer 41 and generates a voltage signal V ac ′ with a 90 ° phase delay. 43 is the PLL (Phase
Output signal V of the filter circuit 42 in the (looked loop) circuit.
The phase signal θ synchronized with the signal obtained by converting ac ′ into a rectangular wave through a zero-crossing comparator is used as PLL, filter, VCO,
This is a well-known circuit that is generated in the PLL circuit 43 configured by a counter. 44 is the (first) ROM table,
Corresponding to this phase signal, a three-phase AC switch (S u , S v ,
It is tabulated so as to generate the ON signal (e u3 , e v3 , e w3 ) of S w ). 45 is a (second) ROM table, which corresponds to the phase signal θ and is a three-phase half-wave rectified signal e 27P ′, e
It is tabulated to generate 27N '. An interrupt control circuit 46 generates an interrupt signal INT at a predetermined phase corresponding to the phase signal θ, and a microprocessor (μ-
P and abbreviated below) 49. 47 is a multiplexer (MPX abbreviated hereinafter), an AC voltage signal V ac ', the detection signal I Pb of the step-up chopper current of positive group, the detection signal I Nb of the step-up chopper current of the negative group, the detection signal of the load current I
Lb , output voltage detection signal V across both boost choppers
Each signal of Cb is selected according to the command from the μ-P 49 and is given to the μ-P 49 via the A / D converter 48. 36 is PWM
It is a circuit and produces a modulation signal based on the output signal of the μ-P 49, and gives an ON signal to the switches 3P and 3N via the gate amplifier 37. FIG. 7A shows the operation waveforms of the (first) ROM table 44 and the (second) ROM table 45 in an analog expression. The primary-side voltage e wv of the single-phase transformer 41 has a 90 ° lead phase with respect to the U-phase voltage eu of the AC power supply, and the signal V ac ′ with a 90 ° phase delay in the filter circuit 42 eventually results in the U-phase voltage e u . u
And the same phase is obtained. The result is the output signal θ of the PLL circuit 43 will signal synchronized with the U-phase voltage e u of the AC power supply, in this example shows the waveform of the up-count analog representation. The phase signal θ is not particularly required to be synchronized with the U-phase voltage, it may be synchronized with the voltage of another phase, and the filter circuit 42 does not have to delay it by 90 °. (First) ROM table 4
4 is a three-phase logic signal (e u3 , e v3 , e) with respect to this phase signal θ.
w3 ) is generated. For example, the logic signal e u3 the phase signal θ is 0 ° to 30 °, 150 ° to 210 °, it is tabulated to output a signal of high level "H" between 330 ° to 360 °.
The (second) ROM table 45 outputs an output signal having a waveform similar to the positive and negative three-phase half-wave rectified waveform with respect to the phase signal θ.
It is tabulated to output as e 27P ′, e 27N ′. For example, in the positive three-phase half-wave rectified waveform signal e 27P ′, the phase signal θ is cos (θ + 30 °) between 0 ° -30 °, cos (θ-90 °) between 150 ° -150 °, and 150 ° -270 °. Between degrees, cos (θ−210
)), Between 270 ° and 360 ° is tabulated by the function of cos (θ-330 °). The interrupt control circuit 46 provides an interrupt signal INT to the μ-P49 in response to the phase signal θ, and the μ-P49 performs arithmetic processing in response to this interrupt signal INT. It may be present, and the priorities in this case are generally set as follows. For example, interrupt signal INT that occurs only at θ = 90 ° 90 ° interrupt signal IN that occurs every 30 °
Three types of interrupt signals, INT PWM generated at every T 30 ° , 360 ° / 256, cause μ-P49 to execute the operation according to the control flow shown in Fig. 7 (B). Performs the same calculation as the analog circuit of FIG. 3 by time sharing. The arithmetic processing of the PWM circuit 36 can also be executed by μ-P49. In addition, the voltage controller 29 and the current controller 35P,
The operation of 35N may be an operation method based on a well-known classical control logic such as P, PI, or PID, or an operation method based on modern control theory such as dead beat control.

第8図(a),(b)に3相交流スイッチ7のスイッチ
手段としてゲートターンオフサイリスタを適用した場合
の回路例を示した。このスイッチ手段としてはゲートタ
ーンオフサイリスタ,トランジスタMOSFETなどの自己消
弧形半導体素子であってもよく、両方向に通電可能にす
る必要がある。第9図(a)はアーム素子(Su,Sv,Sw
としてゲートターンオフサイリスタを逆並列接続した例
である。第8図(b)は単相ダイオードブリッジの直流
端間にゲートターンオフサイリスタを1個接続した例で
上記実施例と同様の効果を奏する。なお、この3相交流
スイッチ7のスイッチ手段の動作責務としては昇圧チョ
ッパのスイッチ手段3P,3Nに比べて低電流で低周波的の
ものでもよい。
FIGS. 8 (a) and 8 (b) show examples of circuits in the case where a gate turn-off thyristor is applied as the switching means of the three-phase AC switch 7. The switch means may be a self-arc-extinguishing type semiconductor element such as a gate turn-off thyristor or a transistor MOSFET, and it is necessary to be able to energize in both directions. FIG. 9 (a) shows an arm element (S u , S v , S w ).
Is an example in which gate turn-off thyristors are connected in anti-parallel. FIG. 8 (b) shows an example in which one gate turn-off thyristor is connected between the DC ends of the single-phase diode bridge, and the same effect as that of the above embodiment is obtained. The duty of operation of the switch means of the three-phase AC switch 7 may be low current and low frequency as compared with the switch means 3P and 3N of the step-up chopper.

また、負荷6として直流負荷のものを例にして示したが
直流−交流電力変換器(インバータ)を介して交流負荷
が接続されたものであってもよく、上記実施例と同様の
効果を奏する。
Further, the load 6 is shown as an example of a DC load, but an AC load may be connected via a DC-AC power converter (inverter), and the same effect as that of the above-described embodiment is obtained. .

また、交流電源側に正群及び負群の昇圧チョッパ8P,8N
のスイッチング周波数に依存する交流電流の高調波成分
(一般にスイッチング周波数の整数倍の成分)を制御す
るためのフィルタが設けられてあってもよい。
In addition, the positive group and negative group boost choppers 8P and 8N are installed on the AC power supply side.
There may be provided a filter for controlling a harmonic component of the alternating current (generally, an integral multiple of the switching frequency) depending on the switching frequency.

〔発明の効果〕〔The invention's effect〕

以上のようにこの発明によれば、3相ブリッジ構成のダ
イオード整流器の直流出力側に2段にカスケード接続さ
れた昇圧チョッパを並列に接続するとともに、この昇圧
チョッパの中間点と3相交流電源間に両方向通電形の3
相交流スイッチを設け、各々の昇圧チョッパは対応する
極性の3相半波整流の電流波形と相似な電流波形の電流
を流すようにそれぞれ制御され、それぞれの昇圧チョッ
パの入力電流の差分を3相交流スイッチを介して3相交
流電流に流すようにして主回路部を構成し、その制御方
法として交流電流波高値基準信号の演算手段、3相半波
整流波形状の電流基準信号の演算手段、この電流基準信
号にもとづき昇圧チョッパによりダイオード整流器の
正、負極の出力電流を制御する手段、3相交流スイッチ
のON信号の論理演算手段とによって制御装置を構成する
ようにしたので、3相交流スイッチの動作により交流電
源の力率を1にできるばかりでなく、対応する極性の3
相半波整流の電圧波形と相似な電流波形の電流を流すよ
うにそれぞれ制御される昇圧チョッパを設けたことによ
り交流電源を正弦波状に制御でき、それにより出力電流
中の高調波電流を減縮した電力変換装置が得られる効果
がある。
As described above, according to the present invention, the boost choppers cascade-connected in two stages are connected in parallel to the DC output side of the diode rectifier having the three-phase bridge configuration, and the intermediate point of the boost chopper and the three-phase AC power supply are connected. Two-way energizing type 3
A phase AC switch is provided, and each boost chopper is controlled so that a current with a current waveform similar to the current waveform of the corresponding three-phase half-wave rectification of the polarity is flowed, and the difference in the input current of each boost chopper is calculated as three phases. A main circuit unit is configured to flow a three-phase AC current through an AC switch, and as a control method thereof, an AC current peak value reference signal calculation means, a three-phase half-wave rectified wave-shaped current reference signal calculation means, The control device is constituted by means for controlling the positive and negative output currents of the diode rectifier by the boost chopper based on the current reference signal and the logical operation means for the ON signal of the three-phase AC switch. Not only can the power factor of the AC power supply be set to 1 by the operation of, but the corresponding polarity of 3
The AC power supply can be controlled in a sinusoidal shape by providing boost choppers that are controlled so that currents with a current waveform similar to the voltage waveform of phase half-wave rectification can be controlled, thereby reducing the harmonic current in the output current. There is an effect that a power conversion device can be obtained.

【図面の簡単な説明】[Brief description of drawings]

第1図はこの発明の一実施例による電力変換装置の回路
構成図、第2図は第1図の動作を示す要部の波形図、第
3図はこの発明の一実施例による電力変換装置の制御装
置を示す回路構成図、第4図及び第5図は第3図の動作
波形図、第6図はこの発明の他の実施例による制御装置
を示す回路構成図、第7図(A),(B)は第6図の動
作波形図及び制御フリー図、第8図は3相交流スイッチ
の具体例を示す回路図、第9図は従来の電力変換装置を
示す回路構成図、第10図は第9図の動作波形図である。 図において1,10はダイオード整流器、2,2P,2Nはリアク
トル、3,3P,3Nは直流スイッチ、4,4P,4Nはダイオード、
5,5P,5Nはコンデンサ、6は負荷、7は3相交流スイッ
チ、8P,8Nは正群,負群の昇圧チョッパ、20P,20N,20Lは
電流検出器、21は電圧検出器、22,26は絶縁トランス、2
3は零クロスコンパレータ、24は排他的論理和回路、25,
37P,37N,37はゲート増幅器、27P,27Nは3相半波整流回
路、28は波高値検出器、30,34P,34Nは掛算器、31は割算
器、32は可変抵抗器、33は加算器、29は電圧制御器、35
P,35Nは電流制御器、36P,36NはPWM回路、37はゲート増
幅器、43はPLL回路、44,45は第1及び第2のROMテーブ
ル、49はマイクロプロセッサである。
FIG. 1 is a circuit configuration diagram of a power converter according to an embodiment of the present invention, FIG. 2 is a waveform diagram of a main part showing the operation of FIG. 1, and FIG. 3 is a power converter according to an embodiment of the present invention. 4 and 5 are operation waveform diagrams of FIG. 3, FIG. 6 is a circuit configuration diagram of a control device according to another embodiment of the present invention, and FIG. ) And (B) are operation waveform diagrams and control free diagrams of FIG. 6, FIG. 8 is a circuit diagram showing a specific example of a three-phase AC switch, and FIG. 9 is a circuit configuration diagram showing a conventional power conversion device. FIG. 10 is an operation waveform diagram of FIG. In the figure, 1, 10 are diode rectifiers, 2, 2P, 2N are reactors, 3, 3P, 3N are DC switches, 4, 4P, 4N are diodes,
5,5P and 5N are capacitors, 6 is a load, 7 is a three-phase AC switch, 8P and 8N are boost choppers for positive and negative groups, 20P, 20N and 20L are current detectors, 21 is a voltage detector, 22, 26 is an isolation transformer, 2
3 is a zero cross comparator, 24 is an exclusive OR circuit, 25,
37P, 37N, 37 are gate amplifiers, 27P, 27N are three-phase half-wave rectifier circuits, 28 is a peak value detector, 30, 34P, 34N are multipliers, 31 is a divider, 32 is a variable resistor, 33 is Adder, 29 is a voltage controller, 35
P and 35N are current controllers, 36P and 36N are PWM circuits, 37 is a gate amplifier, 43 is a PLL circuit, 44 and 45 are first and second ROM tables, and 49 is a microprocessor.

Claims (12)

【特許請求の範囲】[Claims] 【請求項1】3相交流電源に接続された3相ブリッジ接
続のダイオード整流器と、前記ダイオード整流器の正極
及び負極出力端間に2段カスケード接続された正群及び
負群の昇圧チョッパと、前記両チョッパの接続中間点と
上記交流電源端間に接続された3相交流スイッチとを備
え、前記正群の昇圧チョッパは前記3相交流電源の正極
性の3相半波整流の電圧波形と相似な電流波形の電流を
流すように制御され、前記負群の昇圧チョッパは前記3
相交流電源の負極性の3相半波整流の電圧波形と相似な
電流波形の電流を流すように制御され、前記正群の昇圧
チョッパの入力電流と前記負群の昇圧チョッパの入力電
流との差分を前記3相交流スイッチを介して前記3相交
流電源に流すようにしたことを特徴とする電力変換装
置。
1. A three-phase bridge-connected diode rectifier connected to a three-phase AC power supply, and positive and negative boost choppers connected in two stages in cascade between the positive and negative output terminals of the diode rectifier, The step-up chopper of the positive group is similar to the voltage waveform of the positive polarity three-phase half-wave rectification of the three-phase AC power supply, which is provided with a three-phase AC switch connected between the connection intermediate points of both choppers and the AC power supply end. Is controlled so that a current having a different current waveform is passed, and the boost chopper of the negative group has
It is controlled so that a current having a current waveform similar to the voltage waveform of the negative polarity three-phase half-wave rectification of the phase-phase AC power supply is passed, and the input current of the positive group boost chopper and the negative group boost chopper A power conversion device characterized in that the difference is caused to flow to the three-phase AC power source through the three-phase AC switch.
【請求項2】前記3相交流スイッチのスイッチ手段とし
てゲートターンオフサイリスタ,トランジスタ,MOSFET
などの自己消弧形半導体素子を用いるようにしたことを
特徴とする特許請求の範囲第1項記載の電力変換装置。
2. A gate turn-off thyristor, a transistor, and a MOSFET as switching means of the three-phase AC switch.
The power conversion device according to claim 1, wherein a self-arc-extinguishing type semiconductor element such as is used.
【請求項3】前記3相交流スイッチの構成として自己消
弧形半導体素子を逆並列に接続したことを特徴とする特
許請求の範囲第1項記載の電力変換装置。
3. The power conversion device according to claim 1, wherein self-extinguishing type semiconductor elements are connected in antiparallel as a configuration of the three-phase AC switch.
【請求項4】前記3相交流スイッチの構成として単相ブ
リッジの直流間にゲートターンオフサイリスタ等の自己
消弧形半導体素子を1組接続したことを特徴とする特許
請求の範囲第1項記載の電力変換装置。
4. A self-extinguishing type semiconductor device such as a gate turn-off thyristor is connected between the direct currents of a single-phase bridge as a constitution of the three-phase AC switch. Power converter.
【請求項5】3相交流電源に接続された3相ブリッジ接
続のダイオード整流器と、前記ダイオード整流器の正極
及び負極出力端間に2段カスケード接続された正群及び
負群の昇圧チョッパと、前記両チョッパの接続中間点と
上記交流電源端間に接続された3相交流スイッチと、前
記正群及び負群の昇圧チョッパ間に接続され直流電力に
よって駆動される負荷と、前記負荷の電流及び前記両昇
圧チョッパの両端電圧、前記交流電源の電圧波高値及び
前記両チョッパの両端電圧の基準から前記交流電源の電
流波高値を演算する交流電流波高値基準信号制御手段
と、上記交流電源に同期した正,負の3相半波整流波形
信号を導出する3相半波整流手段と、前記3相半波整流
手段による整流波形信号及び上記交流電圧波高値信号と
から上記正群及び負群の昇圧チョッパの電流基準を演算
する昇圧チョッパ電流制御手段と、前記昇圧チョッパ電
流制御手段による電流基準にもとづき上記正群及び負群
の昇圧チョッパの電流を制御する昇圧チョッパ素子制御
手段と、上記ダイオード整流器のアーム素子の通電休止
期間のみオン信号を発生する論理演算手段とを備え、前
記正群の昇圧チョッパは前記3相交流電源の正極性の3
相半波整流の電圧波形と相似な電流波形の電流を流すよ
うに制御され、前記負群の昇圧チョッパは前記3相交流
電源の負極性の3相半波整流の電圧波形と相似な電流波
形の電流を流すように制御され、前記正群の昇圧チョッ
パの入力電流と前記負群の昇圧チョッパの入力電流との
差分を前記3相交流スイッチを介して前記3相交流電源
に流すようにしたことを特徴とする電力変換装置。
5. A three-phase bridge-connected diode rectifier connected to a three-phase AC power supply, and positive and negative boost choppers connected in two stages between the positive and negative output terminals of the diode rectifier, A three-phase AC switch connected between the connection intermediate point of both choppers and the AC power source end, a load connected between the boost choppers of the positive group and the negative group and driven by DC power, a current of the load, and the load. AC current peak value reference signal control means for calculating the current peak value of the AC power supply from the voltage across both boost choppers, the voltage peak value of the AC power supply, and the voltage across the choppers, and is synchronized with the AC power supply. From the three-phase half-wave rectifying means for deriving positive and negative three-phase half-wave rectified waveform signals, the rectified waveform signal by the three-phase half-wave rectifying means and the AC voltage peak value signal, the positive group and the negative Boost chopper current control means for calculating the current reference of the boost chopper, step-up chopper element control means for controlling the currents of the boost choppers of the positive group and the negative group based on the current reference by the step-up chopper current control means, and the diode. A step-up chopper of the positive group, which has a positive polarity 3 of the three-phase AC power supply.
The boost chopper of the negative group is controlled so that a current having a current waveform similar to the voltage waveform of the half-phase half-wave rectification is supplied, and the boost chopper of the negative group has a current waveform similar to the voltage waveform of the negative three-phase half-wave rectification of the three-phase AC power supply. Of the positive group boost chopper and the input current of the negative group boost chopper are passed through the three-phase AC switch to the three-phase AC power supply. A power converter characterized by the above.
【請求項6】前記交流電流波高値基準信号制御手段を掛
算器,電圧制御器,割算器及び加算器等で構成したこと
を特徴とする特許請求の範囲第5項記載の電力変換装
置。
6. The power converter according to claim 5, wherein the AC current peak value reference signal control means is composed of a multiplier, a voltage controller, a divider, an adder and the like.
【請求項7】前記3相半波整流手段として3相交流電源
を1次とする絶縁トランスの各2次側端子にダイオード
を接続し、正負の3相半波整流信号を出力するようにし
たことを特徴とする特許請求の範囲第5項記載の電力変
換装置。
7. A diode is connected to each secondary side terminal of an insulating transformer having a three-phase AC power supply as a primary as the three-phase half-wave rectifying means, and positive and negative three-phase half-wave rectified signals are output. The power conversion device according to claim 5, wherein
【請求項8】前記昇圧チョッパ電流制御手段として3相
半波整流手段の出力信号を取込み掛算器を介した信号を
電流制御器によって制御するようにしたことを特徴とす
る特許請求の範囲第5項記載の電力変換装置。
8. A current controller for controlling an output signal of a three-phase half-wave rectifying means as the step-up chopper current control means and controlling the signal through a multiplier. The power converter according to the item.
【請求項9】前記昇圧チョッパ素子制御手段をパルス幅
変調回路及びゲート増幅器とで構成したことを特徴とす
る特許請求の範囲第5項記載の電力変換装置。
9. The power conversion device according to claim 5, wherein the boost chopper element control means comprises a pulse width modulation circuit and a gate amplifier.
【請求項10】前記論理演算手段をゼロクロスコンパレ
ータ,排他的論理和回路及びゲート増幅器とで構成した
ことを特徴とする特許請求の範囲第5項記載の電力変換
装置。
10. The power conversion device according to claim 5, wherein the logical operation means comprises a zero-cross comparator, an exclusive OR circuit, and a gate amplifier.
【請求項11】3相交流電源に接続された3相ブリッジ
接続のダイオード整流器と、前記ダイオード整流器の正
極及び負極出力端間に2段カスケード接続された正群及
び負群の昇圧チョッパと、前記両チョッパの接続中間点
と上記交流電源端間に接続された交流スイッチと、前記
3相交流電源に接続された絶縁トランスと、該絶縁トラ
ンスの2次電圧をフィルタ回路を介して零クロスコンパ
レータに導き、該零クロスコンパレータの出力より鋸歯
状波を出力するPLL回路と、前記PLL回路の出力を第1の
ROMテーブルに入力し、該ROMテーブルの出力を増幅して
3相交流スイッチのゲート信号として与えるゲート増幅
器と、前記フィルタ回路を介してマルチプレクサに導
き、該マルチプレクサよりA/D変換器を経て入力された
信号をディジタル処理するマイクロプロセッサと、前記
PLL回路の出力信号を受け並列に接続された第2のROMテ
ーブル及び割込制御回路と、前記第2のROMテーブル及
び割込制御回路の出力を前記マイクロプロセッサに入力
すると共に該マイクロプロセッサより出力されたディジ
タル信号をPWM回路を経て増幅し正群及び負群の昇圧チ
ョッパの直流スイッチのゲート信号として入力するゲー
ト増幅器とを備え、前記正群の昇圧チョッパは前記3相
交流電源の正極性の3相半波整流の電圧波形と相似な電
流波形の電流を流すように制御され、前記負群の昇圧チ
ョッパは前記3相交流電源の負極性の3相半波整流の電
圧波形と相似な電流波形の電流を流すように制御され、
前記正群の昇圧チョッパの入力電流と前記負群の昇圧チ
ョッパの入力電流との差分を前記交流スイッチを介して
前記3相交流電源に流すようにしたことを特徴とする電
力変換装置。
11. A three-phase bridge-connected diode rectifier connected to a three-phase AC power supply, and positive and negative boost choppers connected in two stages between the positive and negative output terminals of the diode rectifier, An AC switch connected between the connection intermediate point of both choppers and the AC power source terminal, an insulating transformer connected to the three-phase AC power source, and a secondary voltage of the insulating transformer to a zero cross comparator via a filter circuit. A PLL circuit for guiding a sawtooth wave from the output of the zero-cross comparator and an output of the PLL circuit
It is input to the ROM table, is amplified by the output of the ROM table and is applied as a gate signal of a three-phase AC switch, and is guided to a multiplexer via the filter circuit, and is input from the multiplexer via an A / D converter. A microprocessor for digitally processing the received signal, and
A second ROM table and interrupt control circuit connected in parallel to receive the output signal of the PLL circuit, and the outputs of the second ROM table and interrupt control circuit are input to and output from the microprocessor. A positive amplifier of the positive polarity of the three-phase alternating current power supply, the positive group boost chopper having a positive polarity of the three-phase AC power source. The boost chopper of the negative group is controlled so that a current having a current waveform similar to the voltage waveform of the three-phase half-wave rectification is passed, and the boost chopper of the negative group has a current similar to the voltage waveform of the negative-polarity three-phase half-wave rectification of the three-phase AC power supply. It is controlled to flow a waveform current,
A power conversion device, wherein a difference between an input current of the positive group boost chopper and an input current of the negative group boost chopper is made to flow to the three-phase AC power supply via the AC switch.
【請求項12】前記PLL回路を零クロスコンパレータ,PL
L,電圧制御発振器及びカウンタとを有する回路で構成し
たことを特徴とする特許請求の範囲第11項記載の電力変
換装置。
12. The PLL circuit comprises a zero cross comparator, PL
12. The power conversion device according to claim 11, comprising a circuit having L, a voltage controlled oscillator, and a counter.
JP62033534A 1987-02-18 1987-02-18 Power converter Expired - Fee Related JPH0789742B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP62033534A JPH0789742B2 (en) 1987-02-18 1987-02-18 Power converter

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP62033534A JPH0789742B2 (en) 1987-02-18 1987-02-18 Power converter

Publications (2)

Publication Number Publication Date
JPS63202271A JPS63202271A (en) 1988-08-22
JPH0789742B2 true JPH0789742B2 (en) 1995-09-27

Family

ID=12389222

Family Applications (1)

Application Number Title Priority Date Filing Date
JP62033534A Expired - Fee Related JPH0789742B2 (en) 1987-02-18 1987-02-18 Power converter

Country Status (1)

Country Link
JP (1) JPH0789742B2 (en)

Families Citing this family (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP1022844A3 (en) * 1999-01-19 2002-04-17 Matsushita Electric Industrial Co., Ltd. Power supply device and air conditioner using the same
AT512752B1 (en) * 2012-03-30 2018-02-15 Schneider Electric Power Drives Gmbh Rectifier circuit with current injection
CN103812314B (en) * 2012-11-08 2016-09-14 上海儒竞电子科技有限公司 High Power Factor rectified three-phase circuit
WO2021240658A1 (en) * 2020-05-26 2021-12-02 三菱電機株式会社 Power conversion device, motor drive device, blower, compressor, and air conditioner
JP7297157B2 (en) * 2020-05-26 2023-06-23 三菱電機株式会社 Power converters, motor drives, blowers, compressors and air conditioners

Family Cites Families (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS56157269A (en) * 1980-04-30 1981-12-04 Matsushita Electric Works Ltd Dc power source
JPS58207870A (en) * 1982-05-26 1983-12-03 Nec Corp Double voltage rectifying chopper circuit

Also Published As

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JPS63202271A (en) 1988-08-22

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