JPH0789554B2 - Method for manufacturing semiconductor device - Google Patents

Description

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for manufacturing a semiconductor device, and more particularly to a method for forming a multi-layer wiring of a semiconductor device.

2. Description of the Related Art In recent years, in order to achieve high integration and high speed of LSI devices, the number of devices having a multilayer wiring structure is increasing. An alloy containing Al as a main component is generally used as a wiring material.

As an example of a conventional method for forming a multi-layer wiring, a manufacturing process of a MOS type semiconductor device will be described with reference to FIGS. Note that FIG. 2 shows the manufacturing process of the Al 2 layer wiring, and the transistor region is not shown for simplification.

As shown in FIG. 2A, first, an interlayer insulating film made of the PSG film 2 is formed so as to cover a circuit element (not shown) on the silicon substrate 1, and then a lower layer Al wiring 3 is formed. To do. Thereafter, as shown in FIG. 2B, an interlayer insulating film made of the PSG film 4 between the upper layer wiring and the lower layer wiring is formed. Second
As shown in FIG. 7C, the PSG film 4 is dry-etched using the photoresist 5 as a mask to open the through hole 6.
As an etching gas, a mixed gas containing CHF ₃ , C ₂ F ₆ , C ₃ F _{8 and the} like as a main component is generally used. At this time, a polymer 7 as a by-product of etching is deposited on the lower Al wiring 3 in the through hole 6. The polymer 7 contains carbon (C) as a main component, and also contains an etching gas component such as fluorine (F) and a metal component forming a wiring. Although the thickness depends on the etching conditions, it becomes thick with the overetching time, and may become 1000 Å even when the overetching for 1 minute is performed. Next, as shown in FIG. 2d, after the through hole is opened, the photoresist 5
Is removed by O ₂ plasma and then washed with, for example, fuming nitric acid, but the polymer 7 is not removed. After this, the upper layer
The Al wiring 8 is formed. Before sputtering Al for the upper layer Al wiring, Ar sputter etching was performed in the same apparatus, and a natural oxide film (Al ₂ O ₃ , shown in the figure) formed on the lower layer Al wiring 3 in the through hole 6 was formed. (Not shown) is carried out. The etching amount is 300 Å of Al ₂ O ₃
The polymer 7 is not completely removed but remains in the through hole 6 and serves as a barrier between the lower layer Al wiring 3 and the upper layer Al wiring 8. Finally, FIG. 2e
As shown in, the PSG film 9 and the silicon nitride film 10 by the plasma CVD method are formed as the passivation film. Incidentally, P
When depositing the SG film 9 and the silicon nitride film 10, a heat treatment of 300 to 400 ° C. is performed, but at this time, a void 11 is generated in the upper Al wiring. As the cause of this void 11,
During the cleaning process with fuming nitric acid after opening the through hole,
It is considered that the moisture absorbed in PSG4 reacts with the upper Al wiring 8.

Problems to be Solved by the Invention The polymer formed between the lower-layer Al wiring 3 and the upper-layer Al wiring 8 serves as a barrier, increasing contact resistance and increasing the variation in resistance between contacts. 1000 2
× 2μm ² size contact average resistance per
It may exceed 200 mΩ. In this case, it is clear that a serious problem occurs in characteristics in the analog element or the digital element having the differential circuit.

Further, it is clear that when a void occurs in the Al wiring, reliability problems such as electromigration tend to occur.

Means for Solving the Problems In order to solve the problems, the present invention provides a step of depositing a first conductive layer on a semiconductor substrate directly or via an intermediate layer, and a step of depositing the first conductive layer on the first conductive layer. A step of depositing an interlayer insulating film,
A method for manufacturing a semiconductor device, comprising: a step of performing a heat treatment after opening the interlayer insulating film; and a step of depositing a second conductive layer on the interlayer insulating film including the opening portion. provide.

Effect According to the present invention, the polymer formed in the through hole is thermally decomposed and removed by the heat treatment, so that a low contact resistance can always be obtained. Also, the water absorbed by the PSG film is released by heat treatment, so Al
No voids are formed in the wiring, and reliability problems are solved.

Example An example in which the present invention is applied to the manufacture of a MOS type semiconductor device will be described below with reference to the sectional views showing the manufacturing steps of FIGS. For simplification, only the Al2 layer wiring portion is shown in the figure, and the transistor region is not shown.

As shown in FIG. 1A, first, a predetermined Locos oxide film, a gate oxide film, a polysilicon gate,
After forming the source / drain diffusion layers and the like, a PSG film 2 is formed as an interlayer insulating film covering them, and then a lower layer Al wiring 3 is formed. Thereafter, as shown in FIG. 1B, an interlayer insulating film made of the PSG film 4 between the upper layer wiring and the lower layer wiring is formed. Next, as shown in FIG. 1c, the PSG film 4 is dry-etched using the photoresist film 5 as a mask to open through holes 6. At this time, the polymer 7 is deposited on the lower Al wiring 3 in the through hole 6.

Next, as shown in FIG. 1D, after the through hole is opened, the photoresist 5 is removed by O ₂ plasma, and then washed with fuming nitric acid. At this time, the polymer 7 is hardly removed. Then, as shown in FIG.
Heat treatment is performed at 380 ° C in a mixed gas atmosphere of N ₂ and H ₂ . After this, the polymer is pyrolyzed and completely removed. At this time, as shown in FIG. 1F, the upper layer Al wiring 8 is formed.
Before sputter-depositing Al for this upper layer Al wiring,
Ar sputter etching is performed in the same apparatus to remove the natural oxide film grown on the lower Al wiring 3 in the through hole 6. Finally, a PSG film 9 and a plasma silicon nitride film 10 are formed as a passivation film as shown in FIG.

In the above-described embodiment, since the heat treatment process is performed after the through hole is formed and before the Al sputter deposition process for the upper Al wiring, the polymer deposited in the through hole is thermally decomposed and removed. In this embodiment, a low contact resistance value of 1000 m × 2 μm ² size contacts with an average resistance of 100 mΩ or less was obtained. Further, the water absorbed in PSG4 was released by the above heat treatment during the cleaning step with fuming nitric acid after the through hole was opened, and no void was generated in the Al wiring.

Although Al is used as the wiring in the embodiment, it is apparent that the same effect can be expected when other metal wiring such as W is used.

Further, regarding the heat treatment temperature, it is apparent that the same effect can be expected as long as it is equal to or higher than the temperature at which the polymer decomposes.

EFFECTS OF THE INVENTION As described above, according to the present invention, since the polymer deposited in the through holes is removed, the contact resistance is constantly reduced, and voids do not occur in the Al wiring. It is possible to obtain a multilayer wiring structure excellent in reliability.

[Brief description of drawings]

1A to 1G are sectional views showing a manufacturing process of an embodiment of the present invention, and FIGS. 2A to 2E are sectional views showing a manufacturing process of a conventional example. 1 ... Silicon substrate, 2, 4, 9 ... Silicon oxide film (PSG), 3
...... Lower layer Al wiring, 5 ...... photoresist, 6 ...... through hole, 7 …… Polymer (etching byproduct), 8 ……
Upper layer Al wiring, 10 ... Plasma silicon nitride film.

Claims (2)

[Claims] 1. A step of depositing a first conductive layer on a semiconductor substrate directly or via an intermediate layer; a step of depositing an inorganic interlayer insulating film on the first conductive layer; Insulating film,
Using an organic photoresist mask, a step of opening by dry etching, a step of heat treatment for removing the by-product polymer generated in the step of dry etching after the opening, and a step of covering the opening by the first step 2. A method for manufacturing a semiconductor device, comprising the step of depositing a second conductive layer. 2. The semiconductor device according to claim 1, wherein the heat treatment step is performed in a temperature range of 300 ° C. to 500 ° C. in an atmosphere of an inert gas or a mixed gas containing an inert gas. Manufacturing method.