JPH0779215A - Data reception processing method for remote equipment - Google Patents

Abstract

PURPOSE:To provide a data reception processing method of a remote equipment for accelerating the time for reception-processing data by a master station in the data reception processing method of the remote equipment for which plural loads and plural slave stations are connected with the master station by different transmission lines. CONSTITUTION:For the connection of the group of the respective loads 21-2n and the group of the respective slave stations 31-3n and the master station 1, the group of the plural loads 21-2n is connected through one transmission line 2 and the group of the plural slave stations 31-3n are connected through the other transmission line 3. While the master station 1 receives the data from the group of the plural loads by each frame and stores them in an input register 52 everytime, the master station 1 intermittently receives the data from the group of the plural slave stations 31-3n in a time-division manner with one frame as a unit, correspondingly obtains load data stored in the input register 52, performs processings from slave station data and the corresponding load data and obtains required output.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a single transmission line between a master station having a plurality of loads for transmitting and receiving data for each load and a plurality of slave stations operating independently of the loads. The present invention relates to a data reception processing method in which a master station receives and processes data from a plurality of loads and data from a plurality of slave stations in a remote device that transmits and receives data through the.

A master station processes data received from a plurality of loads and a plurality of slave stations operating independently of the loads, and intermittent reception from a plurality of slave stations in units of one frame. It is required to shorten the reception interval of the received data.

Therefore, transmission and reception of data between a master station having a plurality of loads connected to the master station for each load by a transmission line and a plurality of slave stations operating independently of the loads through one transmission line. However, when the master station processes one frame of data received from a plurality of slave stations, it sends a data transmission request signal to each load and receives data of each load. , The reception interval of data intermittently received from a plurality of slave stations in units of one frame becomes longer,
It takes a long time to process the data of multiple slave stations and the data of each load. Therefore, it is necessary to shorten the reception interval of the data intermittently received from a plurality of slave stations in units of one frame and to shorten the time for processing the data of the plurality of slave stations and the data of each load.

[0004]

2. Description of the Related Art A conventional technique will be described with reference to FIGS. 9 is a connection configuration diagram of a conventional example, FIG. 10 is a frame configuration diagram of the conventional example, FIG. 11 is an operation flowchart of the conventional example, and FIG. 12 is a time chart of a reception data processing unit of a processing circuit of the conventional example.

In the conventional remote device, as shown in FIG. 9, loads _{1, 2,} ..., _N : 71, 72 ,.
n is the master station 4 and the transmission lines L ₁ , L ₂ , ..., L _n : 8
, 8n are connected for each load.
Also, slave stations ₁ , ₂ , ..., _M : 91, 92 ,.
9 m is connected to the master station 4 through one transmission line L ₀ 5.

Here, the master station 4, as shown in FIG. 11, first of all, the slave stations _{1, 2,} ..., _M : 91, 92, ...
・ From 9m, data B ₁₁ , B _21, ...
, B _m1 is received in a time division manner (step 300).

Next, the master station 4 loads each load _{1, 2,} ...
, _N : 71, 72, ..., 7n, as shown in FIG. 10, data transmission request signals A _11s, A _21s, ..., A _n1s are transmitted in a time division manner, and data A _11r, A from the load is transmitted. _21r, ..., A
_n1r is received in a time division manner (steps 302 to 305).

Thereafter, the master station 4 receives the slave station data B ₁₁ , B.
_21, ..., B _m1 and corresponding load data A _11r,
A _21r, ···, processes A _N1R, obtain the required output (step 306).

In this way, the master station 4, each slave station _{1, 2,}
..., _m : 91, 92, ..., 9 m, each load ₁ , ...
_2, ..., _N : 71, 72, ..., 7n perform the above operation (steps 300 to 306) until the master station 4 completes the data receiving operation (step 307).

However, each slave station _{1, 2,} ..., _M : 9
1 frame Ti received from 1, 92, ..., 9 m
When the master station 4 processes the data B _1i, B _2i , ..., B _mi of b, each load _{1, 2,} ..., _N : 71, 72, ...
_.. , 7n Data transmission request signal A _1is, A _2is, ..., A
_nis is transmitted and the load data A _1ir, A _2ir , ...,
Since A _nir is received, data B _1i, B _2i , ..., B intermittently received in units of one frame from a plurality of slave stations.
The reception interval of _mi becomes long, and the time for processing the data of multiple slave stations and the data of the corresponding load becomes slow.

FIG. 12 shows a time chart of the reception data processing section of the processing circuit of the master station 4 of the conventional example. Here, the selected data Qbs of the data Qb intermittently received in a unit of one frame from a plurality of slave stations and the selected data Qas of the received data Qa from the load are processed to generate a processing result Qc. . The processing result Qc is the load group selection signal Qas.
You can get it later.

The received signal Qb from the slave station group and the slave station group selection signal Qbs may be the same data.

[0013]

Therefore, each load is
_{1, 2,} ..., _n: 71 and 72, ..., not even be received if capable master station 4 receives the data at all times from 7n, each slave station _{1, 2,} ..., _m : 91, 92, ...
_.., the reception interval of the data B _1i, B _2i , ..., B _mi that is received later than the data received from 9 m and is intermittently received in units of one frame from these plural slave stations, There was a problem that the processing time of data of multiple slave stations and data of each load was delayed.

Further, as shown in FIG. 9, each load _{1, 2,} ...
_{··, n: 71,72, ···,} 7n transmission line for each load the master station _{4 L 1, L 2, ···} , L n: 81,82, ·
.., 8n, so there is a problem that the number of wirings is large and the wiring area is wide.

The present invention solves the above problem by narrowing the wiring area by connecting the master station and each load with one transmission line, and intermittently receiving from a plurality of slave stations in units of one frame. Data reception from the remote device, which makes it possible to continuously receive data from the load, shorten the reception interval of slave station data, and speed up the processing of multiple slave station data and each load data. It is intended to provide a processing method.

[0016]

FIG. 1 is a block diagram of the principle of the present invention, in which 1 is a master station, 21 to 2n are loads, and 31 to 3m.
Is a slave station, and 52 is an input register.

The present invention is based on the master station 1 and a plurality of loads.₁，₂・ ・ ・
....._n: 21, 22, ..., 2n, and
Master station 1 and the load₁，₂・ ・ ・ ・ ・ ・_n: 21, 22, ...
..Several slave stations that operate independently of 2n₁，₂・ ・ ・
..,_m: 31, 32, ...
In the data reception processing method of the remote device that sends and receives data
The load through one transmission line 2.₁，₂・ ・ ・
..,_n: 21, 22, ..., 2n and the master station (1)
Connected to the slave station through one transmission line 3.₁， ₂・ ・ ・
....._m: 31, 32, ..., 3m connected to the master station 1
To continue.

Then, the master station 1 loads the loads ₁ , ₂ , ...
·, _N: 21, 22, · · ·, and receive data at all times from 2n, the data together with storing each frame in the input register 52 every time the reception, the child station _{1, 2,} · · ·, _m :
Data is intermittently received for each frame in a time division manner from 31, 32 ,.

Then, the load data stored in the input register 52 is obtained continuously from the slave station data, and processing is performed from the slave station data and the load data corresponding to the slave station data.
The purpose can be achieved by obtaining the required output.

As another method, the master station 1 uses the plurality of loads ₁ , ₂ , ..., _N : 21, 22, 22 ,.
Data is constantly received from 2n, and the data is stored in the input register 52 for each frame at each reception, and the slave stations ₁ , ₂ , ..., _M : 31, 32, ...
・ From 3m, data is intermittently received for each frame in time division.

When it is necessary to process the slave station data and the load data to obtain data, the load data stored in the input register 52 is obtained continuously from the slave station data, and the slave station data is obtained. When processing is performed from station data and load data corresponding to the slave station data to obtain a necessary output, but when it is not necessary to process slave station data and load data to obtain data,
Process only slave station data.

[0022]

In the present invention, as shown in the frame configuration diagram of the present invention in FIG. 2, the master station 1 loads the load ₁ through _one transmission line 2,
₂ , ..., _N : 21, 22, ..., 2n
Slave stations ₁ , ₂ , ... through the other transmission line 3
., _M : 31, 32, ..., 3 m are connected to receive data from each in time division.

Here, a plurality of slave stations ₁ , ₂ , ..., _M :
Received signals Sb from 31, 32, ..., 3m are signals B _1i, B from respective slave stations in units of one frame.
_2i, · · ·, is constituted by the B _mi, it is intermittently received for each frame.

Then, processing is performed according to the operation flowchart as shown in the operation flowchart of the present invention in FIG. First, the master station 1 loads each load ₁ , ₂ , ..., _N : 21,
, ..., 2n are always received, and the received data is stored in the input register 52 for each frame each time it is received (step 100).

In parallel with this, the master station 1 has each slave station ₁ ,
₂ , ..., _M : 31, 32, ..., 3m from 1 m, and intermittently receives data in units of one frame composed of signals B _1i, B _2i , ..., B _mi from each slave station. (Step 101).

Next, the master station 1 continues from each slave station data in units of one frame, and outputs each load data A _1i from the input register 52 as shown in the serial input Ss in the preceding stage of the processing circuit of FIG. _, A _2i , ..., A _ni are obtained (step 1
02).

After that, the master station 1 transmits the slave station data B _1i, B
_2i, ···, B _mi and load data A _1i corresponding to this data, A _2i, ···, processes the A _ni, to obtain the required output (step 103).

Master station 1 and each slave station₁，₂・ ・ ・ ・ ・ ・_m:
3, 32, ..., 3m and each load ₁，₂・ ・ ・
..,_n: 21, 22, ..., 2n are data from the master station 1.
The above operation (step 100
10 to 103) are repeated (step 104).

Another method of the present invention is as shown in another frame configuration diagram of the present invention of FIG. 3 in the configuration of FIG. The master station 1 has a plurality of slave stations ₁ , ₂ , ..., _M : 3
1, 32, ..., 3m and multiple loads ₁ , ₂ , ...
., _N : Receive data from 21, 22, ..., 2n in a time division manner. Here, a plurality of slave stations ₁ , ₂ , ..., _M :
Received signals Sb from 31, 32, ..., 3m are in units of one frame, and signals B _{1i ,} B from the respective slave stations are provided.
_2i, · · ·, is constituted by the B _mi, it is intermittently received for each frame.

The operation of another method according to the present invention will be described with reference to another operation flowchart of the present invention shown in FIG. First, the master station 1 loads each load ₁ , ₂ , ..., _N : 21,
, ..., 2n are always received, and the received data is stored in the input register 52 each time it is received (step 200).

In parallel with this, the master station 1 has each slave station ₁ ,
₂ , ..., _M : 31, 32, ..., 3m from 1 m, and intermittently receives data in units of one frame composed of signals B _1i, B _2i , ..., B _mi from each slave station. (Step 201).

Next, the master station 1 processes the slave station data and the load data, and determines whether or not it is necessary to obtain the data (step 202). When it is necessary, as shown in the serial input Ss in the preceding stage of the processing circuit of FIG. 3, the load data A _1i, A from the input register 52 is continuously added to each slave station data in units of one frame. _2i , ..., A _ni are obtained (step 20
3).

After that, the master station 1 transmits the slave station data B _1i, B
_2i , ..., B _mi and corresponding load data A _1i,
A _2i, ···, processes the A _ni, obtain the required output (step 204).

In the case where the master station 1 does not need to process the slave station data and the load data to obtain the data,
Only the slave station data in units of one frame are processed (step 205). In FIG. 3, the slave station data is B _11, B.
One frame T1 of ₂₁ , ..., B _m1 and one frame T2 of the slave station data of B _12, B ₂₂ , ..., B _m2 correspond to this case. Therefore, there is no load data in these two frames.

Master station 1, each slave station₁，₂・ ・ ・ ・ ・ ・_m:
3, 32, ..., 3m, each load ₁，₂・ ・ ・
..,_n: 21, 22, ..., 2n
The master station 1 ends the data receiving operation at steps 200 to 205).
Repeat until it is completed (step 206).

As described above, in the present invention, as shown in the frame configuration diagram of FIG. 2, for each serial input Ss in the preceding stage of the processing circuit, each slave station ₁ , ₂ , ..., _M : 31, 32, ...
_.., signals B _1i, B _2i , ..., B received from 3 m
Immediately after one frame Tib composed of _mi , each load ₁ , ₂ , ..., _N : 21, 22, 22 ,.
Since one frame Tia of the signals A _1i, A _2i , ..., A _ni received from 2n is combined, the reception interval of the slave station data in units of one frame should be shorter than the conventional example shown in FIG. Therefore, it is possible to shorten the time for processing the data of a plurality of slave stations and the data of each load.

This will be described with reference to FIG. Figure 8 is the master station
The time chart of the reception data processing part of the processing circuit of No. 1 is shown.
However, intermittent reception from multiple slave stations in units of one frame
Data Qb, that is, B_1i,B _2i・ ・ ・ ・ ・ ・, B_mi
Of the selected data Qbs and the received data from the load.
Data Qa, that is, A_1i,A_2i・ ・ ・ ・ ・ ・ A_niIs processed
Processing result Qc is generated. Here, the data Qbs is
It may be the data Qb itself.

The processing result Qc is the received signal Q from the load group.
It occurs from the section where a appears as the serial input Ss in the preceding stage of the processing circuit. That is, compared to the conventional example shown in FIG. 12, it is possible to shorten the reception interval of the slave station data in units of one frame, and to shorten the time for processing the data of a plurality of slave stations and the data of each load. it can.

According to another method of the present invention, as shown in steps 202 to 205 of the other operation flowchart of the present invention of FIG. 5, the slave station data and the corresponding load data are processed to obtain a required output, Alternatively, since the required output can be obtained by processing only the slave station data, the received slave station data can be used more widely than in the case of the first method.

[0040]

EXAMPLE An example will be described with reference to FIGS. Figure 6
Is an embodiment of the master station of the present invention, FIG. 7 is a reception data processing section of the processing circuit, and FIG. 8 is an output Qa of the shift register of FIG.
It is a time chart of the reception data processing unit of the processing circuit that performs the processing of Qb.

6 and 7, the same reference numerals as those in FIG. 1 indicate the same components, 50 and 51 are bidirectional buffers, 53 is a mode setting circuit, 54 is a control circuit, 55 and 58 are OR circuits, 5
6 is an AND circuit, 57 is a NAND circuit, 59 is a shift register, 60 and 62 are processing circuits, 61 is a selector, 63
Is an output circuit.

In FIG. 6, the bidirectional buffer 50 is connected to the slave station groups ₁ , ₂ , ..., _M : 31, 32, ..., 3m by the transmission line Lb, and the bidirectional buffer 51 is loaded. , _N : 21, 22, ..., 2n are connected to the groups ₁ and _{2 by} a transmission line La.

Now, from the slave station group, signals such as S10 in FIG. 2, that is, one frame Tib as a unit, are composed of signals B _1i, B _2i , ..., B _mi from each slave station. A signal that is intermittently received is received every frame.

On the other hand, load groups ₁ , ₂ , ..., _N : 21,
22, ..., from 2n, which receives the data at all times, the data A _1i from each load these data into the input register 52 every time the _reception, A _2i, ..., it is composed of A _ni Stored for each frame. And the input register 5
As shown in FIG. 2, the second output signal S11 corresponds to the signal from the slave station group and is continuously output in time.

These operations will be described below. The signal S6 is a clock signal for operating the input register 52. When the signal S7 = 1, the data of the input register 52 is always replaced as the data of the received signal S9 from the load group.

Immediately after one frame of slave station data has been generated in the reception signal S10 from the slave station group, the signal S7 is changed from 0 to 1 and the load data S11 corresponding to this data is changed from the input register 52 to that of FIG. Make sure to output on time. The timing of this switching is determined by the control circuit 54 by the signal S15 from the mode setting circuit 53. The signal S15 is a signal that determines the number of bits of Tib and Tia in FIGS. When the input register 52 receives one frame composed of the data A _1i, A _2i , ..., A _ni from each load, the NAND circuit 57 causes the signal S 8 to be output.
Changes from 1 to 0.

Here, when S7 = 0, one frame of data is stored in the input register 52. Then the signal S
When 7 changes from 0 to 1, this 1-frame data is output as a signal S11.

For example, in FIG. 3, when all the bits of Tia are 0, the clear signal S5 of the input register 52 is set to 0 for that time period. The signal S12 output from the OR circuit 58 is the signal B from each slave station.
_1i, B _2i , ..., Signal S10 in units of one frame Tib consisting of B _mi and signals A _1i, A _2i , ...
.., A _ni and the signal S11 in units of one frame Tia, which is shown as the serial input Ss (S12) in the preceding stage of the processing circuit in FIG.

The signal S12 is serially input to the shift register 59 and output in parallel as Qb and Qa. Qb and Qa are each a plurality of bits, and Qb is the signal S10.
In parallel to the processing circuit 60 as a signal S13, and
Qa inputs the signal S11 as a signal S14 to the processing circuit 60 in parallel.

As shown in FIG. 8, the received signal Qb from the group of slave stations, that is, B _1i, B _2i , ..., B _mi, is processed by the processing circuit 60.
Received signal Qa from the load group, that is, A
_{1 i,} A _2i , ..., A _ni are successively processed, and a processing result Qc is produced. At this time, the processing result Q
c is generated from the section where the received signal Qa from the load group appears as the serial input Ss in the preceding stage of the processing circuit 60. That is,
As compared with the conventional example shown in FIG. 12, it is possible to shorten the time for processing the data of a plurality of slave stations and the data of each load.

Here, the received data processing section of the processing circuit 60 will be described with reference to FIG. Received signal Qb from slave stations
The selector 61 selects the signal S15 output from the mode setting circuit 53 as a selector signal and becomes the slave station group selection signal Qbs.

The slave station group selection signal Qbs may be exactly the same as the received signal Qb from the slave station group. The slave station group selection signal Qbs and the received signal Qa from the load group are processed by the processing circuit 62,
The processing result is Qc. The processing result Qc is input to the output circuit 63, and processing such as data display is performed.

The output signal S16 from the processing circuit 60
And S17 are signals for requesting the slave station group and the load group to transmit data, respectively, and are signals S1 from the mode setting circuit 53.
The content is determined by 5.

[0054]

As described above, according to the present invention,
Regarding the serial input in the preceding stage of the processing circuit, the signal received from each slave station in units of one frame is immediately followed by the signal in units of one frame received from each load, so that one frame is input. It is possible to shorten the reception interval of the slave station data in units of, and to shorten the time for processing the data of a plurality of slave stations and the data of each load.

In another method of the present invention, the slave station data and the corresponding load data can be processed to obtain the required output, or only the slave station data can be processed to obtain the required output. , The received slave station data can be widely used.

Further, since the master station and each load are connected by one transmission line, there is an effect that the wiring area can be narrowed.

[Brief description of drawings]

FIG. 1 is a principle configuration diagram of the present invention.

FIG. 2 is a frame configuration diagram of the present invention.

FIG. 3 is another frame configuration diagram of the present invention.

FIG. 4 is an operation flowchart of the present invention.

FIG. 5 is another operation flowchart of the present invention.

FIG. 6 is a diagram showing an embodiment of a master station of the present invention.

FIG. 7 is a diagram showing a received data processing unit of a processing circuit.

FIG. 8 is a time chart of the reception data processing unit of the processing circuit.

FIG. 9 is a connection configuration diagram of a conventional example.

FIG. 10 is a frame configuration diagram of a conventional example.

FIG. 11 is an operation flowchart of a conventional example.

FIG. 12 is a time chart of the reception data processing unit of the processing circuit of the conventional example.

[Explanation of symbols]

 1,4 Master station 2,3,5 Transmission line 21,22, ..., 2n Load 31,32, ..., 3m Slave station 50,51 Bidirectional buffer 52 Input register 53 Mode setting circuit 54 Control circuit 55, 58 OR circuit 56 AND circuit 57 NAND circuit 59 shift register 60, 62 processing circuit 61 selector 63 output circuit 71, 72, ..., 7n load 81, 82, ..., 8n transmission line 91, 92 ,. .., 9m slave station

Claims (2)

[Claims] 1. A master station (1) and a plurality of loads ₁ , ₂ , ...
, _N (21, 22, ..., 2n) and between the master station (1) and the loads ₁ , ₂ , ..., _N (21, 22, 22).
..., 2n) and data of a remote device that transmits and receives data among a plurality of slave stations ₁ , ₂ , ..., _m : 31, 32, ..., 3m) that operate independently of each other. In the reception processing method, the load ₁ , ₂ , ... Is passed through one transmission line (2).
, _N (21, 22, ..., 2n) and the master station (1) are connected, and the slave stations ₁ , ₂ , ..., _m are connected through one transmission line (3). : 31,32, ..., connects the 3m) and parent station (1), said parent station (1), said load _{1, 2, ···, n (} 21,2
2, ..., 2n), always receives the data, stores the data in the input register (52) for each frame at the time of reception, and the master station (1) stores the slave stations ₁ , ₂ ,. .....
Data from _m (31, 32, ..., 3m) is intermittently received for each frame in a time division manner, the load data is obtained from the input register (52) continuously to the slave station data, and the slave station A data reception processing method for a remote device, characterized by performing processing from data and the load data corresponding to the slave station data to obtain a required output. 2. The master station (1) comprises a plurality of the loads ₁ ,
₂ , ..., _N (21, 22, ..., 2n) are constantly receiving data, and the data is stored in the input register (52) for each frame at each reception.
Parent station (1) is the child station _{1, 2, ···, m (} 31,3
2, ..., 3 m), the data is intermittently received for each frame in a time division manner, and when it is necessary to process the slave station data and the load data to obtain the data, the slave station data is continuously transmitted. Then, the load data is obtained from the input register (52), the slave station data and the load data corresponding to the slave station data are processed, necessary outputs are obtained, and the slave station data and the load data are processed. 2. The data reception processing method for a remote device according to claim 1, wherein only the slave station data is processed when it is not necessary to obtain the data.