JPH0779057A - Circuit board - Google Patents

Circuit board

Info

Publication number
JPH0779057A
JPH0779057A JP22295693A JP22295693A JPH0779057A JP H0779057 A JPH0779057 A JP H0779057A JP 22295693 A JP22295693 A JP 22295693A JP 22295693 A JP22295693 A JP 22295693A JP H0779057 A JPH0779057 A JP H0779057A
Authority
JP
Japan
Prior art keywords
land
hole
wire
circuit board
jumper
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP22295693A
Other languages
Japanese (ja)
Inventor
Hideki Matsuo
秀樹 松尾
Hiroshi Isobe
浩史 磯部
Hiroko Shirai
裕子 白井
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Sony Corp
Original Assignee
Sony Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sony Corp filed Critical Sony Corp
Priority to JP22295693A priority Critical patent/JPH0779057A/en
Publication of JPH0779057A publication Critical patent/JPH0779057A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/30Assembling printed circuits with electric components, e.g. with resistor
    • H05K3/32Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits
    • H05K3/34Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits by soldering
    • H05K3/3447Lead-in-hole components
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/40Forming printed elements for providing electric connections to or between printed circuits
    • H05K3/4038Through-connections; Vertical interconnect access [VIA] connections

Landscapes

  • Printing Elements For Providing Electric Connections Between Printed Circuits (AREA)
  • Electric Connection Of Electric Components To Printed Circuits (AREA)

Abstract

PURPOSE:To obviate the process to turn a board when mounting jumper wires on a board to cut down the manufacture cost by extending the land on the wire insertion side to the jumper end climping side. CONSTITUTION:This board is provided with the first through hole 23 where the land 22 to connect with a wiring pattern 28 on surface side is exposed in the vicinity of its opening on surface side. This is further provided with the second through hole 25 where the land 24 to connect with a wiring pattern 29 on the rear side is exposed in the vicinity of its opening on rear side. Next, each end of a jumper wire 27 is inserted into the first through hole 23 and the second through hole 25 respectively and then bent to form a center 27a and bent part 27b and 27c, and the tip of the turn 27c is positioned below the second land 24b. Next, cream solders 30 and 31 are applied to cover the openings of the first and second through holes 23 and 25 from the surface side of the board 26 so as to solder them by reflow. At this time, the cream solder 30 melts to connect the land 22 with the wire 27, and the cream solder 31 melts to flow to its rear side, along the wire 27, and enters between the bent part 27c and the land 24b so as to connect the land 24 with the wire 27.

Description

【発明の詳細な説明】Detailed Description of the Invention

【0001】[0001]

【産業上の利用分野】本発明は、ジャンパワイヤによっ
て電気的に接続された配線パターンをその表裏面に有す
る基部材を備えた回路基板に関するものである。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a circuit board having a base member having wiring patterns electrically connected by jumper wires on its front and back surfaces.

【0002】[0002]

【従来の技術】近年における電子機器の多機能化に伴
い、回路基板の表裏面に形成された各配線パターンは高
密度化されている。
2. Description of the Related Art As electronic devices have become multifunctional in recent years, each wiring pattern formed on the front and back surfaces of a circuit board has been densified.

【0003】このような各配線パターンは、回路基板を
挿通するジャンパワイヤによって互いに接続されること
がある。
Such wiring patterns may be connected to each other by jumper wires inserted through the circuit board.

【0004】従来、この種の配線パターンおよびジャン
パワイヤを有する回路基板は、図3に示すように構成さ
れている。
Conventionally, a circuit board having this type of wiring pattern and jumper wires is constructed as shown in FIG.

【0005】これを同図に基づいて説明すると、同図に
おいて、符号1で示す回路基板は、表側開口周縁にラン
ド2が露呈する第1貫通孔3および裏側開口周縁にラン
ド4が露呈する第2貫通孔5を有する基部材6と、この
基部材6の両ランド2,4に半田付けされかつ前記両貫
通孔3,5を挿通して折り返し形成されたジャンパワイ
ヤ7とによって構成されている。
This will be described with reference to FIG. 1. In FIG. 1, the circuit board indicated by reference numeral 1 has a first through hole 3 in which a land 2 is exposed at the peripheral edge of the front side and a land 4 in which a land 4 is exposed at the peripheral edge of the back side. The base member 6 has two through holes 5, and the jumper wire 7 soldered to both lands 2 and 4 of the base member 6 and inserted through the through holes 3 and 5 and folded back. .

【0006】また、図中符号8および9は各ランド2,
4にジャンパワイヤ7を電気的に接続するための半田
(クリーム半田)である。
Further, reference numerals 8 and 9 in the figure denote each land 2, respectively.
4 is a solder (cream solder) for electrically connecting the jumper wire 7 to the wire 4.

【0007】なお、両ランド2,4には、各々基部材6
の一方側面と他方側面に形成された配線パターン10,
11が接続されている。
The base members 6 are provided on both lands 2 and 4, respectively.
Wiring patterns 10 formed on one side surface and the other side surface,
11 is connected.

【0008】また、各貫通孔3,5の表側開口周縁およ
び裏側開口周縁は、基部材6に対するジャンパワイヤ7
の実装状態において各々ワイヤ中央部7a側とワイヤ折
り返し部7b,7c側にあるものとする。
The front side opening peripheral edge and the back side opening peripheral edge of each through-hole 3, 5 have jumper wires 7 for the base member 6.
In the mounted state, they are located on the wire central portion 7a side and the wire folded portions 7b and 7c side, respectively.

【0009】このように構成された回路基板1におい
て、基部材6の各ランド2,4にジャンパワイヤ7を半
田実装するには、ジャンパワイヤ7の各端部を第1貫通
孔3と第2貫通孔5に挿通させて折り返し形成し、次い
で図4(A)に示すようにランド2にクリーム半田8を
塗布し、しかる後同図(B)に示すように基部材6を反
転させてから、ランド4にクリーム半田9を塗布し、こ
の基部材6をリフロー炉(図示せず)内に収容すること
により行う。
In the circuit board 1 thus constructed, in order to mount the jumper wires 7 on the lands 2 and 4 of the base member 6 by soldering, the respective ends of the jumper wires 7 are connected to the first through holes 3 and the second through holes 3. It is inserted through the through-hole 5 and folded back, and then the cream solder 8 is applied to the land 2 as shown in FIG. 4 (A), after which the base member 6 is inverted as shown in FIG. 4 (B). The solder paste 9 is applied to the land 4, and the base member 6 is housed in a reflow oven (not shown).

【0010】[0010]

【発明が解決しようとする課題】ところで、この種の回
路基板においては、各ランド2,4に対する半田8,9
の塗布が基部材6の各パターン側から行われるものであ
るため、回路基板1の製造には基部材6を反転させる工
程を含ませる必要があった。この結果、製造工程数が嵩
み、コスト高になるという問題があった。
By the way, in this type of circuit board, the solder 8, 9 for each land 2, 4 is used.
Since the coating is applied from each pattern side of the base member 6, it is necessary to include a step of reversing the base member 6 in manufacturing the circuit board 1. As a result, there is a problem in that the number of manufacturing steps increases and the cost increases.

【0011】本発明はこのような事情に鑑みてなされた
もので、基板製造時に基部材を反転させる工程を不要な
ものとすることができ、もって製造コストの低廉化を図
ることができる回路基板を提供するものである。
The present invention has been made in view of the above circumstances, and the step of inverting the base member at the time of manufacturing the board can be eliminated, and thus the manufacturing cost can be reduced. Is provided.

【0012】[0012]

【課題を解決するための手段】本発明に係る回路基板
は、第1貫通孔の表側開口周縁に露呈するランドおよび
第2貫通孔の裏側開口周縁に露呈するランドのうちワイ
ヤ挿通側のランドをジャンパワイヤの折り返し側で延在
させたものである。
A circuit board according to the present invention has a land exposed on the front opening edge of the first through hole and a land on the wire insertion side of lands exposed on the back opening edge of the second through hole. The jumper wire is extended on the folded side.

【0013】[0013]

【作用】本発明においては、リフロー半田付け時に第1
貫通孔および第2貫通孔の各表側開口周縁上の塗布半田
が溶融し、これら各溶融半田のうち一方側の溶融半田に
よって第2貫通孔の表側開口周縁に露呈するランドとジ
ャンパワイヤが接続されると共に、第2貫通孔を挿通す
るジャンパワイヤに沿って流れた他方側の溶融半田によ
って第2貫通孔の裏側開口周縁に露呈する延在部を含む
ランドとジャンパワイヤが接続される。
In the present invention, when the reflow soldering is performed, the first
The applied solder on the peripheral edge of the front side opening of the through hole and the second through hole is melted, and the molten solder on one side of the molten solder connects the land and the jumper wire exposed on the peripheral edge of the front side opening of the second through hole. At the same time, the jumper wire is connected to the land including the extending portion exposed at the back side opening peripheral edge of the second through hole by the molten solder on the other side flowing along the jumper wire passing through the second through hole.

【0014】[0014]

【実施例】以下、本発明の構成等を図に示す実施例によ
って詳細に説明する。
Embodiments of the present invention will be described in detail below with reference to embodiments shown in the drawings.

【0015】図1(A)および(B)は本発明に係る回
路基板を示す縦断面図と下面図である。
1A and 1B are a vertical sectional view and a bottom view showing a circuit board according to the present invention.

【0016】同図において、符号21で示すものは例え
ば3.5インチマイクロフロッピィディスク装置に使用
される回路基板で、表側開口周縁にランド22が露呈す
る第1貫通孔(以下、「第1ベアホール」と称する。)
23および裏側開口周縁にランド24が露呈する第2貫
通孔(以下、「第2ベアホール」と称する。)25を有
する基部材26と、この基部材26の両ランド22,2
4に半田付け実装されかつ前記両ベアホール23,25
を挿通して折り返し形成されたジャンパワイヤ27とに
よって構成されている。
In FIG. 1, reference numeral 21 denotes a circuit board used in, for example, a 3.5-inch micro-floppy disk device, which has a first through hole (hereinafter, referred to as "first bare hole") in which a land 22 is exposed at a peripheral edge of a front side opening. ".")
23 and a base member 26 having a second through hole (hereinafter, referred to as “second bare hole”) 25 in which the land 24 is exposed at the periphery of the back side opening, and both lands 22, 2 of the base member 26.
4 is soldered and mounted on both of the bare holes 23 and 25.
And a jumper wire 27 formed by folding back.

【0017】この回路基板に21の基部材26には、前
記両ランド22,24に各々接続する表面側の配線パタ
ーン28と裏面側の配線パターン29が形成されてい
る。
On the base member 26 of the circuit board 21, a wiring pattern 28 on the front surface side and a wiring pattern 29 on the back surface side which are respectively connected to the lands 22 and 24 are formed.

【0018】一方、この回路基板21のジャンパワイヤ
27には、前記基部材6に対するワイヤ実装状態におい
て前記第1ベアホール23の表側開口周縁側および前記
第2ベアホール25の裏側開口周縁側に各々位置するワ
イヤ中央部27aとワイヤ折り返し部27b,27cが
設けられている。
On the other hand, the jumper wires 27 of the circuit board 21 are respectively positioned on the front side opening peripheral edge side of the first bare hole 23 and the back side opening peripheral edge side of the second bare hole 25 in a wire mounted state on the base member 6. A wire central portion 27a and wire folding portions 27b and 27c are provided.

【0019】さて、この回路基板21上の両ランド2
2,24のうちジャンパワイヤ挿通側のランド24は、
前記第2ベアホール25の裏側開口周縁に露呈する環状
の第1ランド部24aおよびこの第1ランド部24aに
前記ジャンパワイヤ27のワイヤ折り返し部(先端)側
で延設され先端に向かってランド幅が小さくなる第2ラ
ンド部24bによって構成されている。
Now, both lands 2 on this circuit board 21
The land 24 on the jumper wire insertion side of 2, 24 is
An annular first land portion 24a exposed at the back side opening peripheral edge of the second bare hole 25 and a wire folding portion (tip) side of the jumper wire 27 extending to the first land portion 24a so that the land width becomes closer to the tip. It is configured by the smaller second land portion 24b.

【0020】このランド24の第2ランド部24bは先
端部が円弧状に形成されており、この円弧部先端から前
記第2貫通孔25に中心までの距離が1.75mmの寸
法に設定されている。
The tip of the second land portion 24b of the land 24 is formed in an arc shape, and the distance from the tip of the arc portion to the center of the second through hole 25 is set to 1.75 mm. There is.

【0021】このランド24の第1ランド部24aおよ
び前記ランド22の外径は、2.0mmの寸法に設定さ
れている。
The outer diameters of the first land portion 24a of the land 24 and the land 22 are set to 2.0 mm.

【0022】また、前記第1ベアホール23および前記
第2ベアホール25の口径は1.0mmの寸法に設定さ
れており、前記ジャンパワイヤ27の外径は0.6mm
の寸法に設定されている。
The diameters of the first bare hole 23 and the second bare hole 25 are set to 1.0 mm, and the outer diameter of the jumper wire 27 is 0.6 mm.
Has been set to the dimensions of.

【0023】なお、図中符号30および31は各ランド
22,24にジャンパワイヤ27を電気的に接続するた
めのクリーム半田である。
Reference numerals 30 and 31 in the drawing are cream solders for electrically connecting the jumper wires 27 to the lands 22 and 24.

【0024】次に、本実施例における回路基板を製造す
る手順につき、図2(A)〜(D)を用いて説明する。
Next, the procedure for manufacturing the circuit board in this embodiment will be described with reference to FIGS.

【0025】先ず、同図(A)に示すように基部材26
に表面側の配線パターン28と裏面側の配線パターン2
9を形成すると共に、これら両配線パターン28,29
のうち表面側の配線パターン28に接続するランド22
が表側開口周縁に露呈する第1ベアホール22および裏
面側の配線パターン29に接続するランド24が裏側開
口周縁に露呈する第2ベアホール25を設ける。
First, as shown in FIG.
The wiring pattern 28 on the front side and the wiring pattern 2 on the back side
9 is formed, and both wiring patterns 28 and 29 are formed.
Of the land 22 connected to the wiring pattern 28 on the front surface side
The first bare hole 22 exposed at the peripheral edge of the front opening and the second bare hole 25 exposed at the peripheral edge of the rear opening of the land 24 connected to the wiring pattern 29 on the rear surface side are provided.

【0026】次いで、同図(B)に示すようにジャンパ
ワイヤ27の各ワイヤ端部を第1ベアホール23と第2
ベアホール25に挿通させて折り返すことによりワイヤ
中央部27aとワイヤ折り返し部27b,27cを形成
する。
Next, as shown in FIG. 3B, the wire ends of the jumper wire 27 are connected to the first bare hole 23 and the second bare hole 23, respectively.
The wire central portion 27a and the wire folded portions 27b and 27c are formed by inserting the wire into the bare hole 25 and folding it back.

【0027】このとき、両ワイヤ折り返し部27b,2
7cのうちワイヤ折り返し部27cの先端は、ランド2
4の第2ランド部24bの下方に位置付けられる。
At this time, both wire folding portions 27b, 2
Of the wire 7c, the tip of the wire return portion 27c has a land 2
4 is located below the second land portion 24b.

【0028】しかる後、同図(C)に示すように基部材
26に表面側(ランド22の側)からクリーム半田3
0,31を第1ベアホール23と第2ベアホール25の
各開口部を覆うように塗布する。
Thereafter, as shown in FIG. 3C, the cream solder 3 is applied to the base member 26 from the surface side (land 22 side).
0 and 31 are applied so as to cover the openings of the first bare hole 23 and the second bare hole 25.

【0029】そして、同図(D)に示すようにジャンパ
ワイヤ付きの基部材26をリフロー炉(図示せず)内に
収容することにより、各ランド22,24にジャンパワ
イヤ27を半田付けする。
Then, as shown in FIG. 7D, the jumper wire 27 is soldered to the lands 22 and 24 by accommodating the base member 26 with the jumper wire in a reflow furnace (not shown).

【0030】このとき、クリーム半田30が溶融してラ
ンド22とジャンパワイヤ27を接続すると共に、クリ
ーム半田31が溶融して第2ベアホール25を挿通する
加熱中のジャンパワイヤ27に沿って基部材26の表面
側から裏面側に流れ、ワイヤ折り返し部27cと第2ラ
ンド部24bとの間に入り込みランド24とジャンパワ
イヤ27を接続する。
At this time, the cream solder 30 is melted to connect the land 22 and the jumper wire 27, and the cream solder 31 is melted and inserted into the second bare hole 25. The base member 26 is inserted along the heated jumper wire 27. Flows from the front surface side to the back surface side, enters between the wire folded portion 27c and the second land portion 24b, and connects the land 24 and the jumper wire 27.

【0031】すなわち、各側のランド22,24に対す
るジャンパワイヤ27の接続は、基部材26の片側面の
みにクリーム半田30,31を塗布して行われる。
That is, the jumper wires 27 are connected to the lands 22 and 24 on each side by applying the cream solders 30 and 31 to only one side surface of the base member 26.

【0032】このようにして、本実施例における回路基
板21を製造することができる。
In this way, the circuit board 21 in this embodiment can be manufactured.

【0033】したがって、本実施例においては、基板製
造(半田塗布)時に従来必要とした基部材26を反転さ
せる工程が不要になるから、製造工程数を削減すること
ができる。
Therefore, in this embodiment, the step of reversing the base member 26, which is conventionally required when manufacturing a substrate (solder application), is not required, and the number of manufacturing steps can be reduced.

【0034】なお、本実施例においては、3.5インチ
マイクロフロッピィディスク装置の回路基板に適用する
例を示したが、本発明はこれに限定されるものではな
く、他の電子機器の回路基板にも実施例と同様に適用可
能である。
In this embodiment, an example in which it is applied to a circuit board of a 3.5-inch micro-floppy disk device has been shown, but the present invention is not limited to this, and a circuit board of other electronic equipment. The same can be applied to the embodiment.

【0035】また、本発明におけるランド24の形状や
外形寸法は、前述した実施例に特に限定されず、ジャン
パワイヤ27のワイヤ折り返し部27b,27cの長さ
や外径に応じて適宜変更し得ることは勿論である。
Further, the shape and external dimensions of the land 24 in the present invention are not particularly limited to those in the above-mentioned embodiment, and can be appropriately changed according to the length and outer diameter of the wire folded portions 27b and 27c of the jumper wire 27. Of course.

【0036】[0036]

【発明の効果】以上説明したように本発明によれば、第
1貫通孔の表側開口周縁に露呈するランドおよび第2貫
通孔の裏側開口周縁に露呈するランドのうちワイヤ挿通
側のランドをジャンパワイヤの折り返し側で延在させた
ので、第1貫通孔および第2貫通孔の各表側開口周縁上
に塗布された半田がリフロー半田付け時に溶融し、これ
ら各溶融半田のうち一方側の溶融半田によって第1貫通
孔の表側開口周縁に露呈するランドとジャンパワイヤが
接続されると共に、第2貫通孔を挿通するジャンパワイ
ヤに沿って流れた他方側の溶融半田によって第2貫通孔
の裏側開口周縁に露呈する延在部を含むランドとジャン
パワイヤが接続される。
As described above, according to the present invention, the land on the wire insertion side of the lands exposed on the front opening edge of the first through hole and the land on the wire insertion side of the lands exposed on the back opening edge of the second through hole are jumpered. Since the wire is extended on the turn-back side, the solder applied to the front edge of each of the first through hole and the second through hole is melted at the time of reflow soldering, and one of these molten solders is melted solder. The land and the jumper wire exposed on the front side opening peripheral edge of the first through hole are connected by, and the back side opening peripheral edge of the second through hole is formed by the other side molten solder flowing along the jumper wire inserted through the second through hole. The land including the extended portion exposed to the outside and the jumper wire are connected.

【0037】したがって、回路基板の製造時に従来必要
とした基部材を反転させる工程が不要になるから、製造
工程数を削減することができ、コストの低廉化を図るこ
とができる。
Therefore, the step of reversing the base member, which is conventionally required when manufacturing the circuit board, becomes unnecessary, so that the number of manufacturing steps can be reduced and the cost can be reduced.

【図面の簡単な説明】[Brief description of drawings]

【図1】(A)および(B)は本発明に係る回路基板を
示す断面図と下面図。
1A and 1B are a cross-sectional view and a bottom view showing a circuit board according to the present invention.

【図2】(A)〜(D)は同じく本発明における回路基
板の製造手順を説明するために示す断面図。
2A to 2D are cross-sectional views similarly shown for explaining the procedure for manufacturing a circuit board according to the present invention.

【図3】(A)および(B)は従来の回路基板を示す平
面図と下面図。
3A and 3B are a plan view and a bottom view showing a conventional circuit board.

【図4】(A)および(B)は従来における回路基板の
製造手順を説明するために示す断面図。
4A and 4B are cross-sectional views shown for explaining a conventional procedure for manufacturing a circuit board.

【符号の説明】[Explanation of symbols]

21…回路基板 22…ランド 23…第1ベアホール 24…ランド 24a…第1ランド部 24b…第2ランド部 25…第2ベアホール 26…基部材 27…ジャンパワイヤ 27a…ワイヤ中央部 27b,27c…ワイヤ折り返し部 28,29…配線パターン 30,31…クリーム半田 21 ... Circuit board 22 ... Land 23 ... 1st bare hole 24 ... Land 24a ... 1st land part 24b ... 2nd land part 25 ... 2nd bare hole 26 ... Base member 27 ... Jumper wire 27a ... Wire center part 27b, 27c ... Wire Folded portion 28, 29 ... Wiring pattern 30, 31 ... Cream solder

Claims (1)

【特許請求の範囲】[Claims] 【請求項1】 表側開口周縁にランドが露呈する第1貫
通孔および裏側開口周縁にランドが露呈する第2貫通孔
を有する基部材と、この基部材の両ランドに半田付けさ
れかつ前記両貫通孔を挿通して折り返し形成されたジャ
ンパワイヤとを備えた回路基板において、前記両ランド
のうちワイヤ挿通側のランドを前記ジャンパワイヤの折
り返し側で延在させたことを特徴とする回路基板。
1. A base member having a first through hole in which a land is exposed at a peripheral edge of a front side opening and a second through hole in which a land is exposed at a peripheral edge of a back side opening, and soldering to both lands of the base member and the through holes. A circuit board provided with a jumper wire formed by folding back through a hole, wherein a land on the wire insertion side of the lands extends on the folding back side of the jumper wire.
JP22295693A 1993-09-08 1993-09-08 Circuit board Pending JPH0779057A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP22295693A JPH0779057A (en) 1993-09-08 1993-09-08 Circuit board

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP22295693A JPH0779057A (en) 1993-09-08 1993-09-08 Circuit board

Publications (1)

Publication Number Publication Date
JPH0779057A true JPH0779057A (en) 1995-03-20

Family

ID=16790518

Family Applications (1)

Application Number Title Priority Date Filing Date
JP22295693A Pending JPH0779057A (en) 1993-09-08 1993-09-08 Circuit board

Country Status (1)

Country Link
JP (1) JPH0779057A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR20150111388A (en) * 2014-03-20 2015-10-06 주식회사 대유위니아 Circuit patterning of pcb

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR20150111388A (en) * 2014-03-20 2015-10-06 주식회사 대유위니아 Circuit patterning of pcb

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