JPH0778941A - Overheat protecting circuit for semiconductor integrated circuit - Google Patents

Abstract

PURPOSE:To prevent malfunction due to disturbance such as noise when an overheat protecting circuit is used within temperature hysteresis. CONSTITUTION:An overheat protecting circuit is provided with a temperature monitor circuit 1 and a cutoff circuit 2 which stops the operation of other major circuits in the IC chip in response to temperature detecting output. A timer circuit 23 is provided in the cutoff circuit 2 so as to judge whether a signal in the temperature monitor circuit 1 is at the same level at least for a certain period of time, and the cutoff circuit is permitted to operate after the judgement. Therefore, even when heat dissipation is deteriorated under the excessively mounted condition, stable operation of the overheat protecting circuit is allowed without malfunction due to disturbance such as noise.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an overheat protection circuit in a semiconductor integrated circuit.

[0002]

2. Description of the Related Art FIG. 8 is a diagram showing a first conventional overheat protection circuit. In the figure, 1 is a temperature monitor circuit and 2 is an I.
Cutoff circuit that stops the operation of other main circuits in the C chip, 2
Reference numeral 1 is an input section in the interruption circuit, and 22 is an output section for outputting a interruption signal.

Next, the operation will be described. Normally, the IC overheat protection circuit is provided with a temperature hysteresis in the cutoff circuit 2 to prevent thermal oscillation or the like. This is because when the overheat protection circuit operates, the other main circuits in the IC are cut off and the power is not consumed and the temperature of the IC chip decreases, but if there is no temperature hysteresis, it shuts off as soon as the temperature decreases. This is because the state is released, the power is consumed again, the temperature rises, and the cutoff state is resumed. This is repeated in the same manner, and the thermal oscillation state occurs.

FIG. 2 shows an operating curve of the overheat protection circuit. As shown in the figure, the operating curve of this overheat protection circuit has temperature hysteresis. The IC is normally used at the temperature of point A in the figure, but in this case, even if the cutoff circuit 2 in the overheat protection circuit in the semiconductor integrated circuit malfunctions due to disturbance such as noise, the overheat protection is performed. The operating curve of the circuit is
Besides having the temperature hysteresis, since the chip temperature is near the temperature at the point A, the overheat protection circuit immediately returns to the released state, which is not a problem in practical use.

However, in a state where heat radiation is poor due to overcrowded mounting or the like, it may be used at point B in the figure. In this case, the operating state of the overheat protection circuit is point C in the figure (released state)
It will be in. Considering the case where the disturbance as described above has jumped in, when the cutoff circuit 2 malfunctions and returns, the state shifts to point D from the external temperature condition, so the cutoff state continues. Then, unless the power of the worst IC is turned off, the overheat protection circuit may not be returned to the released state (the state of point A in the figure).

FIG. 16 is a diagram showing an overheat protection circuit in a semiconductor integrated circuit of a second conventional example, and in FIG.
Reference numeral 1 is a constant voltage circuit, 52 is a temperature detection circuit, 53 is a temperature hysteresis cutoff circuit that creates a hysteresis signal based on the output signals of the constant voltage circuit 51 and the temperature detection circuit 52, and stops the operation of other main circuits in the chip. . Here, the overheat protection circuit is a circuit that prevents the chip temperature from being overheated by temporarily stopping the operation of other main circuits when the IC is in an overheated state. The operating curve of the circuit is shown.

Next, the operation will be described. The temperature detection circuit 52 detects the chip temperature. Further, by setting the output voltage of the constant voltage circuit 51 in advance to the voltage output at the set temperature (T1), when the chip temperature rises to the desired temperature, the hysteresis cutoff circuit 53 is the main circuit of the IC. A signal of "H" is output as an output signal so as to stop the operation of.

Further, when the ambient temperature falls below T1, the operation of the protection circuit is not immediately released, that is, the temperature hysteresis cutoff circuit 53 does not output the "L" signal. By the function of the temperature hysteresis cutoff circuit 53, the operation is released (the signal of “L” is output) only when the temperature drops to the constant temperature T2, and the main circuit of the IC is returned to the normal operation.

As described above, in the conventional overheat protection circuit of the second example, the chip temperature is detected, and hysteresis is applied to the temperature to protect the IC from overheating.

[0010]

Since the conventional overheat protection circuit of the first example is constructed as described above, when it is used at a temperature within the temperature hysteresis in a state where heat radiation is bad due to overcrowded mounting, noise etc. However, there is a problem in that it does not easily return from the cutoff state to the released state when it malfunctions due to the disturbance.

Further, since the conventional overheat protection circuit of the second example has the above-mentioned structure, it is easily cooled after the operation is shut off when a package with good heat dissipation is used. There is a problem that the return operation from the cutoff state to the release state is quick and thermal oscillation occurs.

The present invention has been made in order to solve the above problems, and even if the heat radiation is deteriorated in the densely packed state, it does not return from the cutoff state to the released state when malfunction occurs due to disturbance. It is an object of the present invention to provide an overheat protection circuit that can obtain a stable operation of the overheat protection circuit.

Further, according to the present invention, even if a package with good heat dissipation is used, the operation of returning from the cutoff state to the release state is quick, and a stable operation of the overheat protection circuit can be obtained without causing thermal oscillation. It is an object of the present invention to provide an overheat protection circuit capable of achieving the above.

[0014]

In the overheat protection circuit in the semiconductor integrated circuit according to the present invention, it is determined in the shutoff circuit section that the signals of the temperature monitor circuit are at the same level for a certain time or longer, and the determination is made in this way. It has a built-in timer circuit to perform the shut-off operation later.

The overheat protection circuit in the semiconductor integrated circuit according to the present invention includes a time width setting circuit which outputs a signal after a fixed time has elapsed after receiving the output of the temperature hysteresis circuit, and a time point when the signal is output from the time width setting circuit. And a latch circuit for latching the output of the temperature hysteresis circuit.

[0016]

Since the overheat protection circuit of the present invention has the timer function, control is performed so that the input signal to the cutoff circuit remains in the cutoff state only after the same state is maintained for a certain period.

Further, since the overheat protection circuit of the present invention is provided with the time width setting circuit and the latch circuit, control is performed so that the cutoff signal is hysteretic not by temperature but by time.

[0018]

【Example】

Example 1. Hereinafter, a first embodiment of the present invention will be described with reference to the drawings. 1 shows an overheat protection circuit according to a first embodiment of the present invention, FIG. 1 (a) is a circuit block diagram thereof, and FIG. 1 (b) is a detailed circuit configuration diagram thereof. In FIG. 1 (a), 1 is a temperature monitor circuit, 2 is a cutoff circuit for stopping the operation of other main circuits in the IC chip according to the output signal of the temperature monitor circuit 1, and 21 is an input section in the cutoff circuit 2. , 22 is an output section for outputting a cutoff signal in the cutoff circuit 2, and 23 is the input section 21.
And the output unit 22 and is provided between the temperature monitor circuit 1 and
It is judged that the signals of are at the same level for a certain period of time,
The timer circuit is configured to perform the shutoff operation of the shutoff circuit 2 after the determination is made in this manner. In FIG. 1B showing the details of the circuit of FIG. 1A, Q1 to Q17 are transistors, R1 to R6, Ra and Rb are resistors, Ca is a capacitor, I1 to I3 are current sources, and Comp1 is a comparator. Is.

In the first embodiment, the temperature monitor circuit 1 uses a temperature proportional voltage of a so-called bandgap type constant voltage circuit. The point of the temperature monitor circuit 1
The temperature-proportional voltage output from (T) enters the input section 21 of the cutoff circuit 2 composed of a differential input circuit, where the reference voltage
Compared with (A). The result of the comparison at the input section 21 is output via the transistors Q15, Q16, Q17 of the output section 22, but in the first embodiment, the timer circuit 23 is inserted between the transistors Q15 and Q16.

Next, the operation will be described. Also in the overheat protection circuit of the first embodiment of FIG. 1, temperature hysteresis is provided as in the conventional example. The timer circuit 23 has a function of controlling the output unit 22 so that the signal input to the input unit 21 of the cutoff circuit 2 remains in the same state for a time t set by the timer unit 23 or more until the output unit 22 operates. To have.

In this way, when a disturbance such as noise is applied to the circuit of FIG. 1, even if the input section 21 of the cutoff circuit 2 outputs an inversion signal, the inversion signal continues for a time width t or more set by the timer circuit 23. If not, the output unit 22 does not output the cutoff signal. That is, the output of the cutoff circuit 2 in FIG. 3 means that it is in the release state at this time.

At this time, considering the operation at each operation point on the operation curve of the overheat protection circuit of FIG. 2, the operation is as follows. In the figure, when used at point A, there is no practical problem as described above, but when used at the temperature at point B, that is, when the operating point is at point C, in the case of the circuit of the first embodiment, noise is generated. The cutoff circuit 21 does not output the cutoff signal unless the time width exceeds the time width set by the timer circuit 23. Normal,
The time width of noise is very short, and the time width set by the timer circuit 23 can be set sufficiently larger than the time width of noise. Therefore, stable operation without malfunction can be continued even at the point C.

Next, this operation will be described with reference to the detailed circuit configuration diagram of FIG. 1B and the timing charts of FIGS. 3A and 3B. First, when the temperature of the IC rises, the voltage at the point (T), which is the output of the temperature monitor circuit, drops as shown in FIG. 3 (a). Then, when the voltage at the point T falls below the compared voltage (A), the transistor Q15 is turned off, and the constant current I2 flows into the capacitor Ca. Then, the potential at the point (B) gradually rises and exceeds the voltage VR as shown in FIG. 3 (a). Since the point (B) is on the non-inverting input side of the comparator Comp1, the output (C) of the comparator switches from "L" to "H". As a result, the output (D) also enters the cutoff state. As can be seen from Fig. 3 (a),
Since the timer circuit 23 is included in the first embodiment, I
Even if the temperature of C exceeds a certain reference value, the output does not switch immediately, but switches with a time delay of Δt. Δt is expressed as follows.

[0024]

[Equation 1]

Next, consider the case where a noise-like signal is input, as shown in FIG. 3 (b). Figure 3 (b) shows the voltage at point (T)
When a noise N such as
1 judges that the temperature of the IC has exceeded the reference value and turns off the transistor Q15. Then, as described above, the capacitor Ca starts to be charged, but the noise time width is
If it is less than Δt shown in the equation (1), the point (C) is not inverted as shown in Fig. 3 (b), and therefore the point (D) is not cut off.

In the first embodiment as described above, the timer circuit 23 is inserted between the input section 21 and the output section 22 of the cutoff circuit 2 so that the timer section 23 outputs the inverted signal even if the input section 21 of the cutoff circuit 2 outputs an inverted signal. Since the output unit 22 does not output the cutoff signal unless the inverted signal continues for the time width t set by the circuit 23 or more, the stable overheat protection circuit operation can be performed even when the heat radiation deteriorates in the overcrowded mounting state. There is an effect that can be obtained.

Example 2. The same effect can be obtained by using a logic counter circuit as the timer circuit of the first embodiment. That is, since many recent IC circuits use the internal clock, the same time width can be set by using this internal clock and counting it by the counter circuit. In this case, by using the counter circuit, an external capacitor for charging / discharging and a resistor are not necessary, and since only a logic circuit is assembled, the circuit configuration can be realized with a very simple circuit and pattern. It is a thing.

FIG. 4 shows the second embodiment of the present invention as described above. Fig. 4 (a) shows the circuit block diagram of Fig. 4 (b).
Shows a detailed circuit configuration diagram thereof. The second embodiment is shown in FIG.
, (B), as the timer circuit 23a,
It uses three DFFs (D type flip-flops), and its timing chart is as shown in FIG. As can be seen from FIG. 5, Δt is made from the clock cycle. In this example, three DFFs are used, but more or less than three may be used depending on the clock cycle and Δt.

In the second embodiment as described above, since the logic counter circuit is used as the timer circuit, not only the external capacitor for charging and discharging and the resistor are not required, but also a very simple circuit and pattern are provided. There is an effect that the circuit configuration can be realized by.

Example 3. FIG. 6 shows an overheat protection circuit according to a third embodiment of the present invention. In the third embodiment, the timer circuit 23b uses the charging time of the external capacitor 31, and the time width Δt is made variable by attaching the capacitor 31 externally.

In the third embodiment as described above, the timer circuit 2
Since 3b uses the charging time of the externally attached capacitor 31, there is an effect that the time width Δt set by the timer circuit can be made variable.

Example 4. FIG. 7 shows an overheat protection circuit according to a fourth embodiment of the present invention. FIG. 7 (a) is its block configuration diagram and FIG. 7 (b) is its detailed circuit configuration diagram. In the fourth embodiment, in the timer circuit 23c, an external resistor 32 can be connected instead of the constant current I2 in the third embodiment,
Δt is made variable by the external resistance value. Here, Δt is represented by the following formula.

[0033]

[Equation 2]

As described above, in the fourth embodiment, the timer circuit 2
3c uses the discharge time of the capacitor Ca,
Moreover, since the discharge time of the capacitor Ca is made variable by externally attaching the resistor 32, there is an effect that the time width Δt can be made variable by the resistance value of the external resistor 32.

Example 5. FIG. 8 shows an overheat protection circuit according to a fifth embodiment of the present invention. Timer circuit 23 of the fifth embodiment
d is the external element 31, 32 shown in the third and fourth embodiments.
(In the fifth embodiment, the resistor 32 of the fourth embodiment is realized by a transistor).

In the fifth embodiment as described above, the time width Δt is constant by incorporating the externally mounted elements 31 and 32 of the above-described third and fourth embodiments. It is possible to save the trouble of attaching externally.

Example 6. The sixth embodiment of the present invention will be described below with reference to the drawings. 10 shows an overheat protection circuit according to a sixth embodiment of the present invention, FIG. 10 (a) is a circuit block diagram thereof, FIG. 10 (b) is a detailed circuit configuration diagram thereof, and FIG.
1 (a), (b), and (c) show the timing chart.
In FIG. 10A, 51 is a constant voltage circuit that generates a constant voltage that can be set according to temperature, and 52 is a temperature detection circuit that detects the temperature of the IC chip. Reference numeral 56 denotes a cutoff circuit section for stopping the operation of other main circuits in the IC chip. In the cutoff circuit section 56, 53 indicates the temperature of the output of the constant voltage circuit 51 and the output of the temperature detection circuit 52. A temperature hysteresis circuit for comparing with hysteresis, 54 is a time width setting circuit that receives an output 53 of the temperature hysteresis circuit 53, and outputs a signal after a fixed time from the time when the output is input, 55 is a time width setting circuit 54 The output waveform C of the temperature hysteresis circuit 53 at the time when the signal is output.
Is a latch circuit that latches

Further, in FIG. 11B, the same reference numerals as those in FIG. 1B indicate the same parts, and the temperature monitor circuit 1 of the sixth embodiment comprises a constant voltage circuit 51 and a temperature detection circuit 52. The temperature monitor circuit 1 of the first embodiment has the same configuration. Further, the cutoff circuit section 56 has the same structure as the combination of the input section 21 of the cutoff circuit and the output section 22 of the cutoff circuit of the first embodiment, and is connected to the temperature hysteresis circuit 53. The time width setting circuit 54 includes two NANDs, NAND1 and NAND2, resistor pairs R7 and R8, and a capacitor C2. The latch circuit 55 is composed of two transistors Q17 and Q18 and an inverting buffer INV.

Next, the operation of the sixth embodiment will be described with reference to the timing chart of FIG. In the overheat protection circuit of the sixth embodiment shown in FIGS. 10 (a) and 10 (b), similar to the conventional example,
A temperature hysteresis circuit 53 is provided, and a time width setting circuit 54 and a latch circuit 55 are further provided so that the temperature detection waveform A of the temperature hysteresis circuit 53 is latched and a cutoff release signal is output after a lapse of a certain time T. Is equipped with. That is, when the time width setting circuit 54 and the latch circuit 55 are not provided, the final interruption output D of the interruption circuit unit 56 becomes "L" (interruption state) only for the TA time corresponding to the output A, but the time width The setting circuit 54 is a temperature hysteresis circuit 53.
Is triggered by the falling edge of the output waveform C, and then the cutoff state is maintained for the time T (output signal B). Then, the latch circuit 55 combines the two signals of the signal C and the signal B, and finally a cutoff output D as shown in FIG. 11 is obtained. Here, the time TA is determined by the heat radiation state of the IC, but the time T is a constant value determined by the capacitor C2 incorporated in the time width setting circuit 54. Therefore, even if the time TA becomes small, if the time T is set to a certain constant value, it is possible to always maintain the interruption time above a certain value.

The overheat protection circuit according to the sixth embodiment is provided with the time width setting circuit 54 and the latch circuit 55.
As a result, even after the output waveform of the temperature hysteresis circuit 53 is in the cutoff release state, the cutoff state is maintained for the time T by the time width setting circuit 54, and then the cutoff release state is set. Since hysteresis is applied in the time width, even if a package with good heat dissipation is used, the cutoff state will not be released immediately and stable overheat protection circuit operation can be obtained. .

Example 7. FIG. 12 shows a seventh embodiment of the present invention, FIG. 12 (a) is a detailed circuit configuration diagram of an overheat protection circuit according to the seventh embodiment, and FIG. 12 (b) is an operation timing chart of the present embodiment. is there. In the circuit configuration of the seventh embodiment, the comparator 50 is provided on the output side of the temperature hysteresis circuit 53A.
A time width setting circuit 54A including a temperature hysteresis circuit 5A is connected.
The voltage proportional to the output waveform C of 3A is applied to the transistor Q1.
6, the positive input terminal is input to the comparator 50 via the transistor Q17. At this time, the capacitor Ca is connected to the positive input terminal, and the capacitor Ca is charged by the above voltage. on the other hand,
The resistor pair R7 and R8 creates a comparison voltage VR and inputs it to the non-inverting input of the comparator 50, and the output of this comparator 50 becomes the cutoff output D. In the figure, I4 is a constant current source. Further, the cutoff circuit section 56 of the seventh embodiment does not include the latch circuit 55 of the sixth embodiment.

Next, the operation will be described with reference to the timing chart of FIG. C in Fig. 12 (a)
The point becomes the output of the temperature hysteresis circuit 53A, and the time width setting circuit 54A outputs this signal C to the comparator 50.
Therefore, when the cutoff state is changed to the release state (falling point C), the charging time of the capacitor Ca is used to
There is a delay in time. Therefore, the time width setting circuit 5
The output D of 4A is the temperature hysteresis circuit 53.
The sum of the time TA determined by the voltage at the point C, which is the output of A, and the time T determined by the charging time of the capacitor Ca is the time for maintaining the cutoff state.

In the seventh embodiment, the sixth embodiment described above is used.
Similarly to the above, without using the temperature hysteresis operation, the temperature detection output C of the temperature hysteresis circuit is adapted to apply hysteresis not in temperature but in the time width. Also, the cutoff state is maintained for the time T by the time width setting circuit 54A, and then the cutoff state is released, so that stable overheat protection circuit operation can be obtained even when a package with good heat dissipation is used. There is an effect that can be.

Example 8. In the eighth embodiment, as the time width setting circuit 54 of the sixth embodiment, an external capacitor 57 (C2) is provided as shown in FIGS. 13 (a) and 13 (b), and the capacitance value of the external capacitor C2 is set. The time width setting circuit 54B can easily change the time width T of the hysteresis by changing the time width. In addition, the temperature hysteresis circuit 53 and the latch circuit 55 are exactly the same as those in the sixth embodiment.

In the eighth embodiment, the time width setting circuit 54B is used to apply the hysteresis not in the temperature but in the time width, so that a stable operation of the overheat protection circuit can be obtained as in the sixth and seventh embodiments. There is an effect that can be. Also,
By changing the capacitance value of the externally attached capacitor C2, there is an effect that the time width T of the hysteresis can be easily changed.

Example 9. In the ninth embodiment of the present invention, as the time width setting circuit 54 in the sixth embodiment, as shown in FIG.
A logic counter circuit, as shown in (b),
It uses a logic counter circuit 54C configured by using three DFFs, that is, FF1, FF2, and FF3.

FIG. 15 is a timing chart of the ninth embodiment.
The operation will be described next. Three DFFs (FF 1, FF 2,
The FF3) is reset when the voltage at the point C of the temperature hysteresis circuit 53 changes from "L" to "H", and its Q output becomes "L". Then, when the voltage at the point C inverts to "L", the operation starts, so that the Q output of each DFF has a waveform as shown in FIG.

Also in the ninth embodiment, the time width setting circuit 5
Since the logic counter circuit 54C is used as No. 4 and the hysteresis is applied not by the temperature but by the time width, there is an effect that a stable operation of the overheat protection circuit can be obtained as in the sixth, seventh and eighth embodiments. is there.

In the ninth embodiment, three DFFs are arranged. However, the number of DFFs is determined by how much the cycle of the clock CLK and the time T are set. Is also good.

[0050]

As described above, according to the overheat protection circuit in the semiconductor integrated circuit of the present invention, it is determined in the shutoff circuit section that the signals of the temperature monitor circuit are at the same level for a certain period of time or more. Since the timer circuit for performing the shut-off operation after the judgment is made is provided, there is an effect that a stable overheat protection circuit operation can be obtained without malfunction due to noise or the like even when the heat radiation is deteriorated in a densely packed state.

Further, according to the overheat protection circuit of the present invention, the shut-off circuit section further includes a time width setting circuit for outputting a signal after a predetermined time has elapsed after receiving the output of the temperature hysteresis circuit, and further, the time width setting circuit. A latch circuit that latches the output of the temperature hysteresis circuit when the signal is output from is provided, and so to speak, the hysteresis is applied not by temperature but by the time width, so even when using a package with good heat dissipation, There is an effect that a stable operation of the overheat protection circuit can be obtained without oscillating.

[Brief description of drawings]

FIG. 1 is a diagram showing an overheat protection circuit according to a first embodiment of the present invention (FIG. 1A is a circuit block diagram and FIG. 1B is a detailed circuit configuration diagram).

FIG. 2 is a diagram showing an operation curve showing the operation of the overheat protection circuit of the first embodiment (FIG. 2A) and an operation diagram when noise due to disturbance is added (FIG. 2B).

3A and 3B are operation timing charts of the overheat protection circuit according to the first embodiment (FIG. 3A is for normal operation, and FIG. 3B is for when disturbance noise is added).

FIG. 4 is a diagram showing an overheat protection circuit according to a second embodiment of the present invention (FIG. 4A is a circuit block diagram and FIG. 4B is a detailed circuit configuration diagram).

FIG. 5 is an operation timing chart of the overheat protection circuit according to the second embodiment.

FIG. 6 is a diagram showing an overheat protection circuit according to a third embodiment of the present invention (FIG. 6A is a circuit block diagram, and FIG. 6B is a detailed circuit configuration diagram).

FIG. 7 is a diagram showing an overheat protection circuit according to a fourth embodiment of the present invention (FIG. 7A is a circuit block diagram and FIG. 7B is a detailed circuit configuration diagram).

FIG. 8 is a diagram showing an overheat protection circuit according to a fifth embodiment of the present invention.

FIG. 9 is a diagram showing a conventional overheat protection circuit according to a first example.

FIG. 10 is a configuration diagram (FIGS. (A) and (b)) showing an overheat protection circuit according to a sixth embodiment of the present invention.

FIG. 11 is an operation explanatory diagram of the overheat protection circuit according to the sixth embodiment.

FIG. 12 is a circuit configuration diagram (FIG. (A)) showing an overheat protection circuit according to a seventh embodiment of the present invention and an operation timing chart diagram (FIG. (B)) thereof.

FIG. 13 is a configuration diagram (FIGS. (A) and (b)) showing an overheat protection circuit according to an eighth embodiment of the present invention.

FIG. 14 is a configuration diagram (FIGS. (A) and (b)) showing an overheat protection circuit according to a ninth embodiment of the present invention.

FIG. 15 is an operation timing chart of the overheat protection circuit according to the ninth embodiment.

FIG. 16 is a diagram showing an overheat protection circuit according to a second conventional example.

17 is an operation curve showing the operation of the overheat protection circuit of FIG.

[Explanation of symbols]

 1 Temperature Monitor Circuit 2 Breaking Circuit 21 Input Section of Breaking Circuit 22 Output Section of Breaking Circuit 23, 23a, 23b, 23c Timer Circuit 24 Counter Circuit 31 External Capacitor 32 External Resistor 51 Constant Voltage Circuit 52 Temperature Detection Circuit 53, 53A Temperature hysteresis circuit 54, 54A, 54B, 54C Time width setting circuit 55 Latch circuit 56 Breaking circuit unit 57 External capacitor FF1, FF2, FF3 D-flip-flop

Claims (10)

[Claims] 1. Overheating in a semiconductor integrated circuit comprising a temperature monitor circuit for monitoring the temperature of an IC chip, and a cutoff circuit for stopping the operation of a main circuit in the IC chip in response to an output signal of the temperature monitor circuit. In the protection circuit, the cutoff circuit has a built-in timer circuit for judging that the signals of the temperature monitor circuit are at the same level for a certain time or longer, and then performing the cutoff operation after making such judgment. Is an overheat protection circuit in a semiconductor integrated circuit. 2. The overheat protection circuit according to claim 1, wherein a D type flip-flop is used for the timer circuit. 3. The overheat protection circuit according to claim 1, wherein the timer circuit has an external capacitor, and the fixed time is variable depending on the capacitance value of the external capacitor. Overheat protection circuit in semiconductor integrated circuit. 4. The overheat protection circuit according to claim 1, wherein the timer circuit has an external resistor, and the fixed time is variable by a resistance value of the external resistor. Overheat protection circuit in semiconductor integrated circuit. 5. The overheat protection circuit according to claim 1, wherein the external capacitor according to claim 3 and the external resistor according to claim 4 are built-in. circuit. 6. The overheat protection circuit according to claim 1, wherein the temperature monitor circuit detects a temperature of a constant voltage circuit that generates a constant voltage that can be set according to temperature, and the temperature of the IC chip. An overheat protection circuit in a semiconductor integrated circuit, comprising: 7. A temperature monitor circuit comprising a constant voltage circuit for generating a constant voltage that can be set according to temperature and a temperature detection circuit for detecting the temperature of the IC chip, and a temperature monitor circuit for monitoring the temperature of the IC chip, The output of the temperature detection circuit of the monitor circuit is received, this is compared with the output of the constant voltage circuit with temperature hysteresis, and the operation of the main circuit in the chip of the IC is performed from the time of the temperature detection according to the comparison output. In an overheat protection circuit in a semiconductor integrated circuit having a shutoff circuit having a temperature hysteresis circuit for shutting off with temperature hysteresis, the shutoff circuit receives an output of the temperature hysteresis circuit, and a time when the output is input. The time width setting circuit that outputs a signal after a fixed time from the temperature hysteresis circuit at the time when the signal is output from the time width setting circuit. It latches the output of the scan circuit, an overheat protection circuit in the semiconductor integrated circuit, characterized in that those having a latch circuit to shut off its output. 8. The overheat protection circuit according to claim 7, wherein the time width setting circuit inputs the output waveform of the temperature hysteresis circuit to a comparator having a capacitor at a signal input end thereof, An overheat protection circuit in a semiconductor integrated circuit characterized by not having. 9. The overheat protection circuit according to claim 7, wherein the time width setting circuit has an external capacitor that determines a time width to be set. 10. The overheat protection circuit according to claim 7, wherein the time width setting circuit comprises a timer circuit formed of a logic circuit.