JPH0774815B2 - Analog LSI tester - Google Patents

Description

TECHNICAL FIELD The present invention relates to an analog LSI tester for inspecting an abnormal operation of an analog LSI, and more specifically, to prevent noise from being mixed into a measurement module of the analog LSI tester from a control system. The present invention relates to the improvement of the data transfer method.

(Prior Art) Conventionally, a measurement module is driven by a module controller controlled by a digital computer, a predetermined analog signal is given to an analog LSI under test connected to this module if necessary, and the LSI There is an analog LSI tester that measures the analog signal of each part with a measurement module, converts the obtained data into digital, analyzes it with a digital computer, etc., and inspects the operation abnormality of the analog LSI under test.

In such an LSI tester, it is necessary to prevent noise from the control system from entering the measurement module, and one method is to transfer data between the measurement module and the controller via an optical fiber. There is. In this case, a serial transfer method is usually adopted for data transfer, and a commercially available synchronous or asynchronous serial transfer LSI is used. This serial transfer LSI has a parallel / serial conversion (PS conversion) function that converts a parallel signal to a serial signal and outputs it, and a serial / parallel conversion (SP conversion) function that converts a given serial signal to a parallel signal and outputs it. Both are used and used in a configuration as shown in FIG. That is, the output signal of one serial transfer LSI 200 (210) passes through the photoelectric converter (not shown), the transfer line (optical fiber) 220 and the other side photoelectric converter (not shown), and the other serial transfer LSI 210. Transferred to (200). In this case, each transfer LSI requires LSI control processors 201, 211 or a sequencer instead thereof.

By the way, in such a system, with respect to the measurement module 230, the LSI control processors 201, 211
There was a problem that noise was mixed in from other control systems.

(Object of the Invention) In view of such a point, an object of the present invention is to provide an analog LSI tester in which noise is not mixed from a control system to a measurement module.

(Summary of the Invention) In order to achieve such an object, the present invention provides a measurement module for applying an analog signal to an analog LSI under test as needed and measuring an analog signal for each LSI, and a measurement module for measuring the analog signal. The module is optically coupled and has a module controller for controlling the module and a computer that drives the module controller to perform a predetermined test operation and appropriately processes the obtained measurement data. In an analog LSI tester capable of analyzing the operation of a test analog LSI, the module controller and the measurement module are respectively a controller interface and a module interface.
The controller interface on the module controller side is configured to be able to send and receive signals by a serial transfer method via the interface, and the transmitter interface for sending the output signal from the module controller side to the measurement module side, and the measurement module. Generates a signal for controlling the transmitter and receiver according to the control signal given from the module controller and the receiver which receives the output signal from the module controller side and the control signal to the code signal. Input to a transmission unit, and further comprises a sequencer having a function of sending a clock from the module controller to the measurement module side while the control signal is output, wherein the module interface on the measurement module side is a measurement module. Signal from the And a receiving unit that receives a signal from the module controller side and sends it to the measurement module side, and a receiving unit that operates by a clock given from the sequencer of the interface of the module controller side. And timing control the transmitter,
It is composed of a sequencer having a function of interpreting the code of the control signal received by the receiving unit, and a pulse generator that generates a pulse signal for controlling the measurement module in synchronization with the clock based on the signal from the sequencer. Characterize.

(Example) The present invention will be described in detail below with reference to the drawings. FIG. 1 is a main part configuration diagram showing an embodiment of a portion particularly related to data transfer of an analog LSI tester according to the present invention. In the figure, 10 is a module controller, 20 is a controller interface, 30 is a module interface,
40 is a measurement module.

The module controller 10 includes a processor 11 (usually a microprocessor is used) and an oscillator 12, and controls a controller interface 20. The processor 11 is a controller for executing a predetermined measurement operation in response to a command given from a computer (not shown).
Sends and receives control signals and data to and from the interface.

The controller interface 20 sends and receives data and supplies a clock to the module interface 30, and includes a transmitter 21, a receiver 22, and a sequencer 23.
It is composed of

The transmitter 21 is controlled by the sequencer 23 to convert a given parallel digital signal into a serial signal, and further converts this into a light signal by photoelectric conversion and outputs the light signal. The receiver 22
Timing control is performed by the sequencer 23, and the input serial digital signal (optical signal) is converted into an optical signal by photoelectric conversion, and then this serial electric signal is converted into a parallel signal and output. The sequencer 23 generates a signal for controlling the transmitting unit 21 and the receiving unit 22 according to a control signal (write, read and reset signal) given from the processor 11 and converts the control signal into a code signal, and then the transmitting unit 21. The clock supplied from the oscillator 12 is photoelectrically converted and output as an optical signal.

The module interface 30 includes a receiving unit 31, a transmitting unit 32,
It is composed of a sequencer 33 and a pulse generator 34. The receiving unit 31 and the transmitting unit 32 have the same configuration or the same function as the receiving unit 31 and the transmitting unit 32 of the controller interface 20.

The sequencer 33 operates according to the synchronous clock from the controller interface 20, controls the timing of the receiving unit 31 and the transmitting unit 32, interprets the code of the control signal received by the receiving unit 31, and controls the pulse generator 34. The pulse generator 34 synchronizes with the synchronous clock, and the sequencer 33
A read or write or reset signal is generated based on the signal from.

The measurement module 40 includes a memory (or register) 41, and is configured to store transmission / reception data. Control signals (write, read, reset) from the pulse generator 34 of the module interface 30 are stored in the memory 41.
Is given.

The operation in such a configuration will be described below.

The processor 11 of the module controller 10 executes a predetermined program according to a command given by the computer and executes the sequence one by one. When it is necessary to control the measurement module 40 (for writing, for example), a write signal is given from the processor 4 to the sequencer 23. Upon receiving the write signal, the sequencer 23 returns an acknowledge signal to the processor 4. Processor 4 also has an address line
The address and data are sent to the transmitter 21 via the data line 14, converted into a serial signal, and then input to the receiver 31 of the module interface 30 via the optical fiber 24. On the other hand, the write signal that has entered the sequencer 23 of the controller interface 20 enters the receiver 31 via the transmitter 21 and the optical fiber 24 as part of the transmission data ((b) in FIG. 4). The data format in this case is as shown in FIG. It should be noted that FIG. 3A shows the format of data including control instructions and address data in the transmission data, and FIG. 3B shows the format of transmitted / received data (so-called simple numerical data). .

The data that has entered the receiving unit 31 is converted into parallel data (fourth
(D) In the figure, it enters the memory 41 of the measuring module 40 via the address line 35 and the data line 36. At this time, Fig. 3 (a)
The bits indicating the reset, read (read by "1", write by "0") and command shown in (1) are sent to the sequencer 33, and the contents are interpreted here. The sequencer 33 notifies the pulse generator 34 that it is a write command in synchronization with the clock (FIG. 4 (A)) sent while the control signal ((C) in FIG. 4) is being output. The write signal ((e) in FIG. 4) output from the pulse generator 34 is given to the memory 41, and the data given from the receiving unit 31 to the memory address specified by the output of the receiving unit 31 (see FIG. 4). The (nth confirmed data) of (d) is written ((e) of FIG. 4).

When one transfer is completed, the sequencer 23 returns an acknowledge signal to the processor 11 to end the write timing of the processor 11. As a result, the control signal is lowered ((c) in FIG. 4), and the clock output from the sequencer 23 is stopped ((a) in FIG. 4).

The sequencer 33 of the module interface 30 operates only while the clock is input, and does not operate when the clock is not input. When the sequencer 33 does not operate, the operations of the receiver 31, transmitter 32, and pulse generator 34 in the module interface also stop.

In the case of data reading, that is, when the measurement data stored in the memory 41 of the measurement module is read out and taken into the processor 11, the interface 30 uses the transmitting unit.
32 and the receiving unit 22 in the interface 20 respectively operate, and data transfer is performed according to the same operation principle as in the case of the above-mentioned write.

Further, when the entire system is initialized at power-on or when desired, a reset signal is output from the processor 11 of the module controller, and a reset command is transferred to the module interface 30 as in the case of writing data. A reset signal is output from the pulse generator 34, and the measurement module is initialized by this reset signal.

In the above-described operation, the module interface is in a stopped state while the control signal from the processor 11 is inactive, so that it is possible to prevent noise from the control system from being mixed into the measurement module.

(Effects of the Invention) As described above, according to the present invention, the operation of the module interface is stopped during measurement by the measurement module, so that it is possible to prevent the noise from flowing from the controller side to the measurement module. LS
The I tester can be realized.

[Brief description of drawings]

FIG. 1 is a block diagram of a main part of an analog LSI tester according to the present invention, FIG. 2 is a block diagram of a main part of an example of a conventional analog LSI tester, FIG. 3 is a diagram showing a transfer data format, and FIG. 7 is a time chart for explaining the operation. 10 …… Module controller, 11 …… Processor,
12 ... Oscillator, 20 ... Controller interface,
21,32 …… Transmitter, 22,31 …… Receiver, 23,33 …… Sequencer, 24,25,26 …… Optical fiber, 30 …… Module interface, 34 …… Pulse generator, 40 …… Measurement module, 41 ... Memory.

Claims (1)

[Claims] 1. A measurement module for supplying an analog signal to an analog LSI under test as needed and measuring an analog signal for each LSI, and the measurement module is optically coupled to control the module. Equipped with a module controller for driving the module controller and a computer that drives the module controller to perform a predetermined test operation and appropriately processes the measured data obtained.
In an analog LSI tester capable of performing operation analysis of I, the module controller and the measurement module are respectively a controller interface and a module interface.
The controller interface on the module controller side is configured so that signals can be transmitted and received through the interface in a serial transfer method, and the controller interface on the module controller side sends the output signal from the module controller side to the measurement module side, and the measurement module. Generates a signal that controls the transmitter and receiver in response to the control signal provided by the module controller and the receiver that sends the output signal from the module controller side to the module controller side, and uses that control signal as a code signal. Input to the transmitting section, and further, while the control signal is being output, it is composed of a sequencer having a function of sending the clock from the module controller to the measuring module side, and the module interface on the measuring module side is a measuring module. Signal from the side Of the module controller, a receiver for receiving the signal from the module controller and sending it to the measurement module, and a receiver operated by the clock given from the sequencer of the interface of the module controller. A sequencer having the function of controlling the timing of the transmitter and the transmitter and interpreting the code of the control signal received by the receiver, and a pulse signal for controlling the measurement module in synchronization with the clock based on the signal from the sequencer. An analog LSI tester composed of a pulse generator.