JPH0770694B2 - Semiconductor substrate - Google Patents

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION The present invention relates to a semiconductor substrate, especially SO.
I (Silicon on Insulator) substrate.

[0002]

2. Description of the Related Art As is well known, when manufacturing a semiconductor device, for example, SOS (Silicon on Sapphi) is used.
re) substrate is used. Such an SOS substrate is usually manufactured by sufficiently smoothing the surface of a sapphire substrate (wafer) and then forming a thin single crystal silicon layer on the substrate surface by vapor phase growth.

[0003]

However, according to the prior art, a problem occurs in the crystallinity of the single crystal silicon layer,
This causes crystal defects and deterioration of electrical characteristics. This is because the crystal structure of the wafer is affected in the initial stage of the vapor phase growth process, and it is difficult to take the original crystal structure. In other words, it takes several tens of nm until the complete crystal structure is obtained.
It requires a certain film thickness. Therefore, a complete crystal layer is formed in the upper layer of the single crystal silicon layer, but a crystal defect is likely to occur in the complete crystal layer due to the influence of the incomplete crystal layer in the lower layer,
In the incomplete crystal layer, the electrical characteristics such as an increase in leak current are deteriorated, and when an element is formed on a semiconductor substrate, it is an obstacle to high speed and high density of the element.

The present invention has been made in consideration of the above circumstances, and an object of the present invention is to provide a semiconductor substrate capable of preventing the occurrence of crystal defects and the deterioration of electrical characteristics, and increasing the speed and density of elements. And

[0005]

The present invention provides a Si semiconductor
A layer and an SiO ₂ layer on the Si semiconductor layer ,
The junction interface between the Si semiconductor layer and the SiO ₂ layer disappears
Is a semiconductor substrate. This invention
Is a semiconductor layer whose surface is sufficiently smoothed by polishing and SiO ₂ whose surface is sufficiently smoothed by polishing.
After making layers and layers in separate steps, thermocompression bonding them together
As a result, the generation of an incomplete crystal layer that depends on the crystal structure of the semiconductor substrate at the initial stage of growth as in the conventional case is avoided, and a semiconductor gas having a semiconductor layer in a completely crystalline state is formed.

[0006]

According to the present invention, since a silicon single crystal substrate having a silicon single crystal layer and a SiO ₂ substrate are manufactured in separate steps, they are thermocompression bonded to selectively etch the silicon single crystal substrate. It is possible to obtain a silicon single crystal layer having complete crystallinity as compared with the conventional one.

[0007]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENT An embodiment of the present invention will be described with reference to FIGS.
This will be described with reference to (c).

First, the surface of a silicon single crystal substrate 1 having a specific resistance of 0.002 cm doped with arsenic at a high concentration as a semiconductor substrate was mirror-polished. Subsequently, a silicon single crystal layer 2 having a thickness of 0.5 μm as a semiconductor layer was grown on this substrate 1 by a general vapor phase growth technique (FIG. 1).
(A) Illustration). Then, an SiO ₂ substrate 3 as an insulating substrate whose surface is mirror-polished in the same manner as above is prepared, and the substrate 1 is placed on the surface of the substrate 3 by the single crystal layer 2 of the substrate 1.
Was in contact with the surface of the SiO ₂ substrate 3. Thereafter, in a vacuum of 1 × 10 ⁻⁴ torr, 950 ° C., 500 g
Thermocompression bonding was carried out for 1 hour under the condition of / cm ² (Fig. 1 (b)).
(Shown). Further, after the temperature was lowered, the silicon single crystal substrate 1 was removed using a hydrofluoric nitric acid-based etching solution having an etching rate selective depending on the impurity concentration to manufacture a semiconductor substrate. The etching solution contains HF: HN.
O ₃ : CH ₃ COOH = 1: 3: 8 was used, and the etching rate at this time was 2.3 μm / in the silicon single crystal substrate 1.
min, almost zero in the silicon single crystal layer 2 (Fig. 1
(C) Illustration).

Therefore, according to the present invention, the silicon single crystal substrate 1 having the silicon single crystal layer 2 and the SiO ₂ substrate 3 are provided.
Since the silicon single crystal substrate 1 and the silicon single crystal substrate 1 are separately manufactured by thermocompression bonding and the silicon single crystal substrate 1 is selectively etched, a silicon single crystal layer 2 having more complete crystallinity than that of a conventional one can be obtained.

Therefore, it is possible to prevent the crystal defects and the deterioration of the electrical characteristics, which have been problems in the past, and to speed up the blocking and increase the density. In the above example, the lapped cross-sections of the silicon single crystal layer 2 and the SiO ₂ substrate 3 before and after thermocompression bonding were photographed with a microscope, and the schematic diagrams shown in FIGS. 2A and 2B were obtained. . Here, FIG. 2A shows a state before thermocompression bonding, and FIG. 2B shows a state after thermocompression bonding. 2 (a) and 2 (b), a boundary surface 4 existed between the silicon single crystal layer 2 and the SiO ₂ substrate 3 before thermocompression bonding, but this boundary surface 4 disappeared completely after thermocompression bonding. You can confirm that. This is because SiO ₂ has a property as a viscoelastic body and viscous flow remarkably occurs at high temperature. Further, an SOS substrate having a silicon single crystal layer having a thickness of 0.3 μm provided on a sapphire substrate was manufactured by the conventional vapor phase growth method and the method of the present invention, and a leak current between diffusion electrodes provided at a constant distance. Was measured, and the current value according to the present invention showed a two-digit decrease. From this, it can be confirmed that the method of the present invention is superior to the conventional method.

In the above embodiment, the silicon single crystal substrate on which the silicon single crystal layer is formed and the SiO ₂ substrate are thermocompression bonded. However, when the silicon single crystal layer is thick, only the silicon single crystal is formed on the SiO ₂ substrate. It may be thermocompression bonded to. Also,
Although a silicon single crystal plate is used in the above-mentioned embodiment, the present invention is not limited to this.

[0012]

As described above in detail, according to the present invention, a crystalline semiconductor Si semiconductor layer is prepared separately from an insulating substrate, and then both are integrally formed, so that crystal defects in the Si semiconductor layer can be eliminated. It is possible to provide a semiconductor substrate that can prevent the generation and deterioration of electrical characteristics and can speed up and increase the density of elements.

[Brief description of drawings]

FIG. 1 is a sectional view showing a method of manufacturing a semiconductor substrate according to an embodiment of the present invention in the order of steps.

FIG. 2 is an explanatory diagram of a cross section of a silicon single crystal layer and a SiO ₂ substrate before and after thermocompression bonding, and FIG. 2A is a cross section of the silicon single crystal layer and SiO ₂ substrate before and after thermocompression bonding. FIG. 2B is a schematic view showing a state where the above is photographed with a microscope, and FIG. 2B is a schematic diagram showing a state where the lapping cross section of the silicon single crystal layer and the SiO ₂ substrate after thermocompression bonding is photographed with the microscope.

[Explanation of symbols]

1 ... Silicon single crystal substrate (semiconductor substrate), 2 ... Silicon single crystal layer (semiconductor layer), 3 ... SiO ₂ substrate (insulating substrate), 4 ... Boundary surface.

Claims (1)

[Claims] 1. A Si semiconductor layer and on the Si semiconductor layer
A SiO ₂ layer, and the Si semiconductor layer and the SiO ₂ layer.
A semiconductor substrate having a junction boundary surface with a layer disappearing .