JPH0760931B2 - Wiring board and soldering method thereof - Google Patents

Wiring board and soldering method thereof

Info

Publication number
JPH0760931B2
JPH0760931B2 JP42593A JP42593A JPH0760931B2 JP H0760931 B2 JPH0760931 B2 JP H0760931B2 JP 42593 A JP42593 A JP 42593A JP 42593 A JP42593 A JP 42593A JP H0760931 B2 JPH0760931 B2 JP H0760931B2
Authority
JP
Japan
Prior art keywords
electrode
wiring board
pad
printed wiring
electrode pad
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
JP42593A
Other languages
Japanese (ja)
Other versions
JPH06204653A (en
Inventor
直美 石塚
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp filed Critical NEC Corp
Priority to JP42593A priority Critical patent/JPH0760931B2/en
Publication of JPH06204653A publication Critical patent/JPH06204653A/en
Publication of JPH0760931B2 publication Critical patent/JPH0760931B2/en
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00Printed circuits
    • H05K1/02Details
    • H05K1/11Printed elements for providing electric connections to or between printed circuits
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/30Assembling printed circuits with electric components, e.g. with resistor
    • H05K3/32Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits
    • H05K3/34Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits by soldering
    • H05K3/341Surface mounted components
    • H05K3/3421Leaded components
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/30Assembling printed circuits with electric components, e.g. with resistor
    • H05K3/32Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits
    • H05K3/34Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits by soldering
    • H05K3/3457Solder materials or compositions; Methods of application thereof

Landscapes

  • Electric Connection Of Electric Components To Printed Circuits (AREA)

Description

【発明の詳細な説明】Detailed Description of the Invention

【0001】[0001]

【産業上の利用分野】本発明は配線基板およびそのはん
だ付け方法、特に、リード間隔の狭い電子部品の実装用
の配線基板およびそのはんだ付け方法に関する。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a wiring board and a soldering method thereof, and more particularly to a wiring board for mounting electronic components having a narrow lead interval and a soldering method thereof.

【0002】[0002]

【従来の技術】従来の配線基板におけるQuad Fl
at Packageなどの半導体パッケージのリード
を接続する電極パッド8は、図3(a)のように、同じ
長さの電極パッド8を横一列に配列したものが最も一般
的である。また、そのはんだ付けにおいては、図3
(b)のように、クリームはんだ9を電極パッド8の形
状に合わせて個別印刷し、その後、パッケージを搭載
し、リフロー炉などに通してはんだ付けする方法が一般
的である。しかし、実装の高密度化の要求が高まり、パ
ッケージのリードの狭ピッチ化が進むにつれ、印刷が難
しくなってきており、図3(c)のようにクリームはん
だ10を各電極パッド8を横切る一文字に印刷する方法も
使われている。パッド配列の点では、図4のように、電
極パッド11を千鳥状に配置した(例えば、実開平2-1226
7 号公報)配線基板が提案されている。この場合、電極
パッド11間の隣接部が少なく、電極パッド毎の個別印刷
が容易になる。
2. Description of the Related Art Quad Fl in a conventional wiring board
As the electrode pad 8 for connecting the lead of a semiconductor package such as at package, the electrode pad 8 of the same length is most commonly arranged in a horizontal row as shown in FIG. 3A. Moreover, in the soldering, as shown in FIG.
As shown in (b), a method is generally used in which the cream solder 9 is individually printed according to the shape of the electrode pad 8, then the package is mounted, and the solder paste is passed through a reflow oven or the like for soldering. However, as the demand for high-density packaging has increased and the pitch of the leads of the package has become narrower, printing has become more difficult. As shown in FIG. 3C, the cream solder 10 crosses each electrode pad 8 The method of printing on is also used. In terms of pad arrangement, the electrode pads 11 are arranged in a staggered pattern as shown in FIG.
Wiring board has been proposed. In this case, the number of adjacent portions between the electrode pads 11 is small, and individual printing for each electrode pad becomes easy.

【0003】次に、従来のはんだ付け方法を、図3
(c)のクリームはんだ10を各電極パッド8を横切る一
文字に印刷する場合を例にとり説明する。まず、配線基
板の電極パッド8上にクリームはんだ10を一文字状に塗
布し(図5(a))、電子部品のリード13をクリームは
んだ10が印刷された電極パッド8上に位置合わせして搭
載後(図5(b))、リフロー炉等を用いて加熱処理す
ることにより、溶融したはんだ14は電極パッド8、およ
びリード13に濡れ拡がり接合状態が形成される(図5
(c))。ここで、印刷されたクリームはんだ10の量
や、溶融したはんだ14の電極パッド8へのぬれ性、リフ
ロー条件等が十分適切でない場合は、リード13間にはん
だ14がつながったまま残るブリッジ12という不良が生じ
る。
Next, the conventional soldering method is shown in FIG.
The case where the cream solder 10 of (c) is printed in one character across each electrode pad 8 will be described as an example. First, the cream solder 10 is applied in a letter shape on the electrode pad 8 of the wiring board (FIG. 5A), and the leads 13 of the electronic component are aligned and mounted on the electrode pad 8 on which the cream solder 10 is printed. After that (FIG. 5 (b)), by heat treatment using a reflow furnace or the like, the molten solder 14 wets and spreads on the electrode pad 8 and the lead 13 to form a bonded state (FIG. 5).
(C)). Here, when the amount of the printed cream solder 10, the wettability of the melted solder 14 to the electrode pad 8, the reflow condition, etc. are not adequately adequate, it is called the bridge 12 in which the solder 14 remains connected between the leads 13. Defects occur.

【0004】[0004]

【発明が解決しようとする課題】上述した従来の配線基
板およびそのはんだ付け方法は、以下のような欠点があ
った。
The above-described conventional wiring board and the soldering method thereof have the following drawbacks.

【0005】横一列に配列した電極パッドでクリームは
んだを個別に印刷する場合(図3(b))、特に、ピッ
チが狭くなると印刷が難しくなるため、印刷精度のバラ
つきにより、リフロー後にブリッジが起きたり、印刷量
が少なすぎるため十分な接合が得られないいわゆる未は
んだが発生する。また、リード搭載時に印刷したはんだ
が崩れ、隣接したパッドとつながってしまい、リフロー
後にブリッジとなる不良も起きやすい。
When the cream solder is individually printed with the electrode pads arranged in a horizontal row (FIG. 3 (b)), printing becomes difficult especially when the pitch is narrowed, and therefore the printing accuracy varies, so that a bridge occurs after reflow. Or, so-called unsolder may occur in which sufficient bonding cannot be obtained because the printing amount is too small. In addition, the solder that is printed when the leads are mounted collapses and is connected to the adjacent pads, which easily causes a defect that becomes a bridge after reflow.

【0006】横一列に配列した電極パッドにクリームは
んだを一文字状で印刷する場合(図3(c))、印刷は
容易になるが、元々パッド間をつないでクリームはんだ
を印刷するので、ブリッジは個別印刷より起きやすい。
このため、つながったはんだが切れやすいように、パッ
ド間に樹脂等を高く盛り上げるなど、特殊な技術が必要
となる。
When the cream solder is printed in a single letter on the electrode pads arranged in a horizontal row (FIG. 3 (c)), printing is easy, but since the pads are originally connected to each other to print the cream solder, the bridge is not formed. It is more likely to occur than individual printing.
For this reason, a special technique is required such as raising resin or the like between the pads so that the connected solder is easily broken.

【0007】図4のようにパッドを千鳥状にする場合、
搭載するパッケージのリードを電極パッドに合わせて千
鳥状にする必要があり、これはリード形成の制御が難し
くなるとともに、コストアップの原因にもなる。
When the pad is staggered as shown in FIG. 4,
It is necessary to make the leads of the package to be mounted in a zigzag pattern in accordance with the electrode pads, which makes it difficult to control the lead formation and causes a cost increase.

【0008】[0008]

【課題を解決するための手段】本発明の配線基板は、直
線状の電極パッドと電極パッドの片端の近傍に配置され
た電極パッドより長さが短いダミーパッドとからなるパ
ッド対が、複数個並列かつ交互に向きを変えて、同一方
向のパッド対のダミーパッドを通る直線が反対方向のパ
ッド対の電極パッドの端部を通るように配置されたパッ
ド列を有する。
The wiring board of the present invention includes a plurality of pad pairs each including a linear electrode pad and a dummy pad arranged near one end of the electrode pad and having a length shorter than that of the electrode pad. The pad rows are arranged in parallel and alternately so that the straight lines passing through the dummy pads of the pad pairs in the same direction pass through the ends of the electrode pads of the pad pairs in the opposite direction.

【0009】また、本発明のはんだ付け方法は、上記配
線基板のダミーパッド上を通るパッド列の両端に一文字
状にクリームはんだを印刷した後、電極パッド上に電子
部品のリードが載るように搭載し、その後加熱して、電
極パッドと電子部品のリードのはんだ付けを行なうこと
によって構成される。
According to the soldering method of the present invention, after the cream solder is printed in a letter shape on both ends of the pad row passing over the dummy pads of the wiring board, the leads of the electronic component are mounted on the electrode pads. Then, the electrode pad and the lead of the electronic component are soldered by heating.

【0010】[0010]

【実施例】次に、本発明について図面を参照して説明す
る。
DESCRIPTION OF THE PREFERRED EMBODIMENTS Next, the present invention will be described with reference to the drawings.

【0011】図1(a)は、本発明の配線基板の一実施
例の斜視図である。直線状の電極パッド2と電極パッド
2の片端の近傍に配置された電極パッド2より長さが短
いダミーパッド3とがパッド対となり、複数個並列かつ
交互に向きを変えて配置される。ここで、片側のダミー
パッドを通る直線AまたはBは、反対方向を向いたパッ
ド対の電極パッド2の端部を通る必要がある。本実施例
では、交互に配置されたパッド対の両端が揃うように配
置した。
FIG. 1A is a perspective view of an embodiment of the wiring board of the present invention. A linear electrode pad 2 and a dummy pad 3 arranged near one end of the electrode pad 2 and having a shorter length than the electrode pad 2 form a pad pair, and a plurality of pads are arranged in parallel and alternately turned. Here, the straight line A or B passing through the dummy pad on one side needs to pass through the end portion of the electrode pad 2 of the pad pair facing in the opposite direction. In this embodiment, the pads are arranged so that both ends of the alternately arranged pads are aligned.

【0012】図1(b)〜(d)は、本発明のはんだ付
け方法の一実施例を工程順に示す斜視図である。まず、
上記で説明した配線基板(図1(a))に、ダミーパッ
ド3及び電極パッド2の端部を通るようにパッド列の両
端にクリームはんだ4を一文字状に印刷し(図1
(b))、電極パッド2上に電子部品のリード5を位置
合わせして搭載し(図1(c))、その後リフロー炉に
よって加熱して、電極パッド2と電子部品のリード5の
はんだ付けを行ない、接合状態を形成した(図1
(d))。
1 (b) to 1 (d) are perspective views showing an embodiment of the soldering method of the present invention in the order of steps. First,
On the wiring board described above (FIG. 1A), the cream solder 4 is printed in one character on both ends of the pad row so as to pass through the ends of the dummy pad 3 and the electrode pad 2 (see FIG. 1A).
(B)) Positioning and mounting the lead 5 of the electronic component on the electrode pad 2 (FIG. 1C), and then heating by a reflow furnace to solder the electrode pad 2 and the lead 5 of the electronic component. To form a bonded state (Fig. 1
(D)).

【0013】次に、図2(a)〜(c)は、本実施例の
リフロー過程におけるクリームはんだ4の動きを詳細に
説明するための平面図である。なお、説明の簡略化のた
めリード5は省略した図を示す。パッド列の両端に印刷
されたクリームはんだ4は(図2(a))加熱すること
によって溶融し、はんだ6が隣接する電極パッド2及び
ダミーパッド3にそれぞれ濡れ拡がる(図2(b))。
このときダミーパッド3は、電極パッド2よりも濡れ面
積が小さいため、表面張力の作用ではんだ6は電極パッ
ド2に引き寄せられ、電極パッド2とダミーパッド3間
のはんだ6は非常に切れやすくなる。従って、従来によ
うな電極パッド間のはんだの塊によるブリッジが起きに
くい。また、1つの電極パッド2にはんだ6が多く引き
寄せられて、はんだ量が不均一になるということがな
く、各電極パッド2に均一にはんだ6が供給される。
Next, FIGS. 2A to 2C are plan views for explaining in detail the movement of the cream solder 4 in the reflow process of this embodiment. Note that the lead 5 is omitted for the sake of simplification of the description. The cream solder 4 printed on both ends of the pad row is melted by heating (FIG. 2A), and the solder 6 wets and spreads on the adjacent electrode pad 2 and dummy pad 3 (FIG. 2B).
At this time, since the dummy pad 3 has a smaller wetted area than the electrode pad 2, the solder 6 is attracted to the electrode pad 2 by the action of the surface tension, and the solder 6 between the electrode pad 2 and the dummy pad 3 is very easily broken. . Therefore, the bridging due to the lump of solder between the electrode pads as in the past is unlikely to occur. Further, a large amount of the solder 6 is attracted to one electrode pad 2 and the amount of solder does not become uneven, so that the solder 6 is uniformly supplied to each electrode pad 2.

【0014】また、ダミーパッド3が存在することによ
って、溶融はんだ6がつながったまま電極パッド2の長
手方向へ移動して、隣接する電極パッド2の間でブリッ
ジが発生するのを防止できる。更に、互いに隣接する電
極パッド2は、はんだ6が図2(b)の矢印Cで示すよ
うに反対方向から濡れ拡がるため、従来に比べブリッジ
ができにくくなる。また、電極パッド2と電子部品のリ
ード5とのはんだ付けが終了した後、図2(c)のよう
にブリッジ7が発生した場合でも、隣接する1組の電極
パッド2とダミーパッド3の間のブリッジ7は電子部品
のリード間のショートの原因にはならない。
Further, the presence of the dummy pad 3 can prevent the molten solder 6 from moving in the longitudinal direction of the electrode pad 2 with the molten solder 6 being connected to generate a bridge between the adjacent electrode pads 2. Further, in the electrode pads 2 adjacent to each other, the solder 6 wets and spreads from the opposite direction as shown by an arrow C in FIG. In addition, even after the bridge 7 is generated as shown in FIG. 2C after the soldering of the electrode pad 2 and the lead 5 of the electronic component is completed, the gap between the adjacent pair of the electrode pad 2 and the dummy pad 3 can be increased. The bridge 7 does not cause a short circuit between the leads of the electronic component.

【0015】このように本実施例による配線基板および
はんだ付け方法は、リード間隔の狭い部品を搭載する場
合でも、一文字印刷をするために印刷が容易であり、従
来の配線基板およびはんだ付け方法に比べて、隣接する
リード間およびパッド間のブリッジによる不良品が明ら
かに減少し、製品の歩留まりが向上する。なお、ダミー
パッド3は、面積が大きいとリフローしたときにクリー
ムはんだが切れにくくなるので、その長さは電極パッド
2の幅と同じ、またはそれ以下でよい。
As described above, the wiring board and the soldering method according to the present embodiment are easy to print because one character is printed even when a component having a narrow lead interval is mounted. Compared with this, the number of defective products due to the bridge between adjacent leads and pads is significantly reduced, and the product yield is improved. The dummy pad 3 may have a length equal to or less than the width of the electrode pad 2 because the cream solder is less likely to break when reflowing if the area of the dummy pad 3 is large.

【0016】[0016]

【発明の効果】本発明の配線基板及びそのはんだ付け方
法は、ダミーパッドを各電極パッドの一方の端部および
他方の端部に交互に設けたので、ブリッジを起きにくく
し、各電極パッドに均一にはんだを供給できる。
According to the wiring board and the soldering method thereof of the present invention, since dummy pads are alternately provided at one end and the other end of each electrode pad, a bridge is less likely to occur and each electrode pad is The solder can be supplied uniformly.

【0017】更に、本発明の配線基板においては搭載す
るリードを改造する必要が全くなく、従来の半導体パッ
ケージをそのまま使用することができるという効果があ
る。
Furthermore, in the wiring board of the present invention, there is no need to modify the leads to be mounted, and the conventional semiconductor package can be used as it is.

【0018】このように本発明の配線基板およびはんだ
付け方法は、従来通りの工程で、ブリッジによる配線不
良を極めて少なくし、はんだ付けの信頼性を上げること
ができ、製品の歩留りを向上する。
As described above, the wiring board and the soldering method of the present invention can significantly reduce wiring defects due to bridges in the conventional process, improve the reliability of soldering, and improve the product yield.

【図面の簡単な説明】[Brief description of drawings]

【図1】(a)〜(d)は本発明の一実施例を示す斜視
図である。
1A to 1D are perspective views showing an embodiment of the present invention.

【図2】(a)〜(c)は本発明の一使用例を示す平面
図である。
2A to 2C are plan views showing a usage example of the present invention.

【図3】(a)〜(c)は従来の第1の例を示す平面図
である。
3A to 3C are plan views showing a first conventional example.

【図4】従来の第2の例を示す平面図である。FIG. 4 is a plan view showing a second conventional example.

【図5】(a)〜(c)は従来の一使用例を示す斜視図
である。
5A to 5C are perspective views showing a conventional usage example.

【符号の説明】[Explanation of symbols]

2,8,11 電極パッド 3 ダミーパッド 4,9,10 クリームはんだ 5,13 リード 6,14 はんだ 7,12 ブリッジ A,B 直線 C 矢印 2,8,11 Electrode pad 3 Dummy pad 4,9,10 Cream solder 5,13 Lead 6,14 Solder 7,12 Bridge A, B Straight line C Arrow

Claims (4)

【特許請求の範囲】[Claims] 【請求項1】 実質的に一様な横方向の間隔を保ち一つ
の平面内で実質的に互いに平行な縦方向の向きを保って
それぞれ延びる複数個の外部接続用電極リードを有する
半導体集積回路装置などの電子部品の搭載を受けるとと
もに、それら電極リードがそれぞれはんだ付けされるよ
うに前記横方向間隔対応の間隔および幅で前記縦方向に
所定の長さをもってそれぞれ形成された複数個の電極パ
ッドを表面に有する印刷配線基板において、前記複数個
の電極パッドが前記横方向に実質的に直線状に配置さ
れ、それら電極パッドの各々が対応のダミーパッド形成
のため分離部分を有することと、それら電極パッドの互
いに相隣る一対については前記分離部分が対応電極パッ
ドの前記縦方向両端部に対称的に配置されていることを
特徴とする印刷配線基板。
1. A semiconductor integrated circuit having a plurality of external connection electrode leads, each extending substantially in a horizontal direction and in a plane in a plane direction substantially parallel to each other. A plurality of electrode pads each formed with a predetermined length in the vertical direction at intervals and widths corresponding to the lateral intervals so that the electrode leads are soldered to the electronic components such as devices. A printed wiring board having a surface on which the plurality of electrode pads are arranged substantially linearly in the lateral direction, and each of the electrode pads has a separating portion for forming a corresponding dummy pad; The printed wiring board characterized in that, for a pair of adjacent electrode pads, the separated portions are symmetrically arranged at both ends in the vertical direction of the corresponding electrode pad. Board.
【請求項2】 前記電極パッドの各々が前記縦方向に細
長い方形をもち、前記分離部分の各々がその方形と同一
の幅でその方形よりも著しく小さい長さをもつことを特
徴とする請求項1の印刷配線基板。
2. The electrode pads each have an elongated rectangular shape in the longitudinal direction, and each of the separation portions has the same width as the rectangular shape and a length significantly smaller than the rectangular shape. 1 printed wiring board.
【請求項3】 前記複数個の電極パッドの各々の前記分
離部分をそれぞれ覆うように前記電極パッドの前記縦方
向両端部を前記横方向に横切って配置されたはんだ部材
が加熱により溶融した状態において溶融はんだがその表
面張力により前記分離部分が前記電極パッドに向って集
まるように、前記電極パッドの幅および前記分離部分の
長さを選んであることを特徴とする請求項1の印刷配線
基板。
3. A solder member, which is arranged across the both longitudinal ends of the electrode pad in the lateral direction so as to cover each of the separated portions of the plurality of electrode pads, is melted by heating. 2. The printed wiring board according to claim 1, wherein the width of the electrode pad and the length of the separated portion are selected so that the molten solder gathers toward the electrode pad by the surface tension of the molten solder.
【請求項4】 実質的に一様な横方向の間隔を保ち一つ
の平面内で実質的に互いに平行な縦方向の向きを保って
それぞれ延びる複数個の外部接続用電極リードを有する
半導体集積回路装置などの電子部品の搭載を受けるとと
もに、それら電極リードがそれぞれはんだ付けされるよ
うに前記横方向間隔対応の間隔および幅で前記縦方向に
所定の長さをもってそれぞれ形成された複数個の電極パ
ッドを表面に有する印刷配線基板であって、前記複数個
の電極パッドが前記横方向に実質的に直線状に配置さ
れ、それら電極パッドの各々が対応のダミーパッド形成
のため分離部分を有し、それら電極パッドの互いに相隣
る一対については前記分離部分が対応電極パッドの前記
縦方向両端部に対称的に配置されている印刷配線基板を
用意する工程と、 前記分離部分を覆うように前記電極パッドの前記縦方向
両端部を前記横方向に横切ってクリームはんだを選択的
に配置する工程と、 前記電極リードを前記電極パッドに位置合せして前記電
子部品を前記印刷配線基板に搭載する工程と、 前記電極リード,電極パッドおよびクリームはんだを加
熱して前記リードを前記電極パッドにはんだ付けする工
程とを含む印刷配線基板への電子部品のはんだ付け方
法。
4. A semiconductor integrated circuit having a plurality of external connection electrode leads each extending substantially in the same horizontal direction and in the same plane in a vertical direction substantially parallel to each other. A plurality of electrode pads each formed with a predetermined length in the vertical direction at intervals and widths corresponding to the lateral intervals so that the electrode leads are soldered to the electronic components such as devices. A printed wiring board having a surface on which the plurality of electrode pads are arranged substantially linearly in the lateral direction, and each of the electrode pads has a separation portion for forming a corresponding dummy pad, A step of preparing a printed wiring board in which the separated portions of the pair of electrode pads adjacent to each other are symmetrically arranged at both ends of the corresponding electrode pad in the vertical direction; Selectively placing cream solder across the longitudinal ends of the electrode pad in the lateral direction so as to cover the separated portion; and aligning the electrode lead with the electrode pad to provide the electronic component A method for soldering an electronic component to a printed wiring board, comprising: mounting the printed wiring board on the printed wiring board; and heating the electrode lead, the electrode pad, and cream solder to solder the lead to the electrode pad.
JP42593A 1993-01-06 1993-01-06 Wiring board and soldering method thereof Expired - Lifetime JPH0760931B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP42593A JPH0760931B2 (en) 1993-01-06 1993-01-06 Wiring board and soldering method thereof

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP42593A JPH0760931B2 (en) 1993-01-06 1993-01-06 Wiring board and soldering method thereof

Publications (2)

Publication Number Publication Date
JPH06204653A JPH06204653A (en) 1994-07-22
JPH0760931B2 true JPH0760931B2 (en) 1995-06-28

Family

ID=11473458

Family Applications (1)

Application Number Title Priority Date Filing Date
JP42593A Expired - Lifetime JPH0760931B2 (en) 1993-01-06 1993-01-06 Wiring board and soldering method thereof

Country Status (1)

Country Link
JP (1) JPH0760931B2 (en)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6638793B1 (en) * 2002-03-04 2003-10-28 Taiwan Semiconductor Manufacturing Company Methodology to pack standard staggered bond input-output buffer into linear input-output buffer

Also Published As

Publication number Publication date
JPH06204653A (en) 1994-07-22

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