JPH0760881B2 - Solder application method for semiconductor devices - Google Patents

Solder application method for semiconductor devices

Info

Publication number
JPH0760881B2
JPH0760881B2 JP1186635A JP18663589A JPH0760881B2 JP H0760881 B2 JPH0760881 B2 JP H0760881B2 JP 1186635 A JP1186635 A JP 1186635A JP 18663589 A JP18663589 A JP 18663589A JP H0760881 B2 JPH0760881 B2 JP H0760881B2
Authority
JP
Japan
Prior art keywords
solder
semiconductor chip
semiconductor device
granular
lead frame
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
JP1186635A
Other languages
Japanese (ja)
Other versions
JPH0350853A (en
Inventor
政道 進藤
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Toshiba Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp filed Critical Toshiba Corp
Priority to JP1186635A priority Critical patent/JPH0760881B2/en
Priority to KR1019900010746A priority patent/KR910003775A/en
Publication of JPH0350853A publication Critical patent/JPH0350853A/en
Publication of JPH0760881B2 publication Critical patent/JPH0760881B2/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/50Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
    • H01L21/60Attaching or detaching leads or other conductive members, to be used for carrying current to or from the device in operation
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/30Assembling printed circuits with electric components, e.g. with resistor
    • H05K3/32Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits
    • H05K3/34Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits by soldering
    • H05K3/3457Solder materials or compositions; Methods of application thereof

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Lead Frames For Integrated Circuits (AREA)
  • Electric Connection Of Electric Components To Printed Circuits (AREA)

Description

【発明の詳細な説明】 〔発明の目的〕 (産業上の利用分野) 本発明は半導体装置の金属部に半田を塗布する半導体装
置の半田塗布方法に関する。
DETAILED DESCRIPTION OF THE INVENTION Object of the Invention (Field of Industrial Application) The present invention relates to a solder application method for a semiconductor device, which applies solder to a metal part of the semiconductor device.

(従来の技術) 従来、電子回路に使用される実装基板や、被実装部品で
ある半導体チップ樹脂封止済リードフレーム体等の半導
体装置には、実装前に予め半田が塗布されている。
(Prior Art) Conventionally, a mounting substrate used for an electronic circuit or a semiconductor device such as a semiconductor chip resin-sealed lead frame body, which is a mounted component, is previously coated with solder before mounting.

半田は実装基板や被実装部品の金属部に塗布され、実装
時に配線部の接合を容易に行なうことができるようにな
っている。
The solder is applied to the mounting substrate and the metal portion of the mounted component so that the wiring portion can be easily joined at the time of mounting.

半田の塗布方法としては、半田メッキまたは半田槽への
浸漬(半田ディップ)が一般に行なわれている。
As a method of applying solder, solder plating or immersion in a solder bath (solder dip) is generally performed.

しかしながら、これらの半田塗布方法によれば、いずれ
の場合も半田を所定の厚さでかつ均一に塗布することは
むずかしくなっている。このため、被実装部品を実装基
板に実装する際、フラックスを含有するクリーム半田を
再度実装基板の必要箇所に追加して塗布している。
However, according to these solder application methods, in any case, it is difficult to apply the solder uniformly with a predetermined thickness. For this reason, when mounting the component to be mounted on the mounting board, cream solder containing flux is additionally applied to the necessary portions of the mounting board.

(発明が解決しようとする課題) 上述した半田の塗布方法は、半田メッキまたは半田ディ
ップのいずれの場合も湿式工程により行なわれるため、
使用済溶液を廃棄するために排水処理装置が必要とな
る。また半田を所定の厚さでかつ均一に塗布するために
は、高価な制御装置が必要となる。
(Problems to be Solved by the Invention) Since the above-described solder coating method is performed by a wet process in either case of solder plating or solder dipping,
A wastewater treatment device is required to discard the used solution. Further, in order to apply the solder with a predetermined thickness and uniformly, an expensive control device is required.

なお、半田の塗布方法のうち、半田メッキの場合は、塗
布された半田の中に、半田以外の有機物を含むことがあ
る。このように他の有機物を含むと、その後の実装作業
に支障が生じる。
In the case of solder plating among the methods of applying solder, the applied solder may include an organic substance other than the solder. Such inclusion of other organic substances may interfere with subsequent mounting work.

一方、半田ディップにより塗布する場合、例えば被実装
部品のリード線のリードピッチが狭くなると(0.8mm程
度以下)、リード線間で塗布された半田によりブリッジ
が形成されることがある。
On the other hand, when applying by solder dip, for example, when the lead pitch of the lead wires of the mounted component becomes narrow (about 0.8 mm or less), the solder applied between the lead wires may form a bridge.

また半田ディップにより塗布する場合、熱の影響で被実
装部品の半導体チップ等を劣化させることがある。
In addition, when applying by solder dip, the semiconductor chip or the like of the mounted component may be deteriorated due to the influence of heat.

本発明はこのような点を考慮してなされたものであり、
所定の厚さでかつ均一に半田を塗布することができると
ともに、塗布作業を容易かつ低コストに行なうことがで
き、被塗布部品を傷めることのない半導体装置の半田塗
布方法を提供することを目的とする。
The present invention has been made in consideration of such points,
An object of the present invention is to provide a solder applying method for a semiconductor device, which can apply solder with a predetermined thickness and evenly, which can be applied easily and at low cost, and which does not damage parts to be applied. And

〔発明の構成〕[Structure of Invention]

(課題を解決するための手段) 本発明は、表面にフラックスがコーティングされた多数
の粒状半田を形成し、この粒状半田を静電塗布法により
半導体装置の金属部に塗布することを特徴とする半導体
装置の半田塗布方法である。
(Means for Solving the Problems) The present invention is characterized in that a large number of granular solders having a surface coated with flux are formed and the granular solders are applied to a metal part of a semiconductor device by an electrostatic coating method. This is a method for applying solder to a semiconductor device.

(作 用) 本発明によれば、静電塗布法により粒状半田を塗布する
ことにより、半導体装置の金属部に所定の厚さに均一に
半田を塗布することができる。
(Operation) According to the present invention, by applying the granular solder by the electrostatic coating method, the solder can be uniformly applied to the metal portion of the semiconductor device to a predetermined thickness.

(実施例) 以下、図面を参照して本発明の実施例を説明する。Embodiments Embodiments of the present invention will be described below with reference to the drawings.

第1図は本発明による半導体装置の半田塗布方法の一実
施例を示す図である。
FIG. 1 is a diagram showing an embodiment of a solder coating method for a semiconductor device according to the present invention.

本実施例において、半導体装置として、第1図に示すよ
うな半導体チップ樹脂封止済リードフレーム体1を用い
た。
In this embodiment, a semiconductor chip resin-sealed lead frame body 1 as shown in FIG. 1 was used as the semiconductor device.

この半導体チップ樹脂封止済リードフレーム体1は、リ
ードフレーム2に半導体チップ(図示せず)をマウント
し、この半導体チップおよび配線部回りをモールド樹脂
3で樹脂封止したものである。また、モールド樹脂3の
外方には、複数のリード線4が突出している。
The semiconductor chip resin-sealed lead frame body 1 is obtained by mounting a semiconductor chip (not shown) on the lead frame 2 and resin-sealing the semiconductor chip and the periphery of the wiring portion with a mold resin 3. Further, a plurality of lead wires 4 project outside the mold resin 3.

次に半田塗布方法について詳述する。Next, the solder application method will be described in detail.

まず、粒径が数10μm〜数100μmの多数の粒状半田を
用意し、この粒状半田の表面に有機系フラックスをコー
ティングする。このフラックスは半田の確実な接合を助
けるものである。
First, a large number of granular solder particles having a particle diameter of several tens of μm to several hundreds μm are prepared, and the surface of the granular solder is coated with an organic flux. This flux assists in reliable joining of the solder.

続いて、第1図に示す半導体チップ樹脂封止済リードフ
レーム体1を接地して陽極とし、一方、塗布機(図示せ
ず)を陰極とし、両極間に高電圧を印加して静電場を形
成する。続いて、この静電場にフラックスがコーティン
グされた粒状半田を所定量霧状にして送込む。このよう
にして、半導体チップ樹脂封止済リードフレーム体1の
金属部(モールド樹脂3を除いた部分)表面に粒状半田
が所定の厚さに均一に塗布される。この場合、モールド
樹脂3を被覆することにより、粒状半田を良好に塗布す
ることができる。
Subsequently, the semiconductor chip resin-sealed lead frame body 1 shown in FIG. 1 is grounded to serve as an anode, while an applicator (not shown) serves as a cathode, and a high voltage is applied between both electrodes to generate an electrostatic field. Form. Subsequently, the electrostatic field is sprayed with a predetermined amount of granular solder coated with a flux. In this way, the granular solder is uniformly applied to the surface of the metal portion (the portion excluding the mold resin 3) of the semiconductor chip resin-sealed lead frame body 1 to a predetermined thickness. In this case, by coating the mold resin 3, the granular solder can be applied well.

続いて、半導体チップ樹脂封止済リードフレーム体1の
塗布部分を半田溶融温度以上に加熱することにより、良
質の半田被膜を形成することができる。
Then, by heating the applied portion of the semiconductor chip resin-sealed lead frame body 1 to the solder melting temperature or higher, a good quality solder coating can be formed.

このように半田被覆が形成された半導体チップ樹脂封止
済リードフレーム体1は、その後リード線4部分で破断
され、半導体チップを樹脂封止したモールド樹脂3側が
実装基板(図示せず)に実装される。
The semiconductor chip resin-sealed lead frame body 1 with the solder coating thus formed is then broken at the lead wires 4 and the side of the mold resin 3 in which the semiconductor chip is resin-sealed is mounted on a mounting board (not shown). To be done.

本実施例によれば、所定量の粒状半田を静電塗布法によ
り半導体チップ樹脂封止済リードフレーム体1の金属部
に塗布し、その後この塗布部分を加熱することにより、
所定の厚さでかつ均一な半田被覆を形成することができ
る。このため実装時に再度半田を塗布する必要はない。
また、従来のような湿式工程によらずに半田を塗布する
ことができるので、排水処理装置等の特殊な付帯設備を
設ける必要はなく、製造コストの低減を図ることができ
る。
According to the present embodiment, a predetermined amount of granular solder is applied to the metal portion of the semiconductor chip resin-sealed lead frame body 1 by the electrostatic coating method, and then the coated portion is heated,
It is possible to form a uniform solder coating with a predetermined thickness. Therefore, it is not necessary to apply solder again at the time of mounting.
Further, since the solder can be applied without using a wet process as in the past, it is not necessary to provide a special auxiliary equipment such as a wastewater treatment device, and the manufacturing cost can be reduced.

なお、上記実施例において、半導体装置として、半導体
チップ樹脂封止済リードフレーム体1を用いた例を示し
たが、これに限らず例えば実装基板の金属部に半田を塗
布してもよい。
In addition, in the above-described embodiment, an example in which the semiconductor chip resin-sealed lead frame body 1 is used as the semiconductor device is shown, but the invention is not limited to this, and for example, solder may be applied to the metal portion of the mounting substrate.

〔発明の効果〕〔The invention's effect〕

以上説明したように、本発明によれば、静電塗布法によ
り粒状半田を塗布することにより、半導体装置の金属部
に所定の厚さに均一に半田を塗布することができる。こ
のため、容易かつ確実な実装作業を行なうことができ
る。また湿式工程によらずに半田を塗布することができ
るので、排水処理装置等の特殊な付帯設備を設ける必要
はなく、製造コストの低減を図ることができる。
As described above, according to the present invention, by applying the granular solder by the electrostatic coating method, the solder can be uniformly applied to the metal portion of the semiconductor device to a predetermined thickness. Therefore, the mounting work can be performed easily and surely. Further, since solder can be applied without using a wet process, it is not necessary to provide special auxiliary equipment such as a wastewater treatment device, and the manufacturing cost can be reduced.

【図面の簡単な説明】[Brief description of drawings]

第1図は本発明による半導体装置の半田塗布方法によっ
て塗布される半導体チップ樹脂封止済リードフレーム体
を示す斜視図である。 1……半導体チップ樹脂封止済リードフレーム体、2…
…リードフレーム、3……モールド樹脂、4……リード
線。
FIG. 1 is a perspective view showing a semiconductor chip resin-sealed lead frame body coated by a solder coating method for a semiconductor device according to the present invention. 1 ... Lead frame body sealed with semiconductor chip resin, 2 ...
… Lead frame, 3… Mold resin, 4… Lead wire.

Claims (1)

【特許請求の範囲】[Claims] 【請求項1】表面にフラックスがコーティングされた多
数の粒状半田を形成し、この粒状半田を静電塗布法によ
り半導体装置の金属部に塗布することを特徴とする半導
体装置の半田塗布方法。
1. A method for applying solder to a semiconductor device, comprising forming a large number of granular solders having a surface coated with flux and applying the granular solders to a metal portion of the semiconductor device by an electrostatic coating method.
JP1186635A 1989-07-19 1989-07-19 Solder application method for semiconductor devices Expired - Fee Related JPH0760881B2 (en)

Priority Applications (2)

Application Number Priority Date Filing Date Title
JP1186635A JPH0760881B2 (en) 1989-07-19 1989-07-19 Solder application method for semiconductor devices
KR1019900010746A KR910003775A (en) 1989-07-19 1990-07-16 Solder coating method of semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP1186635A JPH0760881B2 (en) 1989-07-19 1989-07-19 Solder application method for semiconductor devices

Publications (2)

Publication Number Publication Date
JPH0350853A JPH0350853A (en) 1991-03-05
JPH0760881B2 true JPH0760881B2 (en) 1995-06-28

Family

ID=16192035

Family Applications (1)

Application Number Title Priority Date Filing Date
JP1186635A Expired - Fee Related JPH0760881B2 (en) 1989-07-19 1989-07-19 Solder application method for semiconductor devices

Country Status (2)

Country Link
JP (1) JPH0760881B2 (en)
KR (1) KR910003775A (en)

Families Citing this family (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2592757B2 (en) * 1992-10-30 1997-03-19 昭和電工株式会社 Solder circuit board and method for forming the same
US5556023A (en) * 1992-10-30 1996-09-17 Showa Denko K.K. Method of forming solder film
US5529682A (en) * 1995-06-26 1996-06-25 Motorola, Inc. Method for making semiconductor devices having electroplated leads
KR970064335A (en) * 1996-02-01 1997-09-12 빈센트 비. 인그라시아 Method and apparatus for forming a conductive layer on printed wiring board terminals
JP4450578B2 (en) * 2003-07-30 2010-04-14 東海東洋アルミ販売株式会社 Joining method and joining apparatus

Also Published As

Publication number Publication date
JPH0350853A (en) 1991-03-05
KR910003775A (en) 1991-02-28

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