JPH0758434A - Method of manufacturing printed wiring board - Google Patents
Method of manufacturing printed wiring boardInfo
- Publication number
- JPH0758434A JPH0758434A JP20535493A JP20535493A JPH0758434A JP H0758434 A JPH0758434 A JP H0758434A JP 20535493 A JP20535493 A JP 20535493A JP 20535493 A JP20535493 A JP 20535493A JP H0758434 A JPH0758434 A JP H0758434A
- Authority
- JP
- Japan
- Prior art keywords
- dimensional
- printed wiring
- conductive layer
- resist
- wiring board
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Withdrawn
Links
Classifications
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/0073—Masks not provided for in groups H05K3/02 - H05K3/46, e.g. for photomechanical production of patterned surfaces
- H05K3/0082—Masks not provided for in groups H05K3/02 - H05K3/46, e.g. for photomechanical production of patterned surfaces characterised by the exposure method of radiation-sensitive masks
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/02—Apparatus or processes for manufacturing printed circuits in which the conductive material is applied to the surface of the insulating support and is thereafter removed from such areas of the surface which are not intended for current conducting or shielding
- H05K3/06—Apparatus or processes for manufacturing printed circuits in which the conductive material is applied to the surface of the insulating support and is thereafter removed from such areas of the surface which are not intended for current conducting or shielding the conductive material being removed chemically or electrolytically, e.g. by photo-etch process
- H05K3/061—Etching masks
- H05K3/064—Photoresists
Landscapes
- Manufacturing Of Printed Circuit Boards (AREA)
- Photosensitive Polymer And Photoresist Processing (AREA)
Abstract
Description
【０００１】[0001]
【産業上の利用分野】本発明は、立体的なプリント配線
板の製造方法に関するものである。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for manufacturing a three-dimensional printed wiring board.
【０００２】[0002]
【従来の技術】従来、立体成形品を絶縁基板とするプリ
ント配線板の製造方法における回路形成は、図２を用い
て説明すると、立体成形品（１）の表面を適度な表面粗
さに粗化した後、無電解メッキ及び電解メッキ等によ
り、全面に回路導体用の銅等の導電層（２）を形成す
る。次に、その導電層（２）の表面に感光性を有する電
着レジスト（３）等の膜を形成し、平行光により平面露
光用マスク（５）を介して露光し、現像してエッチング
レジストを形成した後、露出した導電層（２）をエッチ
ングすることにより立体的な絶縁基板の三次元の表面に
回路パタ−ンを形成するという方法が用いられてきた。2. Description of the Related Art Conventionally, circuit formation in a method of manufacturing a printed wiring board using a three-dimensional molded product as an insulating substrate will be described with reference to FIG. 2. The surface of the three-dimensional molded product (1) is roughened to an appropriate surface roughness. Then, a conductive layer (2) such as copper for a circuit conductor is formed on the entire surface by electroless plating, electrolytic plating or the like. Then, a film such as an electrodeposition resist (3) having photosensitivity is formed on the surface of the conductive layer (2), and the film is exposed to parallel light through a mask (5) for plane exposure and developed to be an etching resist. After forming the conductive layer, the exposed conductive layer (2) is etched to form a circuit pattern on the three-dimensional surface of the three-dimensional insulating substrate.
【０００３】ここで、電着レジスト（３）は、光が当た
ると硬化または溶解する感光性を有し現像工程で不要の
電着レジスト（３）を除去して、不要の導電層（２）を
露出させると回路パターンに必要な導電層（２）は、エ
ッチングレジストで覆われて保護されるためエッチング
液で溶解されずに残る。したがって、エッチングが完了
した後は、使用したエッチングレジストを剥離液で剥離
を行うことにより上記の導電層（２）から回路パターン
が立体成形品（１）の三次元の表面に形成される。Here, the electrodeposition resist (3) has photosensitivity such that it cures or dissolves when exposed to light, and the unnecessary electrodeposition resist (3) is removed in the developing process to remove the unnecessary conductive layer (2). When exposed, the conductive layer (2) necessary for the circuit pattern remains covered without being dissolved by the etching solution because it is covered and protected by the etching resist. Therefore, after the etching is completed, the used etching resist is peeled off with a peeling liquid, whereby a circuit pattern is formed on the three-dimensional surface of the three-dimensional molded product (1) from the conductive layer (2).
【０００４】しかし、平面露光用マスク（５）を用いて
露光する方法では、立体成形品（１）の表面が凹凸の段
差が大きい場合には、平面露光用マスク（５）と電着レ
ジス（３）との間に隙間が出来、光の回り込みにより光
が拡散してぼやけるため、必要な回路パターンを正確に
得ることが出来ない。特に、微細な回路パタ−ンの形成
が困難であるという欠点がある。However, in the method of exposing using the mask for flat exposure (5), when the surface of the three-dimensional molded product (1) has large unevenness of unevenness, the mask for flat exposure (5) and the electrodeposition resist ( 3), a gap is formed, and the light diffuses and blurs due to the wraparound of the light, so that the necessary circuit pattern cannot be obtained accurately. In particular, there is a drawback that it is difficult to form a fine circuit pattern.
【０００５】[0005]
【発明が解決しようとする課題】本発明は上記の欠点を
除去するためになされたもので、その目的とするところ
は、凹凸のある複雑な立体成形品からなる絶縁基板の三
次元の表面に高精度のプリント配線回路を形成するプリ
ント配線板の製造方法を提供することにある。SUMMARY OF THE INVENTION The present invention has been made in order to eliminate the above-mentioned drawbacks, and an object of the present invention is to provide a three-dimensional surface of an insulating substrate composed of a complex three-dimensional molded article having irregularities. An object of the present invention is to provide a method for manufacturing a printed wiring board that forms a highly accurate printed wiring circuit.
【０００６】[0006]
【課題を解決するための手段】本発明に係るプリント配
線板の製造方法は、絶縁性を有する立体成形品（１）の
三次元の表面に、導電層（２）を形成すると共にエッチ
ングすることによりプリント配線回路を形成するプリン
ト配線板の製造方法において、導電層（２）に感光性を
有する電着レジスト（３）を形成するとともに、立体成
形品（１）を成形する金型と同一の賦形面を有する金型
を用いて成形した立体露光用マスク（４）を介して平行
光により電着レジスト（３）を露光し現像してエッチン
グレジストを形成後、露出した導電層（２）をエッチン
グし次に電着レジスト（３）を剥離することによりプリ
ント配線回路を形成することを特徴とするものである。In the method for manufacturing a printed wiring board according to the present invention, a conductive layer (2) is formed and etched on a three-dimensional surface of a three-dimensional molded product (1) having an insulating property. In the method for manufacturing a printed wiring board in which a printed wiring circuit is formed by using the same method as the metal mold for forming the three-dimensional molded article (1) while forming a photosensitive electrodeposition resist (3) on the conductive layer (2). After exposing the electrodeposition resist (3) by parallel light through a three-dimensional exposure mask (4) formed using a mold having a shaping surface and developing it to form an etching resist, the exposed conductive layer (2) And then the electrodeposition resist (3) is peeled off to form a printed wiring circuit.
【０００７】[0007]
【作用】本発明によって製造されるプリント配線板は，
立体成形品（１）を成形する金型と同一の賦形面を有す
る金型を用いて成形した立体露光用マスク（４）を用い
るため、立体露光用マスク（４）が立体成形品（１）の
表面の導電層（２）に形成された電着レジスト（３）に
必然的に密接した状態になる。したがって、電着レジス
ト（３）と立体露光用マスク（４）との間に隙間がない
状態で露光されるため、微細な回路パターンを正確に形
成することができる。The printed wiring board manufactured according to the present invention is
Since the three-dimensional exposure mask (4) formed by using the mold having the same shaping surface as the mold for molding the three-dimensional molded product (1) is used, the three-dimensional exposure mask (4) is the three-dimensional molded product (1 (3) is inevitably closely attached to the electrodeposition resist (3) formed on the conductive layer (2) on the surface of (1). Therefore, since the exposure is performed with no gap between the electrodeposition resist (3) and the three-dimensional exposure mask (4), a fine circuit pattern can be accurately formed.
【０００８】以下、本発明を詳述する。図１は、本発明
のプリント配線板の製造に用いる立体露光用マスクと導
電層を備えた絶縁基板との関係を示す断面図である。The present invention will be described in detail below. FIG. 1 is a cross-sectional view showing the relationship between a three-dimensional exposure mask used for manufacturing the printed wiring board of the present invention and an insulating substrate provided with a conductive layer.
【０００９】図１に示すように、プリント配線板の立体
的な絶縁基板となる凹凸のある形状からなる立体成形品
（１）は、例えば熱硬化性樹脂または、熱可塑性樹脂等
を使用して射出成形等により成形して得られたものであ
る。もちろん射出成形のみに限定されるものではなく、
切削加工により凹凸のある立体成形品（１）に仕上げて
もよい。As shown in FIG. 1, a three-dimensional molded product (1) having a concave and convex shape which serves as a three-dimensional insulating substrate of a printed wiring board is made of, for example, a thermosetting resin or a thermoplastic resin. It is obtained by molding by injection molding or the like. Of course, it is not limited to injection molding,
A three-dimensional molded product (1) having unevenness may be finished by cutting.
【００１０】その立体成形品（１）の三次元の表面を適
度な表面粗さに粗化して導電層（２）を密着し易くした
後、無電解メッキ及び電解メッキ等により、全面に回路
導体用の銅等の導電層（２）を形成する。次に、その導
電層（２）の表面に感光性を有する電着レジスト（３）
例えば光硬化型または光溶解型の電着レジスト（３）を
形成する。感光性を有するレジストとして、電着レジス
ト（３）に制限する理由は、一般の液状レジストでは、
立体成形品（１）の凹凸のある三次元の表面に形成して
も凹凸への追従性は、１０μｍ程度までであり、回路形
成の精度が悪いのに対し、電着レジスト（３）では、立
体成形品（１）の凹凸のある三次元の表面に完全に追従
して密着でき、回路形成の精度が良くなるためである。After the three-dimensional surface of the three-dimensional molded article (1) is roughened to a suitable surface roughness to facilitate the adhesion of the conductive layer (2), electroless plating and electrolytic plating are performed to form a circuit conductor on the entire surface. A conductive layer (2) of copper or the like is formed. Next, an electrodeposition resist (3) having photosensitivity on the surface of the conductive layer (2)
For example, a photo-curing or photo-melting type electrodeposition resist (3) is formed. The reason why the resist having photosensitivity is limited to the electrodeposition resist (3) is that in a general liquid resist,
Even when formed on the uneven three-dimensional surface of the three-dimensional molded product (1), the followability to the unevenness is up to about 10 μm, and the circuit formation accuracy is poor, whereas the electrodeposition resist (3) This is because the three-dimensional molded product (1) can be closely followed and adhered to the uneven three-dimensional surface, and the accuracy of circuit formation is improved.
【００１１】ここで、光硬化型の電着レジスト（３）
は、光が当たると硬化し、光溶解型の電着レジスト
（３）は、光が当たると溶解する。従って、現像工程で
光硬化型の電着レジスト（３）を用いた場合には、未露
光部の電着レジスト（３）がアルカリ水溶液等の現像液
で溶解除去され、未露光部に導電層（２）が露出し、光
溶解型の電着レジスト（３）を用いた場合には、逆に露
光部の電着レジスト（３）が現像液で溶解除去され、露
光部に導電層（２）が露出する。Here, a photo-curing type electrodeposition resist (3)
Is cured when exposed to light, and the photodissolution type electrodeposition resist (3) is dissolved when exposed to light. Therefore, when the photo-curable electrodeposition resist (3) is used in the developing step, the electrodeposition resist (3) in the unexposed area is dissolved and removed by a developing solution such as an alkaline aqueous solution and the conductive layer is formed in the unexposed area. When (2) is exposed and the photodissolving type electrodeposition resist (3) is used, conversely, the electrodeposition resist (3) in the exposed area is dissolved and removed by a developing solution, and the conductive layer (2) is formed in the exposed area. ) Is exposed.
【００１２】光硬化型の電着レジスト（３）を用いた場
合には、露光部に導電層（２）が残り、光溶解型の電着
レジスト（３）を用いた場合には、逆に未露光部に導電
層（２）が残り回路が形成されることになる。When the photo-curing type electrodeposition resist (3) is used, the conductive layer (2) remains in the exposed portion, and when the photo-melting type electrodeposition resist (3) is used, conversely. The conductive layer (2) remains in the unexposed portion to form a circuit.
【００１３】現像により露出した導電層（２）を例えば
塩化第二銅溶液等のエッチング液で化学的に溶解する。
エッチングが完了した後は、使用した電着レジスト
（３）を塩化メチレン等の剥離液で剥離を行うと導電層
（２）に回路パターンが現出する。The conductive layer (2) exposed by the development is chemically dissolved with an etching solution such as a cupric chloride solution.
After the etching is completed, when the used electrodeposition resist (3) is stripped with a stripping solution such as methylene chloride, a circuit pattern appears on the conductive layer (2).
【００１４】平行光による電着レジスト（３）の露光、
現像は、立体成形品（１）を成形する金型と同一の賦形
面を有する金型を用いて成形または、しぼり加工で作製
した立体露光用マスク（４）を介して行う。現像してエ
ッチングレジストを形成した後、導電層（２）をエッチ
ングすることにより立体成形品（１）の表面に所望の回
路パタ−ンを形成することが出来る。Exposure of the electrodeposition resist (3) by parallel light,
The development is carried out through a three-dimensional exposure mask (4) which is molded or squeezed using a mold having the same shaping surface as the mold for molding the three-dimensional molded product (1). After development to form an etching resist, the conductive layer (2) is etched to form a desired circuit pattern on the surface of the three-dimensional molded article (1).
【００１５】この立体露光用マスク（４）は、銅、アル
ミ等の金属であっても、ポリエステル等の樹脂であって
もよく材質を問わない。The three-dimensional exposure mask (4) may be made of a metal such as copper or aluminum or a resin such as polyester and may be made of any material.
【００１６】しかも立体露光用マスク（４）は、立体成
形品（１）を成形する金型と同一の賦形面を有する金型
を用いて成形されたり、しぼり加工によって立体成形品
（１）と同一の賦形面を有するように作製されるため、
立体成形品（１）の表面の導電層（２）に形成された電
着レジスト（３）に必然的に隙間のない状態で密接す
る。すなわち、露光時に光が拡散してぼやけるというよ
うなことがなく、必要な回路パターンを正確に得ること
が出来、微細な回路パターンの形成が可能になる。Moreover, the three-dimensional exposure mask (4) is molded by using a mold having the same shaping surface as the mold for molding the three-dimensional molded product (1), or the three-dimensional molded product (1) is squeezed. Since it is made to have the same shaped surface as
The three-dimensional molded product (1) is in close contact with the electrodeposition resist (3) formed on the conductive layer (2) on the surface of the three-dimensional molded product (1) without inevitably leaving a gap. That is, it is possible to accurately obtain a necessary circuit pattern and prevent the formation of a fine circuit pattern without causing light to diffuse and blur during exposure.
【００１７】[0017]
【実施例】露光用マスクとして厚み５０μｍの銅シ−ト
を使用し、立体成形品（１）を成形する金型と同一の賦
形面を有する金型を用いてしぼり加工した立体の銅シ−
トをレ−ザ−加工で切り抜き、図１に示すように非露光
部（４ａ）の幅を１００μｍ、露光部（４ｂ）の幅を１
００μｍに形成し、Ｌ（ライン）／Ｓ（スペース）＝１
００μｍ／１００μｍのモデルパターンの立体露光用マ
スク（４）を作製した。そしてその銅の立体露光用マス
ク（４）を電着レジスト（３）の表面に密接させ、平行
光により６００ｍＪ／ｃｍ2 の光量で露光した。なお、
電着レジスト（３）は、光溶解型を使用した。EXAMPLE A copper sheet having a thickness of 50 μm was used as an exposure mask, and a three-dimensional copper sheet was squeezed using a die having the same shaping surface as the die for forming the three-dimensional molded article (1). −
The laser beam is cut out by laser processing, and the width of the unexposed portion (4a) is 100 μm and the width of the exposed portion (4b) is 1
Formed to 00 μm, L (line) / S (space) = 1
A mask (4) for stereoscopic exposure having a model pattern of 00 μm / 100 μm was produced. Then, the copper three-dimensional exposure mask (4) was brought into close contact with the surface of the electrodeposition resist (3) and exposed by parallel light with a light amount of 600 mJ / cm 2 . In addition,
As the electrodeposition resist (3), a photodissolution type was used.
【００１８】その結果、露光の線幅１００μｍに対して
回路の線幅を１００±１０μｍの範囲内で形成できた。As a result, the circuit line width could be formed within the range of 100 ± 10 μm with respect to the exposure line width of 100 μm.
【００１９】また、ポリエステルフィルムに上記と同様
のパターンを形成したものを立体成形品（１）を成形す
る金型と同一の賦形面を有する金型を用いて成形したフ
ィルムの立体露光用マスク（４）を電着レジスト（３）
の表面に密接させ、平行光により６００ｍＪ／ｃｍ2 の
光量で露光した。電着レジスト（３）は、上記と同様に
光溶解型を使用した。A mask for three-dimensional exposure of a film obtained by molding a polyester film having the same pattern as that described above using a mold having the same shaping surface as the mold for molding the three-dimensional molded product (1). (4) Electrodeposition resist (3)
Was intimately contacted with the surface of and was exposed by parallel light with a light amount of 600 mJ / cm 2 . As the electrodeposition resist (3), a photo-melting type was used as in the above.
【００２０】その結果、上記と同様に露光の線幅１００
μｍに対して回路の線幅を１００±１０μｍの範囲内で
形成できた。As a result, the exposure line width 100
The line width of the circuit could be formed within the range of 100 ± 10 μm with respect to μm.
【００２１】[0021]
【比較例】図２に示すようにポリエステルフィルムに上
記実施例と同様のパターンを形成したポリエステルフィ
ルムの平面露光用マスク（５）を電着レジスト（３）の
表面に置き、平行光により６００ｍＪ／ｃｍ2 の光量で
露光した。電着レジスト（３）は、上記と同様に光溶解
型を使用した。[Comparative Example] As shown in FIG. 2, a mask for flat exposure (5) of a polyester film in which the same pattern as in the above-mentioned example is formed on a polyester film is placed on the surface of the electrodeposition resist (3), and 600 mJ / It was exposed with a light amount of cm 2 . As the electrodeposition resist (3), a photo-melting type was used as in the above.
【００２２】その結果、光の回り込みが多く、３ｍｍの
深さの位置では、露光の線幅１００μｍに対して回路の
線幅が３０μｍになり回路形成の精度が悪くなった。As a result, there was a lot of light wraparound, and at the position of a depth of 3 mm, the circuit line width became 30 μm with respect to the exposure line width of 100 μm, and the accuracy of circuit formation deteriorated.
【００２３】上記の実施例及び比較例から明らかなよう
に本発明の方法によると凹凸のある立体的な絶縁基板の
表面にも微細な回路パターンを正確に形成することがで
きる。As is clear from the above Examples and Comparative Examples, according to the method of the present invention, a fine circuit pattern can be accurately formed even on the surface of a three-dimensional insulating substrate having irregularities.
【００２４】[0024]
【発明の効果】本発明のプリント配線板の製造方法によ
ると、立体成形品（１）を成形する金型と同一の賦形面
を有する金型を用いて成形した立体露光用マスク（４）
を電着レジスト（３）の表面に密接した状態で平行光で
露光するため、凹凸のある立体的な絶縁基板の表面にも
微細な回路パターンを正確に形成することができる。According to the method for producing a printed wiring board of the present invention, a three-dimensional exposure mask (4) formed by using a mold having the same shaping surface as the mold for molding the three-dimensional molded product (1).
Is exposed to parallel light in close contact with the surface of the electrodeposition resist (3), so that a fine circuit pattern can be accurately formed even on the surface of a three-dimensional insulating substrate having irregularities.
【図１】本発明のプリント配線板の製造に用いる立体露
光用マスクと導電層を備えた絶縁基板との関係を示す断
面図である。FIG. 1 is a cross-sectional view showing the relationship between a three-dimensional exposure mask used for manufacturing the printed wiring board of the present invention and an insulating substrate provided with a conductive layer.
【図２】従来例に係るプリント配線板の製造に用いる平
面露光用マスクと導電層を備えた絶縁基板との関係を示
す断面図である。FIG. 2 is a cross-sectional view showing a relationship between a plane exposure mask used for manufacturing a printed wiring board according to a conventional example and an insulating substrate having a conductive layer.
１ 立体成形品 ２ 導電層 ３ 電着レジスト ４ 立体露光用マスク 1 Three-dimensional molded product 2 Conductive layer 3 Electrodeposition resist 4 Three-dimensional exposure mask
Claims (1)
元の表面に、導電層（２）を形成すると共にエッチング
することによりプリント配線回路を形成するプリント配
線板の製造方法において、導電層（２）に感光性を有す
る電着レジスト（３）を形成するとともに、立体成形品
（１）を成形する金型と同一の賦形面を有する金型を用
いて成形した立体露光用マスク（４）を介して平行光に
より電着レジスト（３）を露光し現像してエッチングレ
ジストを形成後、露出した導電層（２）をエッチングし
次に電着レジスト（３）を剥離することによりプリント
配線回路を形成することを特徴とするプリント配線板の
製造方法。1. A method for manufacturing a printed wiring board, wherein a conductive layer (2) is formed on a three-dimensional surface of an insulating three-dimensional molded article (1) and the printed wiring circuit is formed by etching. A mask for three-dimensional exposure formed by forming a photosensitive electrodeposition resist (3) on the layer (2) and using a mold having the same shaping surface as the mold for molding the three-dimensional molded product (1). By exposing the electrodeposition resist (3) by parallel light through (4) and developing to form an etching resist, by etching the exposed conductive layer (2) and then peeling the electrodeposition resist (3) A method for manufacturing a printed wiring board, which comprises forming a printed wiring circuit.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP20535493A JPH0758434A (en) | 1993-08-19 | 1993-08-19 | Method of manufacturing printed wiring board |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP20535493A JPH0758434A (en) | 1993-08-19 | 1993-08-19 | Method of manufacturing printed wiring board |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH0758434A true JPH0758434A (en) | 1995-03-03 |
Family
ID=16505484
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP20535493A Withdrawn JPH0758434A (en) | 1993-08-19 | 1993-08-19 | Method of manufacturing printed wiring board |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH0758434A (en) |
-
1993
- 1993-08-19 JP JP20535493A patent/JPH0758434A/en not_active Withdrawn
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| A300 | Withdrawal of application because of no request for examination |
Free format text: JAPANESE INTERMEDIATE CODE: A300 Effective date: 20001031 |