JPH0758039A - Susceptor - Google Patents
SusceptorInfo
- Publication number
- JPH0758039A JPH0758039A JP22666693A JP22666693A JPH0758039A JP H0758039 A JPH0758039 A JP H0758039A JP 22666693 A JP22666693 A JP 22666693A JP 22666693 A JP22666693 A JP 22666693A JP H0758039 A JPH0758039 A JP H0758039A
- Authority
- JP
- Japan
- Prior art keywords
- semiconductor wafer
- susceptor
- spot facing
- facing portion
- predetermined circumference
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Landscapes
- Container, Conveyance, Adherence, Positioning, Of Wafer (AREA)
- Physical Vapour Deposition (AREA)
Abstract
Description
【０００１】[0001]
【産業上の利用分野】本発明は、半導体ウエハを支持す
るサセプタに関する。FIELD OF THE INVENTION The present invention relates to a susceptor for supporting a semiconductor wafer.
【０００２】[0002]
【従来の技術】従来、半導体ウエハの表面にエピタキシ
ャル成長膜などの被膜を形成する工程において、サセプ
タに半導体ウエハを載置した状態で、半導体ウエハを加
熱処理することが行われている。2. Description of the Related Art Conventionally, in the step of forming a film such as an epitaxial growth film on the surface of a semiconductor wafer, the semiconductor wafer is heat-treated while the semiconductor wafer is placed on the susceptor.
【０００３】次に説明するように、従来は、２種類のサ
セプタが用いられている。As described below, conventionally, two types of susceptors are used.
【０００４】まず、図７（図を見やすくするために寸法
が誇張して示してある）を参照して、第１の従来例につ
いて説明すると、サセプタ７１は、カーボンを基材と
し、その表面にＳｉＣ（炭化珪素）被膜を有する。サセ
プタ７１には、座ぐり部７２が設けてある。座ぐり部７
２の底面は、平面になるように研磨されている。First, referring to FIG. 7 (dimensions are exaggerated for clarity), the first conventional example will be described. The susceptor 71 is made of carbon as a base material, and its surface is It has a SiC (silicon carbide) coating. The susceptor 71 is provided with a spot facing portion 72. Counterbore part 7
The bottom surface of 2 is polished to be a flat surface.
【０００５】しかしながら、従来の研磨では充分に平滑
にすることができず、座ぐり部７２の底面には、ＳｉＣ
被膜のＳｉＣ結晶の突起物が除去されずに残っている。
半導体ウエハ７４は、その裏面を下向きにして、座ぐり
部７２の底面に載置される。半導体ウエハ７４の裏面の
全面は、座ぐり部７２の底面と接触している。However, conventional polishing cannot sufficiently smooth the surface, and the bottom surface of the spot facing 72 is made of SiC.
The SiC crystal projections of the coating remain without being removed.
The semiconductor wafer 74 is placed on the bottom surface of the spot facing portion 72 with the back surface thereof facing downward. The entire back surface of the semiconductor wafer 74 is in contact with the bottom surface of the spot facing portion 72.
【０００６】次に、図８および図９（図を見やすくする
ために寸法が誇張して示してある）を参照して、第２の
従来例について説明すると、サセプタ８１は、円板形状
である。サセプタ８１には、円形の座ぐり部８２が設け
られている。座ぐり部８２の底面には格子状の溝８３が
設けられている。半導体ウエハ８４は、座ぐり部８２の
底面に載置される。半導体ウエハ８４の裏面は、格子状
の溝８３により区画された多数の接触部８５と接触して
いる。Next, the second conventional example will be described with reference to FIGS. 8 and 9 (dimensions are exaggerated for clarity of illustration). The susceptor 81 has a disk shape. . The susceptor 81 is provided with a circular spot facing portion 82. Lattice-shaped grooves 83 are provided on the bottom surface of the spot facing portion 82. The semiconductor wafer 84 is placed on the bottom surface of the spot facing portion 82. The back surface of the semiconductor wafer 84 is in contact with a large number of contact portions 85 defined by the grid-shaped grooves 83.
【０００７】[0007]
【発明が解決しようとする課題】前述の第１の従来例に
おいては、サセプタ７１の座ぐり部７２に半導体ウエハ
７４を載置する際に、座ぐり部７２の底面と半導体ウエ
ハ７４の裏面との間に存在する空気が瞬間的には除去さ
れないので、半導体ウエハ７４がその空気の上に浮いた
り滑ったりするような状態になり易い。このような状態
で、座ぐり部７２の底面のＳｉＣ結晶の突起物と半導体
ウエハ７４の裏面が接触すると、半導体ウエハ７４の裏
面が傷つくという問題が生じる。In the above-mentioned first conventional example, when the semiconductor wafer 74 is mounted on the spot facing portion 72 of the susceptor 71, the bottom surface of the spot facing portion 72 and the back surface of the semiconductor wafer 74 are Since the air existing between the two is not instantaneously removed, the semiconductor wafer 74 is apt to float or slip on the air. In such a state, if the protrusion of the SiC crystal on the bottom surface of the spot facing portion 72 comes into contact with the back surface of the semiconductor wafer 74, the back surface of the semiconductor wafer 74 is damaged.
【０００８】さらに、この接触によって半導体ウエハ７
４からパーティクル（粒子）が発生する。それらのパー
ティクルが、半導体ウエハ７４の表面に付着した場合
は、半導体ウエハ７４の表面に被膜を形成するときに結
晶欠陥が生じるという問題がある。Further, the semiconductor wafer 7 is formed by this contact.
Particles are generated from 4. If these particles adhere to the surface of the semiconductor wafer 74, there is a problem that crystal defects occur when forming a film on the surface of the semiconductor wafer 74.
【０００９】また、前述の第２の従来例においては、半
導体ウエハ８４を載置する際に、格子状の溝８３が空気
の逃げ道として機能するので、前述の第１の従来例にお
ける問題は解消されている。Further, in the above-mentioned second conventional example, when the semiconductor wafer 84 is mounted, the lattice-shaped grooves 83 function as an escape path for air, so the problem in the above-mentioned first conventional example is solved. Has been done.
【００１０】しかしながら、半導体ウエハ８４の裏面
が、サセプタ８１の多数の接触部分８５と接触している
ので、半導体ウエハ８４を加熱処理することによって、
半導体ウエハ８４の裏面に、はん点状の跡が形成される
という問題がある。However, since the back surface of the semiconductor wafer 84 is in contact with a large number of contact portions 85 of the susceptor 81, the semiconductor wafer 84 is heated to
There is a problem that spot-like marks are formed on the back surface of the semiconductor wafer 84.
【００１１】本発明は、半導体ウエハの裏面に傷やはん
点状の跡が形成されることを防止して、半導体ウエハを
良好な状態に保つことができるサセプタを提供すること
を目的とする。It is an object of the present invention to provide a susceptor capable of preventing the formation of scratches or spot-like marks on the back surface of a semiconductor wafer and keeping the semiconductor wafer in a good condition. .
【００１２】[0012]
【課題を解決するための手段】半導体ウエハの平面部を
支持する座ぐり部を有するサセプタにおいて、前記座ぐ
り部内に所定の円周に沿って半導体ウエハを支持する少
くとも３つの支持部を備えていることを特徴とするサセ
プタ。In a susceptor having a spot facing portion for supporting a flat portion of a semiconductor wafer, the susceptor includes at least three support portions for supporting the semiconductor wafer along a predetermined circumference in the spot facing portion. A susceptor that is characterized by
【００１３】[0013]
【実施例】第１実施例 本発明の第１実施例によるサセプタについて説明する。EXAMPLES For a susceptor be described according to the first embodiment of the first embodiment the present invention.
【００１４】図１を参照すると、枚葉式のサセプタ１
は、円板形状である。サセプタ１の上面１ａには、円形
の座ぐり部２が設けられている。サセプタ１は、座ぐり
部２の底面に３個の凸状支持部３を有している。サセプ
タ１は、カーボンを基材として一体成型され、その表面
に炭化珪素（ＳｉＣ）の被膜を有している。枚葉式のサ
セプタとは、半導体ウエハを１枚づつ支持する構成のサ
セプタである。Referring to FIG. 1, a single-wafer type susceptor 1
Is a disc shape. A circular counterbore 2 is provided on the upper surface 1 a of the susceptor 1. The susceptor 1 has three convex support portions 3 on the bottom surface of the spot facing portion 2. The susceptor 1 is integrally molded using carbon as a base material and has a silicon carbide (SiC) coating on its surface. The single-wafer type susceptor is a susceptor configured to support semiconductor wafers one by one.
【００１５】図２を参照すると、半導体ウエハ４が、そ
の表面４ａを上向きにして、サセプタ１に載置されてい
る。半導体ウエハ４は、３個の凸状支持部３によって支
持されている。半導体ウエハ４の裏面４ｂが、サセプタ
１の上面１ａより高くならないように、座ぐり部２の深
さおよび凸状支持部３の高さを設定する。Referring to FIG. 2, a semiconductor wafer 4 is mounted on the susceptor 1 with its surface 4a facing upward. The semiconductor wafer 4 is supported by the three convex support portions 3. The depth of the spot facing portion 2 and the height of the convex support portion 3 are set so that the back surface 4b of the semiconductor wafer 4 is not higher than the upper surface 1a of the susceptor 1.
【００１６】半導体ウエハ４は、円板形状のものであ
る。半導体ウエハ４の材質などについては、従来と同様
である。The semiconductor wafer 4 has a disk shape. The material and the like of the semiconductor wafer 4 are the same as in the conventional case.
【００１７】凸状支持部３は、座ぐり部２の底面から球
面状に突起した形状になっていて、半導体ウエハ４の裏
面４ｂと点接触している。これらの凸状支持部３のそれ
ぞれの球面の半径は、１ｍｍ〜１０ｍｍの範囲内の長さ
であることが好ましい。この半径が１ｍｍ未満である場
合は、凸状支持部３によって半導体ウエハ４の裏面４ｂ
に傷がつき易くなる。さらに、凸状支持部３に対する半
導体ウエハ４の重量による応力によって、半導体ウエハ
４にスリップ現象が発生し易くなる。半径が１０ｍｍを
超える場合は、半導体ウエハ４の裏面４ｂと座ぐり部２
の底面の間における空気（ガス）の流れが潤滑でなくな
り、半導体ウエハ４の裏面４ｂが不良になり易くなる。The convex support portion 3 has a spherical projection from the bottom surface of the spot facing portion 2, and is in point contact with the back surface 4b of the semiconductor wafer 4. The radius of the spherical surface of each of the convex support portions 3 is preferably within the range of 1 mm to 10 mm. When this radius is less than 1 mm, the convex support 3 causes the back surface 4b of the semiconductor wafer 4
Is easily scratched. Further, the stress due to the weight of the semiconductor wafer 4 with respect to the convex support portion 3 easily causes the semiconductor wafer 4 to slip. When the radius exceeds 10 mm, the back surface 4b of the semiconductor wafer 4 and the counterbore 2
The air (gas) flow between the bottom surfaces of the semiconductor wafer 4 is not lubricated, and the back surface 4b of the semiconductor wafer 4 is likely to become defective.
【００１８】サセプタ１は、気相成長装置（図示せず）
に備えられる。サセプタ１を除いた気相成長装置の構成
は、従来と同様のものを採用できる。The susceptor 1 is a vapor phase growth apparatus (not shown).
Be prepared for. The configuration of the vapor phase growth apparatus excluding the susceptor 1 may be the same as that of the conventional one.
【００１９】気相成長装置は、赤外線ランプ加熱機構
（図示せず）を備え、その加熱機構によって、半導体ウ
エハ４をサセプタ１によって支持された状態で上下方向
の両側から加熱する。この加熱によって、半導体ウエハ
４が熱変形する。The vapor phase growth apparatus has an infrared lamp heating mechanism (not shown), and the heating mechanism heats the semiconductor wafer 4 from both sides in the vertical direction while being supported by the susceptor 1. The semiconductor wafer 4 is thermally deformed by this heating.
【００２０】このように加熱した状態で、原料ガスをキ
ャリアガスとともに半導体ウエハ４の表面に供給してシ
リコン（Ｓｉ）のエピタキシャル成長膜を気相成長させ
る。原料ガスおよびキャリアガスは、従来と同様のもの
を採用できる。例えば、原料ガスとしてジクロロシラン
（ＳｉＨ2 Ｃｌ2 ）を用い、キャリアガスとして水素を
用いる。In such a heated state, the raw material gas is supplied to the surface of the semiconductor wafer 4 together with the carrier gas to vapor-deposit an epitaxial growth film of silicon (Si). As the raw material gas and the carrier gas, those similar to the conventional one can be adopted. For example, dichlorosilane (SiH 2 Cl 2 ) is used as a source gas and hydrogen is used as a carrier gas.
【００２１】３個の凸状支持部３は、座ぐり部２と同心
円周５上に配置されている。好ましくは、所定の円周５
の中心に関して１２０度の角度Ｃ（３６０度の３等分）
で等間隔に３つの基準位置を設定し、それぞれの基準位
置から所定の円周５に沿った一方の方向あるいは他方の
方向に、１２度（角度Ｃの０．１倍）の角度Ｅの範囲内
に、凸状支持部３を配置する。このように配置した場合
は、半導体ウエハ４の中心から外周に向かう方向におけ
る形状（つまり、直径方向の断面形状）が、その中心軸
線に関してほぼ対称になるように、半導体ウエハ４が熱
変形する。１２度の角度Ｅを超える位置に配置した場合
は、熱変形によって、前述の対称性が損なわれ、半導体
ウエハ４の全体的な反りが大きくなり易い。そのため、
前述のエピタキシャル成長膜の厚さが不均一になり易
い。The three convex support portions 3 are arranged on the spot 5 which is concentric with the spot facing portion 2. Preferably, the predetermined circumference 5
120 degree angle C with respect to the center of (360 degree trisecting)
The three reference positions are set at equal intervals with, and the range of the angle E of 12 degrees (0.1 times the angle C) from each of the reference positions in one direction or the other direction along the predetermined circumference 5 Inside, the convex support portion 3 is arranged. When arranged in this manner, the semiconductor wafer 4 is thermally deformed so that the shape (that is, the cross-sectional shape in the diameter direction) in the direction from the center of the semiconductor wafer 4 toward the outer periphery is substantially symmetrical with respect to the central axis line. When it is arranged at a position exceeding the angle E of 12 degrees, the above-mentioned symmetry is impaired due to thermal deformation, and the overall warp of the semiconductor wafer 4 is likely to increase. for that reason,
The thickness of the epitaxial growth film described above tends to be non-uniform.
【００２２】所定の円周５の半径は、座ぐり部２の半径
の５０％〜９５％の範囲内の長さに設定することが好ま
しい。より好ましくは、６０％〜８０％の範囲内であ
る。６０％未満の範囲では、半導体ウエハ４を安定して
支持することが難しい。９５％を超える範囲では、後述
のようにエピタキシャル成長膜にクラックが生じやすく
なる。The radius of the predetermined circumference 5 is preferably set within a range of 50% to 95% of the radius of the spot facing portion 2. More preferably, it is within the range of 60% to 80%. If it is less than 60%, it is difficult to stably support the semiconductor wafer 4. If it exceeds 95%, cracks are likely to occur in the epitaxial growth film as described later.
【００２３】次に説明するように、半導体ウエハ４の熱
変形の状態は、前述の所定の円周５の半径の長さによっ
ても異なる。As will be described below, the state of thermal deformation of the semiconductor wafer 4 also differs depending on the length of the radius of the predetermined circumference 5 described above.
【００２４】まず、所定の円周５の半径が、座ぐり部２
の半径に対して６０％〜８０％の範囲内の長さである場
合について説明する。First, the radius of the predetermined circumference 5 is the counterbore 2
The case where the length is within the range of 60% to 80% with respect to the radius of will be described.
【００２５】前述の加熱によって、図３に誇張して示す
ように、半導体ウエハ４が熱変形する。半導体ウエハ４
の中心付近の部分４ｃおよび外周付近の部分４ｄは、凸
状支持体３の上端よりも下方へ落ち込むように変形する
ので、半導体ウエハ４の表面４ａにおいて最も高い位置
と最も低い位置の高低差ＴA を比較的小さくできる。The above heating causes the semiconductor wafer 4 to be thermally deformed as shown in an exaggerated manner in FIG. Semiconductor wafer 4
Since the portion 4c near the center and the portion 4d near the outer periphery are deformed so as to fall below the upper end of the convex support 3, the height difference T between the highest position and the lowest position on the surface 4a of the semiconductor wafer 4 is T. A can be made relatively small.
【００２６】したがって、エピタキシャル成長膜を気相
成長させた後に、半導体ウエハ４を室温まで下げても、
熱変形によってエピタキシャル成長膜にクラックが生じ
ることはない。Therefore, even if the semiconductor wafer 4 is cooled to room temperature after vapor phase growth of the epitaxially grown film,
No crack occurs in the epitaxial growth film due to thermal deformation.
【００２７】次に、所定の円周５の半径が、座ぐり部２
の半径に対して８０％を超える範囲の長さである場合に
ついて説明する。Next, the radius of the predetermined circumference 5 becomes equal to that of the spot facing portion 2.
The case where the length is in the range of more than 80% with respect to the radius of will be described.
【００２８】前述の加熱によって図４に誇張して示すよ
うに、半導体ウエハ４が、全体的に上方に反りかえるよ
うに熱変形する。そのため、エピタキシャル成長膜を気
相成長させた後に、半導体ウエハ４を室温まで下げる
と、半導体ウエハ４の熱変形の程度に応じてエピタキシ
ャル成長膜に対して引張応力が働く。As exaggeratedly shown in FIG. 4, the above-mentioned heating causes the semiconductor wafer 4 to be thermally deformed so as to warp upward as a whole. Therefore, when the semiconductor wafer 4 is cooled to room temperature after vapor-phase growth of the epitaxial growth film, tensile stress acts on the epitaxial growth film according to the degree of thermal deformation of the semiconductor wafer 4.
【００２９】所定の円周５の半径が、座ぐり部２の半径
に対して８０％〜９５％の範囲内の長さである場合は、
半導体ウエハ４の表面４ａにおいて最も高い位置と最も
低い位置の高低差ＴB が比較的小さいので、前述の引張
応力によってエピタキシャル成長膜にクラックが生じる
ことはないが、９５％を超える範囲の長さである場合
は、高低差ＴB が大きくなり、前述の引張応力によっ
て、エピタキシャル成長膜にクラックが生じ易くなる。When the radius of the predetermined circumference 5 is within the range of 80% to 95% with respect to the radius of the spot facing portion 2,
Since height difference T B of the lowest position and the highest position on the surface 4a of the semiconductor wafer 4 is relatively small, the length of the range but never cracks in the epitaxial growth film by the aforementioned tensile stress, of greater than 95% In some cases, the height difference T B becomes large, and the tensile stress described above tends to cause cracks in the epitaxial growth film.
【００３０】第２実施例 本発明の第２実施例によるサセプタについて説明する。[0030] The susceptor is described according to a second embodiment of the second embodiment the present invention.
【００３１】図５および図６を参照すると、サセプタ１
０は、サセプタ本体１１と支持ピン１３から構成されて
いる。サセプタ本体１１は、円板形状である。サセプタ
本体１１の上面１１ａには、円形の座ぐり部１２が設け
られている。サセプタ本体１１は、座ぐり部１２の底面
に５個の凹部１２ａを有している。サセプタ本体１１
は、カーボンを基材として、一体成形されたものであ
り、その表面に炭化珪素の被膜を有している。支持ピン
１３もまた、カーボンを基材としてその表面に炭化珪素
の被膜を有したものでもよく、また、炭化珪素のみから
なるものでもよい。Referring to FIGS. 5 and 6, the susceptor 1
0 is composed of a susceptor body 11 and a support pin 13. The susceptor body 11 has a disc shape. A circular counterbore 12 is provided on the upper surface 11 a of the susceptor body 11. The susceptor body 11 has five recesses 12 a on the bottom surface of the counterbore 12. Susceptor body 11
Is integrally formed using carbon as a base material, and has a silicon carbide coating film on its surface. The support pin 13 may also have carbon as a base material and a silicon carbide coating film on its surface, or may be made of only silicon carbide.
【００３２】５個の凹部１２ａには、それぞれ支持ピン
１３が挿入されている。支持ピン１３の上部は、座ぐり
部１２の底面から上方に突起しており、前述の第１実施
例の凸状支持部３と同様の形状である。A support pin 13 is inserted into each of the five recesses 12a. The upper portion of the support pin 13 projects upward from the bottom surface of the spot facing portion 12, and has the same shape as the convex support portion 3 of the first embodiment described above.
【００３３】５個の支持ピン１３の上端部は、座ぐり部
１２と同心の所定の円周１５上に位置し、しかも所定の
円周１５の中心に関して７２度の角度Ｄで等間隔に位置
するように設けられている。The upper ends of the five support pins 13 are located on a predetermined circumference 15 which is concentric with the spot facing portion 12, and are located at equal intervals at an angle D of 72 degrees with respect to the center of the predetermined circumference 15. It is provided to do.
【００３４】半導体ウエハ１４が、その表面を上向きに
してサセプタ１１の表側に載置されている。半導体ウエ
ハ１４は、５個の支持ピン１３によって支持されてい
る。The semiconductor wafer 14 is placed on the front side of the susceptor 11 with its surface facing upward. The semiconductor wafer 14 is supported by the five support pins 13.
【００３５】所定の円周１５の半径の長さは、前述の第
１実施例と同様である。その他の構成についても、前述
の第１実施例と同様である。The length of the radius of the predetermined circumference 15 is the same as that of the first embodiment. Other configurations are the same as those in the above-described first embodiment.
【００３６】本発明は、前述の第１実施例および第２実
施例に限定されるものではない。例えば、支持体（第１
実施例の凸状支持部３や、第２実施例の支持ピン１３）
の数は、３個あるいは５個に限定されるものではなく、
３個以上の個数ｎであればよい。この場合、ｎ個の支持
体を、所定の円周の中心に関して３６０度のｎ等分の角
度（３６０／ｎ度）で、所定の円周上に等間隔にｎ個の
基準位置を設定する。これらの基準位置から所定の円周
に沿った一方の方向あるいは他方の方向に、｛（３６０
／ｎ）×０．１｝度以下の角度の位置に、支持部を配置
すればよい。The present invention is not limited to the above-mentioned first and second embodiments. For example, the support (first
The convex support portion 3 of the embodiment and the support pin 13 of the second embodiment)
Is not limited to three or five,
The number n may be three or more. In this case, n reference positions are set for the n support bodies at an equal angle of 360 degrees with respect to the center of the predetermined circumference (360 / n degrees) at equal intervals on the predetermined circumference. . From these reference positions in one direction or the other along a predetermined circumference, {(360
/N)×0.1} degrees or less, the support portion may be arranged at a position.
【００３７】また、支持体は、球面形状でなくてもよ
く、円柱形状や角柱形状であってもよい。The support need not have a spherical shape, and may have a cylindrical shape or a prismatic shape.
【００３８】また、サセプタの構成は、支持体を除い
て、従来のサセプタの構成を採用できる。例えば、枚葉
式に限らず、その他のサセプタを採用できる。材質も種
々のものが採用できる。The structure of the susceptor may be the conventional structure of the susceptor except for the support. For example, not only the single-wafer type but also other susceptors can be adopted. Various materials can be used.
【００３９】また、ランプ加熱機構に限らず、その他の
加熱機構、例えば誘導加熱（高周波加熱）装置を採用で
きる。Further, not only the lamp heating mechanism but also other heating mechanism such as induction heating (high frequency heating) device can be adopted.
【００４０】また、本発明は、気相成長装置等のデポジ
ション装置に使用されるサセプタに限定されるものでは
なく、半導体ウエハを製造、加工するための装置に使用
されるサセプタにも広く適用できる。例えば、半導体ウ
エハを加熱処理してその表面に酸化膜を形成する装置に
使用されるサセプタにも適用できる。Further, the present invention is not limited to the susceptor used for the deposition apparatus such as the vapor phase growth apparatus, but is widely applied to the susceptor used for the apparatus for manufacturing and processing the semiconductor wafer. it can. For example, the invention can be applied to a susceptor used in an apparatus that heat-treats a semiconductor wafer to form an oxide film on its surface.
【００４１】[0041]
【発明の効果】本発明は、サエプタが半導体ウエハを支
持した状態で、サセプタと半導体ウエハの裏面が、所定
の円周の内側および外側において接触しないようにする
ことができる。それによって、半導体ウエハを加熱処理
する場合に、半導体ウエハの裏面にはん点状の跡が生じ
ることを防止できる。しかも、サセプタに半導体ウエハ
を載置するときに、それらの間の空気抜きを良好に行っ
て、半導体ウエハのスリップ現象を防止できる。したが
って、半導体ウエハの裏面を良好な状態に保つことがで
きる。According to the present invention, it is possible to prevent the susceptor and the back surface of the semiconductor wafer from coming into contact with each other on the inside and outside of a predetermined circumference in a state where the susceptor supports the semiconductor wafer. Thereby, it is possible to prevent spot-like marks from being formed on the back surface of the semiconductor wafer when the semiconductor wafer is heat-treated. Moreover, when the semiconductor wafer is placed on the susceptor, the air between them can be satisfactorily vented, and the slip phenomenon of the semiconductor wafer can be prevented. Therefore, the back surface of the semiconductor wafer can be kept in a good state.
【図１】本発明の第１実施例によるサセプタを示す平面
図。FIG. 1 is a plan view showing a susceptor according to a first embodiment of the present invention.
【図２】図１に示したサセプタのＡ−Ａ線に沿った断面
図。FIG. 2 is a sectional view taken along the line AA of the susceptor shown in FIG.
【図３】半導体ウエハが、その周縁部と中心部において
下方に落ち込むように熱変形した状態を示す断面図。FIG. 3 is a cross-sectional view showing a state in which a semiconductor wafer is thermally deformed so as to drop downward at a peripheral portion and a central portion thereof.
【図４】半導体ウエハが全体的に反りかえるように熱変
形した状態を示す断面図。FIG. 4 is a cross-sectional view showing a state in which a semiconductor wafer is thermally deformed so as to be warped as a whole.
【図５】本発明の第２実施例によるサセプタを示す平面
図。FIG. 5 is a plan view showing a susceptor according to a second embodiment of the present invention.
【図６】図５に示したサセプタのＢ−Ｂ線に沿った断面
図。6 is a cross-sectional view taken along the line BB of the susceptor shown in FIG.
【図７】第１の従来例のサセプタを示す断面図。FIG. 7 is a cross-sectional view showing a susceptor of a first conventional example.
【図８】第２の従来例のサセプタを示す断面図。FIG. 8 is a sectional view showing a susceptor of a second conventional example.
【図９】図８に示したサセプタの平面図。9 is a plan view of the susceptor shown in FIG.
１，１０ サセプタ ２，１２ 座ぐり部 ３ 凸状支持部 １３ 支持ピン ４，１４ 半導体ウエハ ５，１５ 所定の円周 1, 10 Susceptor 2, 12 Counterbore 3 Convex Support 13 Support Pin 4, 14 Semiconductor Wafer 5, 15 Predetermined Circumference
───────────────────────────────────────────────────── フロントページの続き (72)発明者 市川 浩行 山形県西置賜郡小国町大字小国町378番地 東芝セラミックス株式会社小国製造所内 (72)発明者 加藤 茂男 山形県西置賜郡小国町大字小国町378番地 東芝セラミックス株式会社小国製造所内 (72)発明者 伊藤 幸夫 山形県西置賜郡小国町大字小国町378番地 東芝セラミックス株式会社小国製造所内 ─────────────────────────────────────────────────── ─── Continuation of the front page (72) Inventor Hiroyuki Ichikawa 378 Oguni-machi, Oguni-machi, Nishiokitama-gun, Yamagata Prefecture Oguni Factory, Toshiba Ceramics Co., Ltd. (72) Shigeo Kato 378 Oguni-cho, Oguni-cho, Nishiokitama-gun, Yamagata Prefecture (72) Inventor Yukio Ito 378, Oguni Town, Oguni Town, Nishiokitama District, Yamagata Prefecture Toshiba Ceramics Co., Ltd.
Claims (1)
部を有するサセプタにおいて、前記座ぐり部内に所定の
円周に沿って半導体ウエハを支持する少くとも３つの支
持部を備えていることを特徴とするサセプタ。1. A susceptor having a spot facing portion for supporting a flat portion of a semiconductor wafer, comprising at least three support portions for supporting the semiconductor wafer along a predetermined circumference in the spot facing portion. Characteristic susceptor.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP22666693A JPH0758039A (en) | 1993-08-20 | 1993-08-20 | Susceptor |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP22666693A JPH0758039A (en) | 1993-08-20 | 1993-08-20 | Susceptor |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH0758039A true JPH0758039A (en) | 1995-03-03 |
Family
ID=16848760
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP22666693A Pending JPH0758039A (en) | 1993-08-20 | 1993-08-20 | Susceptor |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH0758039A (en) |
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| KR20020058152A (en) * | 2000-12-29 | 2002-07-12 | 양계모 | Wafer susceptor |
| JP2002222768A (en) * | 2001-01-24 | 2002-08-09 | Ibiden Co Ltd | Jig for semiconductor |
| US6454865B1 (en) | 1997-11-03 | 2002-09-24 | Asm America, Inc. | Low mass wafer support system |
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1993
- 1993-08-20 JP JP22666693A patent/JPH0758039A/en active Pending
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|---|---|---|---|---|
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| US6284048B1 (en) | 1997-11-03 | 2001-09-04 | Asm America, Inc | Method of processing wafers with low mass support |
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