JPH0752790B2 - Parent-child board mounting method - Google Patents
Parent-child board mounting methodInfo
- Publication number
- JPH0752790B2 JPH0752790B2 JP63298137A JP29813788A JPH0752790B2 JP H0752790 B2 JPH0752790 B2 JP H0752790B2 JP 63298137 A JP63298137 A JP 63298137A JP 29813788 A JP29813788 A JP 29813788A JP H0752790 B2 JPH0752790 B2 JP H0752790B2
- Authority
- JP
- Japan
- Prior art keywords
- board
- parent
- slit
- child
- child board
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
Links
Classifications
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/36—Assembling printed circuits with other printed circuits
- H05K3/366—Assembling printed circuits with other printed circuits substantially perpendicularly to each other
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/40—Forming printed elements for providing electric connections to or between printed circuits
- H05K3/42—Plated through-holes or plated via connections
Landscapes
- Combinations Of Printed Boards (AREA)
Description
【発明の詳細な説明】 〔産業上の利用分野〕 本発明は親プリント基板(親基板)上への子プリント基
板(子基板)の実装方法に関するものである。The present invention relates to a method of mounting a child printed board (child board) on a parent printed board (parent board).
親基板に子基板を実装する方法には,コネクタを用いる
方法と親基板と直接子基板をはんだづけしてしまう方法
とがある。本発明は後者に関するものであって,親基板
にあけたスリットに子基板を挿入し,両者の端子をはん
だづけするものである。しかし,親基板のスリットには
様々な端子が並んでいるためショートすることから,従
来はスリットはスルーホールとされず,両基板間の接続
は親基板の片面で隅肉はんだ付が行われていた。このた
め,はんだ付信頼性のうえからは極めて不十分なもので
あった。また,親基板の表裏を電気的に接続するために
別途スルーホールを設ける必要があった。There are two methods of mounting the child board on the parent board: a method of using a connector and a method of directly soldering the child board to the parent board. The present invention relates to the latter, in which the child board is inserted into the slit formed in the parent board and the terminals of both are soldered. However, since various terminals are lined up in the slit of the parent board, they are short-circuited. Therefore, the slit is not conventionally a through hole, and fillet soldering is performed on one side of the parent board for connection between both boards. It was Therefore, it was extremely insufficient in terms of soldering reliability. In addition, it was necessary to separately provide through holes to electrically connect the front and back of the parent board.
今回は,スリットに設けたスルーホールを端子に合わせ
て切り込みを入れて切断し,はんだ付強度,親基板表裏
の電気的接続等,これらの諸問題の解決を図ったもので
ある。This time, we tried to solve these problems such as soldering strength, electrical connection between the front and back of the main board, etc. by cutting the through hole provided in the slit according to the terminal.
従来の技術は第5図に示す如く親基板1′に設けたスリ
ット12に子基板2の端子部21を挿入し,親基板1′の裏
面のパターン11′と端子部21とを第6図の如くはんだ31
にて接続するものであった。In the prior art, as shown in FIG. 5, the terminal portion 21 of the child board 2 is inserted into the slit 12 provided in the parent board 1 ', and the pattern 11' and the terminal portion 21 on the back surface of the parent board 1'are shown in FIG. Like solder 31
It was something to connect with.
しかし,本方法では第6図に示すように,はんだ31は片
面にしか付けることができず,子基板2へ応力が加わっ
たときは,その力がはんだ31に加わるが,所謂隅肉はん
だ付けであるため,はんだにクラックが入り易い欠点が
あった。いっぽう親基板1′の表面と裏面との電気的接
続もスリットによって分断されてしまうため,第6図の
ようにスルーホール15を多数設ける必要があった。However, in this method, as shown in FIG. 6, the solder 31 can be attached only to one side, and when stress is applied to the child board 2, the force is applied to the solder 31, but so-called fillet soldering is performed. Therefore, there was a drawback that the solder was easily cracked. On the other hand, since the electrical connection between the front surface and the back surface of the parent board 1'is also divided by the slit, it is necessary to provide a large number of through holes 15 as shown in FIG.
前述の従来技術には,はんだ付接続強度が弱い、スリッ
トの近傍にスルーホールを多数設ける必要がある等の欠
点がある。本発明はこれらの欠点を除去することを目的
とする。The above-mentioned conventional techniques have drawbacks such as weak soldering connection strength and the need to provide many through holes in the vicinity of the slits. The present invention aims to eliminate these drawbacks.
本発明は上記の目的を達成するため,親基板1のスリッ
トを一旦第3図の如きスルーホールめっきとしたのち,
各端子間をカットして,部分的なスルーホールとすると
ともに第7図のようにスリット部に突起部を形成したも
のである。In order to achieve the above-mentioned object, the present invention temporarily forms the slits of the parent board 1 by through-hole plating as shown in FIG.
Each terminal is cut to form a partial through hole, and a protrusion is formed in the slit as shown in FIG.
第1図,第2図のようにスリット12を部分的なスルーホ
ールにすることによって,親基板1のスリット12の側壁
は導体金属(Cuなど)14によりおおわれるので,この部
分に子基板2の端子部21を挿入すれば,スリット内およ
びその上部でも,はんだ接続が行えるようになる。又親
基板1の表裏パターンもスリット12で導体金属14で接続
される。更に第7図、第8図に示すようにスリットに子
基板を挿入したとき、子基板は親基板の突起部のばね力
で親基板に保持される。By forming the slit 12 as a partial through hole as shown in FIGS. 1 and 2, the side wall of the slit 12 of the parent board 1 is covered with a conductive metal (such as Cu) 14, so that the child board 2 If the terminal portion 21 of is inserted, solder connection can be performed inside and above the slit. The front and back patterns of the parent board 1 are also connected by the conductor metal 14 through the slit 12. Further, when the child board is inserted into the slit as shown in FIGS. 7 and 8, the child board is held by the parent board by the spring force of the protrusion of the parent board.
第1図〜第4図は本発明の実施例を示すものである。 1 to 4 show an embodiment of the present invention.
すなわち,第1図の如く親基板1のスリット部12に子基
板2の端子部21を挿入するが,そのスリット部を拡大す
ると第2図のように端子11はスルーホールとなって導体
金属14により親基板1の表裏にまたがって接続してい
る。一方各端子11間は溝13がつくられていて,導体金属
14は分断されており,端子11は相互に電気的に接続(シ
ョート)していない。これは,第3図のように一度スリ
ット12周辺を細長いスルーホールとしたうえで,第2図
の如くして溝13を設けたものである。溝13はルータ,プ
レス等により容易に加工できるものである。That is, as shown in FIG. 1, the terminal portion 21 of the child board 2 is inserted into the slit portion 12 of the parent board 1. When the slit portion is enlarged, the terminal 11 becomes a through hole as shown in FIG. Thus, the main substrate 1 is connected across the front and back. On the other hand, a groove 13 is formed between each terminal 11,
14 is divided, and terminals 11 are not electrically connected (shorted) to each other. This is one in which the slit 12 periphery is once made into an elongated through hole as shown in FIG. 3 and the groove 13 is provided as shown in FIG. The groove 13 can be easily processed by a router, a press, or the like.
つぎにこの作用について説明する。Next, this operation will be described.
第4図は第1図の如くして実装した親基板1と子基板2
との断面を示すものであって,両者ははんだ31,32によ
って電気的,機械的に一体化されている。このような実
装方式によれば,はんだ31はスルーホール14と端子21と
により容易に親基板の上面へ導かれ32となる。すなわち
スルーホール14と端子21との間もはんだにより接続され
る。かくして親基板1と子基板2とは強固に接続され,
はんだ付け信頼性は大幅に向上する。また,スルーホー
ル14によって親基板の表面のパターン11と裏面のパター
ン11′′′とは電気的に一体となるので,特別に他のス
ルーホールを設ける必要はなく実装上の制約が少なくな
る。FIG. 4 shows a parent board 1 and a child board 2 mounted as shown in FIG.
And a cross section, and both are electrically and mechanically integrated by solders 31 and 32. According to such a mounting method, the solder 31 is easily guided to the upper surface of the mother board by the through hole 14 and the terminal 21 and becomes 32. That is, the through hole 14 and the terminal 21 are also connected by solder. Thus, the parent board 1 and the child board 2 are firmly connected,
Soldering reliability is greatly improved. Further, since the pattern 11 on the front surface of the mother board and the pattern 11 '''on the rear surface are electrically integrated by the through hole 14, it is not necessary to provide another through hole and the mounting restrictions are reduced.
第7図〜第9図に本発明の他の実施例を示す。7 to 9 show another embodiment of the present invention.
第7図は本発明のプリント基板実装方法を示す図で親基
板1のスリット(幅t′)12の部分へ子基板(板厚t)
2を挿入し,子基板2の端子21を親基板1の裏面にある
対応する端子へ,はんだ付により接続するものである。FIG. 7 is a diagram showing a printed circuit board mounting method according to the present invention, in which the slit (width t ') 12 of the parent board 1 is inserted into the child board (plate thickness t).
2 is inserted and the terminal 21 of the child board 2 is connected to the corresponding terminal on the back surface of the parent board 1 by soldering.
第8図は第7図のものを実装したところを示す断面図で
あって,今第1図にてt′<tであるものとすれば,こ
の挿入により親基板1のくし形溝17によって形成された
突起部16はこの挿入方向と曲がる。突起部16のばね力に
よって子基板2は親基板1に十分締結され,端子21と親
基板1の裏面に設けた端子とをはんだ33によって,はん
だ付けしても親基板1又は,子基板2に加わる応力は直
接はんだ33に加わることはない。すなわち,はんだ33は
親基板1,又は子基板2に加わる力から保護される。第9
図に従来の方式を示す。すなわち,親基板1にあけたス
リット12のみであったため,t′<tでは親基板1に基板
2が挿入できない。一方,t′>tでは,はんだ付け後親
基板又は子基板2に応力が加わると直接はんだに力が加
わることとなり,はんだ付不良の原因となる。本発明に
よればこのような不具合が解消できる。FIG. 8 is a cross-sectional view showing the mounting of the one shown in FIG. 7. If t ′ <t in FIG. The formed protrusion 16 bends in this insertion direction. The spring force of the protruding portion 16 allows the child board 2 to be sufficiently fastened to the parent board 1, and even if the terminals 21 and the terminals provided on the back surface of the parent board 1 are soldered by the solder 33, the parent board 1 or the child board 2 The stress applied to the solder 33 is not directly applied to the solder 33. That is, the solder 33 is protected from the force applied to the parent board 1 or the child board 2. 9th
The figure shows the conventional method. That is, since there are only the slits 12 formed in the parent board 1, the board 2 cannot be inserted into the parent board 1 when t '<t. On the other hand, when t '> t, when stress is applied to the parent board or the child board 2 after soldering, a force is directly applied to the solder, which causes soldering failure. According to the present invention, such a problem can be solved.
以上説明した如く,本発明によればスリット中でのはん
だ付がなされる結果,親基板1と子基板2とのはんだ付
接続信頼性を大幅に向上する。また,スリット中の導体
金属自体が親基板の表裏を電気的に接続するので,特別
なスルーホールを設ける必要がなくなり,その分親基板
の実装スペースが広くなる等,実装上の制約を軽減する
ことができる。更に子基板は親基板に突起部で機械的に
しっかりと保持されるためはんだ付後、基板に応力が加
わってもはんだ付不良となることはなくなる。As described above, according to the present invention, as a result of soldering in the slit, the soldering connection reliability between the parent board 1 and the child board 2 is significantly improved. Further, since the conductor metal itself in the slit electrically connects the front and back of the parent board, it is not necessary to provide a special through hole, and the mounting space of the parent board is widened accordingly, and mounting restrictions are reduced. be able to. Further, since the child board is mechanically firmly held by the projection on the parent board, soldering failure does not occur even if stress is applied to the board after soldering.
第1図〜第4図は本発明に関するものであって,第1図
は本発明の親基板のスリット部を部分的なスルーホール
とした親子基板の実装方法の概念を示す斜視図。第2図
は第1図のうち親基板のスリット部の拡大図,第3図は
スリット部のスルーホール形成方法を示す斜視図,第4
図は第1図の如くに実装したものの断面を示す図。第5
図、第9図は従来の実装方法の概念を示す斜視図。第6
図は第5図の如くして実装したものの断面を示す図。第
7図〜第8図は本発明の他の実施例を示す図。 1は本発明のスリット構造をもつ親基板,2は子基板,11
は1の表面に設けた端子又はパターン,11′′′は裏面
の端子又はパターン12はスリット,13はスリットに設け
た溝,14はスリット部のスルーホール又は部分的なスル
ーホール又は導体金属。21は子基板の端子,31,32ははん
だ。 1′は従来のスリット構造を持つ親基板11′′,11′は
1′における表裏の端子又はパターン。1 to 4 relate to the present invention, and FIG. 1 is a perspective view showing the concept of a method of mounting a parent-child board in which the slit portion of the parent board of the present invention is a partial through hole. 2 is an enlarged view of the slit portion of the parent board in FIG. 1, FIG. 3 is a perspective view showing a through hole forming method of the slit portion, FIG.
The figure is a view showing a cross section of what is mounted as shown in FIG. Fifth
FIG. 9 is a perspective view showing the concept of a conventional mounting method. Sixth
The figure is a view showing a cross section of what is mounted as shown in FIG. 7 to 8 are views showing another embodiment of the present invention. 1 is a parent substrate having the slit structure of the present invention, 2 is a child substrate, 11
1 is a terminal or pattern provided on the surface of 1; 11 '''is a terminal or pattern on the back surface; 12 is a slit; 13 is a groove provided in the slit; 14 is a through hole in the slit portion or a partial through hole or conductive metal. 21 is a terminal of the child board, 31 and 32 are solders. 1'is a parent board 11 '' having a conventional slit structure, and 11 'is a terminal or pattern on the front and back of 1'.
Claims (1)
基板(2)を挿入し、子基板の端子(21)と親基板
(1)に設けた対応するパターン(11)とをはんだづけ
してなるプリント基板の実装方法において、親基板のス
リット(12)を部分的なスルーホールとし、該スリット
の幅は挿入する子基板の厚さよりわずかに小さくし、か
つ親基板のスリット部にくし形の切り込み(17)を入れ
突起部(16)を形成し、スリットに子基板を挿入時該突
起部のばね力により子基板を保持することを特徴とする
親子基板の実装方法。1. A sub-board (2) is inserted into a slit (12) provided in the main board (1), and a terminal (21) of the sub-board and a corresponding pattern (11) provided on the main board (1). In the method for mounting a printed circuit board, the slits (12) of the parent board are partially through holes, the width of the slit is slightly smaller than the thickness of the child board to be inserted, and the slit portion of the parent board is A method for mounting a parent-child board, characterized in that a comb-shaped notch (17) is formed to form a projection (16), and the child board is held by the spring force of the projection when the child board is inserted into the slit.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP63298137A JPH0752790B2 (en) | 1988-11-28 | 1988-11-28 | Parent-child board mounting method |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP63298137A JPH0752790B2 (en) | 1988-11-28 | 1988-11-28 | Parent-child board mounting method |
Publications (2)
Publication Number | Publication Date |
---|---|
JPH02144991A JPH02144991A (en) | 1990-06-04 |
JPH0752790B2 true JPH0752790B2 (en) | 1995-06-05 |
Family
ID=17855664
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP63298137A Expired - Lifetime JPH0752790B2 (en) | 1988-11-28 | 1988-11-28 | Parent-child board mounting method |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPH0752790B2 (en) |
Families Citing this family (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
EP0338587A3 (en) * | 1988-04-22 | 1990-09-12 | Kao Corporation | Recording material |
EP0766507B1 (en) * | 1995-09-12 | 2013-03-20 | Allen-Bradley Company, Inc. | Circuit board having a window adapted to receive a single in-line package module |
DE502005002413D1 (en) * | 2005-05-31 | 2008-02-14 | Siemens Ag | A method of manufacturing a printed circuit board and a printed circuit board system, and printed circuit boards and printed circuit board systems produced by such methods |
DE102008012443B4 (en) * | 2008-03-04 | 2015-05-21 | Ifm Electronic Gmbh | Connection arrangement of two printed circuit boards for an optical proximity switch |
Family Cites Families (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS59103471U (en) * | 1982-12-28 | 1984-07-12 | 日本電気株式会社 | printed wiring board |
JPS59186387A (en) * | 1983-04-07 | 1984-10-23 | 松下電器産業株式会社 | Method of bonding printed board |
JPS62254490A (en) * | 1986-04-26 | 1987-11-06 | 東洋通信機株式会社 | Method of connecting printed circuits |
JPS62182577U (en) * | 1986-05-12 | 1987-11-19 |
-
1988
- 1988-11-28 JP JP63298137A patent/JPH0752790B2/en not_active Expired - Lifetime
Also Published As
Publication number | Publication date |
---|---|
JPH02144991A (en) | 1990-06-04 |
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