JPH0750800B2 - LED display device - Google Patents
LED display deviceInfo
- Publication number
- JPH0750800B2 JPH0750800B2 JP9979189A JP9979189A JPH0750800B2 JP H0750800 B2 JPH0750800 B2 JP H0750800B2 JP 9979189 A JP9979189 A JP 9979189A JP 9979189 A JP9979189 A JP 9979189A JP H0750800 B2 JPH0750800 B2 JP H0750800B2
- Authority
- JP
- Japan
- Prior art keywords
- bonding
- led array
- array chip
- chip
- driver
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/42—Wire connectors; Manufacturing methods related thereto
- H01L24/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L24/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/4805—Shape
- H01L2224/4809—Loop shape
- H01L2224/48091—Arched
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48225—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
- H01L2224/48227—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/484—Connecting portions
- H01L2224/48463—Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a ball bond
- H01L2224/48465—Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a ball bond the other connecting portion not on the bonding area being a wedge bond, i.e. ball-to-wedge, regular stitch
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/49—Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/49—Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
- H01L2224/491—Disposition
- H01L2224/4912—Layout
- H01L2224/49175—Parallel arrangements
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/85—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a wire connector
- H01L2224/8512—Aligning
- H01L2224/85148—Aligning involving movement of a part of the bonding apparatus
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/10—Details of semiconductor or other solid state devices to be connected
- H01L2924/11—Device type
- H01L2924/12—Passive devices, e.g. 2 terminal devices
- H01L2924/1204—Optical Diode
- H01L2924/12041—LED
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/10—Details of semiconductor or other solid state devices to be connected
- H01L2924/11—Device type
- H01L2924/14—Integrated circuits
Landscapes
- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Led Device Packages (AREA)
- Led Devices (AREA)
- Wire Bonding (AREA)
Description
【発明の詳細な説明】 ＜産業上の利用分野＞ 本発明は、LEDアレイを用いた表示装置に関し、特にLED
アレイとドライバーICとの接続構成に関するものであ
る。The present invention relates to a display device using an LED array, and more particularly to an LED.
It relates to the connection configuration between the array and the driver IC.
＜従来の技術＞ 従来のドライバー付LEDアレイを用いたLED記録ヘッドを
第５図及び第６図に示す。<Prior Art> FIG. 5 and FIG. 6 show an LED recording head using a conventional LED array with a driver.
第５図において、基板１上に設置された複数個のLEDア
レイチップ２はボンディングワイヤー30により基板１上
の配線パターン４に接続され、同様にLEDアレイチップ
２を駆動するドライバーIC7は、ボンディングワイヤー
6,8によりそれぞれ配線パターン４および外部接続端子
部９に接続されている。ボンディングワイヤー30は、ド
ライバーIC7からの電流をLEDアレイチップ２の発光部５
に供給するための接続線である。通電された発光部５か
ら放出された光は、矢印の方向に収束レンズ10を経て感
光面11に収束される。In FIG. 5, a plurality of LED array chips 2 installed on the substrate 1 are connected to the wiring pattern 4 on the substrate 1 by the bonding wires 30, and the driver IC 7 for driving the LED array chips 2 is a bonding wire.
6 and 8 are connected to the wiring pattern 4 and the external connection terminal portion 9, respectively. The bonding wire 30 transmits the current from the driver IC 7 to the light emitting section 5 of the LED array chip 2.
Is a connection line for supplying to. The light emitted from the light emitting section 5 which is energized is converged on the photosensitive surface 11 through the converging lens 10 in the direction of the arrow.
しかし第５図のものでは、発光部５から放出された光が
ボンディングワイヤー30の直角コーナー部で反射され、
感光面11での光スポット径を増大させ光像のにじみを生
じさせる。このようなにじみを解決する構造として、例
えば特開昭63−216391号公報において、第６図に示され
るように、LEDアレイチップ２と配線パターン４とを接
続するボンディングワイヤー30のLEDアレイチップ面に
対する立上がり角度Ａをほぼ45度以下とすることが提案
されている。However, in the case of FIG. 5, the light emitted from the light emitting portion 5 is reflected at the right-angled corner portion of the bonding wire 30,
The diameter of the light spot on the photosensitive surface 11 is increased to cause bleeding of the light image. As a structure for solving such bleeding, for example, in JP-A-63-216391, as shown in FIG. 6, the LED array chip surface of the bonding wire 30 for connecting the LED array chip 2 and the wiring pattern 4 to each other. It has been proposed that the rising angle A with respect to
＜発明が解決しようとする課題＞ 上記従来技術においては、LEDアレイチップ２と配線パ
ターン４とを接続するボンディングワイヤー30のLEDア
レイチップ面に対する立上がり角度Ａを45度以下とする
具体的に手段として、ウエッジボンディングの方法を挙
げている。ところでこのウエッジボンディングの方法は
ボンディングワイヤを楔状の治具の先端部で押さえつけ
てボンディングする方法であり、立上がり角度を低く設
定することは可能であるが、ボンディング条件をそれぞ
れの化合物半導体素子に対して決めることが難しく、ま
た楔状の治具で押さえつけた跡が長くなりかつ大きな面
積を必要とする問題点があった。<Problems to be Solved by the Invention> In the above conventional technique, as a concrete means for setting the rising angle A of the bonding wire 30 connecting the LED array chip 2 and the wiring pattern 4 with respect to the LED array chip surface to 45 degrees or less. , The method of wedge bonding is mentioned. By the way, this wedge bonding method is a method of bonding by pressing a bonding wire with the tip of a wedge-shaped jig, and it is possible to set the rising angle to a low value, but the bonding conditions are different for each compound semiconductor element. It was difficult to determine, and there were problems that the marks pressed by the wedge-shaped jig became long and required a large area.
本発明はこのような問題点を解決するためになされたも
のであり、新規なLEDアレイチップとICチップとのボン
ディング接続構造を提供することを目的とする。The present invention has been made to solve such problems, and an object thereof is to provide a novel bonding connection structure between an LED array chip and an IC chip.
＜問題点を解決するための手段＞ 本発明にかかるLEDアレイチップを用いた表示装置は、L
EDアレイチップと、該LEDアレイチップの駆動用ドライ
バーICチップとを備え、前記LEDアレイチップと駆動用
ドライバーICとをワイヤボンディングによって接続して
なるLED表示装置において、前記LEDアレイチップはその
ボンディング部の電極膜厚が３〜10μｍと設定され、LE
Dアレイチップのボンディング部とICチップのボンディ
ング部との距離が500〜2,000μｍとなるよう配置してな
り、ボールボンディングの第１ボンディングをICチップ
に為し、第２ボンディングをLEDアレイチップに為すこ
とを特徴としている。<Means for Solving Problems> A display device using an LED array chip according to the present invention is
An LED display device comprising an ED array chip and a driver IC chip for driving the LED array chip, wherein the LED array chip and the driver driver IC are connected by wire bonding, wherein the LED array chip has a bonding portion. Electrode thickness of 3 to 10 μm is set, and LE
It is arranged so that the distance between the bonding part of the D array chip and the bonding part of the IC chip is 500 to 2,000 μm, and the first bonding of the ball bonding is the IC chip and the second bonding is the LED array chip. It is characterized by that.
＜作用＞ 上記構成によれば、本発明のLED表示装置は、LEDアレイ
チップのボンディング部とICチップのボンディング部と
の距離を500〜2,000μｍとなるよう配置し、ボールボン
ディングの第１ボンディングをICチップに為し、第２ボ
ンディングをLEDアレイチップに為しているので、LEDア
レイチップ面からのボンディングワイヤー立ち上がり角
度を低くすることができ、また、前記LEDアレイチップ
はそのボンディング部の電極膜厚が３〜10μｍと設定さ
れているので、化合物半導体であるLEDアレイチップに
第２ボンディング時の悪影響を与えることなく容易にボ
ンディング条件を広い範囲で設定することができる。<Operation> According to the above configuration, the LED display device of the present invention is arranged such that the distance between the bonding portion of the LED array chip and the bonding portion of the IC chip is 500 to 2,000 μm, and the first bonding of ball bonding is performed. Since the second bonding is done to the IC chip and the LED array chip, the rising angle of the bonding wire from the LED array chip surface can be lowered, and the LED array chip has an electrode film at the bonding portion. Since the thickness is set to 3 to 10 μm, the bonding conditions can be easily set in a wide range without adversely affecting the LED array chip which is a compound semiconductor during the second bonding.
＜実施例＞ 以下第１図乃至第４図に従って本発明の一実施例を説明
する。<Embodiment> An embodiment of the present invention will be described below with reference to FIGS.
第１図は本発明にかかるLEDアレイチップ（GaAsP化合物
半導体）とICチップとのボンディング接続方法の一実施
例を示す断面図である。FIG. 1 is a sectional view showing an embodiment of a bonding connection method between an LED array chip (GaAsP compound semiconductor) and an IC chip according to the present invention.
基板上12にLEDアレイチップ13とドライバーIC14と14′
とが配設されており、LEDアレイチップ13とドライバーI
C14,14′とはボンディングワイヤー15,15′とで電気的
に接続され、ドライバーIC14,14′からの電流がLEDアレ
イチップ13に供給され、発光部16から電気信号に応じた
発光強度がこの発光部から放出される。ボンディングワ
イヤー15,15′の立上がり角度は第１図に示されるよう
にドライバーIC14,14′側は大きく設定され、LEDアレイ
チップ13側は45゜以下の低い角度に設定されている。LE
Dアレイチップ13のボンディングでは極めて多くの接続
（例えば200本〜1400本）を必要とするため、ボールボ
ンディング法による高速自動ボンディング装置を用い、
第１ボンディングをICチップ14,14′に為し、第２ボン
ディングをLEDアレイチップ13に為すことにより行われ
ている。LED array chip 13 and driver ICs 14 and 14 'on board 12
And LED array chip 13 and driver I
C14, 14 'is electrically connected to the bonding wires 15, 15', the current from the driver IC 14, 14 'is supplied to the LED array chip 13, and the light emission intensity from the light emitting section 16 according to the electric signal is Emitted from the light emitting part. As shown in FIG. 1, the rising angles of the bonding wires 15 and 15 'are set large on the driver ICs 14 and 14' side, and set to a low angle of 45 ° or less on the LED array chip 13 side. LE
Since the bonding of the D array chip 13 requires an extremely large number of connections (for example, 200 to 1400), a high-speed automatic bonding device using a ball bonding method is used.
The first bonding is performed on the IC chips 14 and 14 ', and the second bonding is performed on the LED array chip 13.
ボンディングワイヤー線は、例えば田中貴金属工業株式
会社製の高温・高速金ボンディングワイヤ FA−25 線
径25μφ 純度99.99％以上の金線を用いた。またボー
ルボンディング法では第１ボンディング時（ICチップ13
側）よりも第２ボンディング時（LEDアレイチップ14,1
4′側）の方がボンディング時のダメージは大きくなり
易いが、LEDアレイチップ13にかかるボンディング時の
ダメージを低減するため、ボンディング条件の最適化を
行った。即ち、荷重の低減、ツールスピードの低速化、
超音波強度および時間の低減、キャピラリー形状の改善
による単位面積当たりの負荷荷重の低減、加熱温度の最
適化（約200℃）などである。さらにLEDアレイチップの
ボンダビリディを向上させるため、電極構造の改善を行
った。従来LEDアレイチップ13であるGaAsP化合物半導体
の表面電極は約１μｍのアルミニューム（Al）膜が用い
られていたが、今回の実施例ではその膜厚を３〜10μｍ
望ましくは４〜６μｍ とすることによりボンディン
グ条件を容易に設定できるようになった。As the bonding wire wire, for example, a high temperature / high speed gold bonding wire FA-25 manufactured by Tanaka Kikinzoku Kogyo Co., Ltd. having a wire diameter of 25 μφ and a purity of 99.99% or more was used. In the ball bonding method, the first bonding (IC chip 13
Second bonding time (LED array chip 14,1)
The damage on bonding is more likely to occur on the 4'side), but the bonding conditions were optimized in order to reduce the damage on the LED array chip 13 during bonding. That is, reduction of load, reduction of tool speed,
This includes reducing the ultrasonic wave intensity and time, reducing the load applied per unit area by improving the capillary shape, and optimizing the heating temperature (about 200 ° C). Furthermore, in order to improve the bondability of the LED array chip, we improved the electrode structure. Conventionally, the surface electrode of the GaAsP compound semiconductor that is the LED array chip 13 used an aluminum (Al) film of about 1 μm, but in this embodiment, the film thickness is 3 to 10 μm.
Desirably, the bonding condition can be easily set by setting the thickness to 4 to 6 μm.
第２図は本発明にかかるLEDアレイチップ13（GaAsP化合
物半導体）とICチップ14,14′とのボンディング接続構
造の一実施例を示す平面図である。基板上12にLEDアレ
イチップ13とドライバーIC14,14′とが配設されてお
り、LEDアレイチップ13とドライバーIC14,14′とはボン
ディングワイヤー15,15′とで電気的に接続されてい
る。LEDアレイチップ13の外形寸法は幅約1.5mm,長さ8.6
mm,発光点のピッチは600DPI（600発光点／インチ），発
光ダイオードの発光部面積は約30μｍ角であり、奇数番
目の発光ダイオードはドライバーIC14に偶数番目の発光
ダイオードはドライバーIC14′に金線のボンディングワ
イヤーで接続されている。ここで、LEDアレイチップ13
のボンディングパッド部とドライバーIC14,14′のボン
ディングパット部と距離Ｌは最適化されて配設されてい
る。LEDアレイチップ13面に対するボンディングワイヤ
ー15,15′の立上がり角度Ａとパッド部間の距離の関係
は次のとおりである。FIG. 2 is a plan view showing an embodiment of the bonding connection structure between the LED array chip 13 (GaAsP compound semiconductor) and the IC chips 14 and 14 'according to the present invention. The LED array chip 13 and the driver ICs 14 and 14 'are arranged on the substrate 12, and the LED array chip 13 and the driver ICs 14 and 14' are electrically connected by bonding wires 15 and 15 '. The external dimensions of the LED array chip 13 are about 1.5 mm in width and 8.6 in length.
mm, the pitch of the light emitting points is 600 DPI (600 light emitting points / inch), the light emitting area of the light emitting diode is about 30 μm square, and the odd numbered light emitting diode is the driver IC14 and the even numbered light emitting diode is the driver IC14 ′. It is connected with a bonding wire. Where the LED array chip 13
The distance L between the bonding pad section of the driver IC and the bonding pad section of the driver ICs 14 and 14 'is optimized. The relationship between the rising angle A of the bonding wires 15 and 15 'with respect to the surface of the LED array chip 13 and the distance between the pads is as follows.
LEDアレイチップ13のボンディングパット部とドライバ
ーIC14,14′のボンディングパット部と距離Ｌは500〜20
00μｍ、望ましくは600〜1200μｍである。 The distance L between the bonding pad of the LED array chip 13 and the bonding pads of the driver ICs 14 and 14 'is 500 to 20.
It is 00 μm, preferably 600 to 1200 μm.
また、ボンディングワイヤー15,15′として上記実施例
では裸の金線を用いたが、ボンディングワイヤー15,1
5′による発光ダイオードの光の乱反射をより低減する
ために、樹脂コーティングされたボンディングワイヤー
や、表面反射を低減するための表面処理を施したボンデ
ィングワイヤーや、表面反射の小さい材質のボンディン
グワイヤーを用いても良いことは当然である。Further, although bare gold wires were used as the bonding wires 15 and 15 'in the above-mentioned embodiment, the bonding wires 15 and 1
In order to further reduce diffuse reflection of light from the light emitting diode due to 5 ', use resin-coated bonding wires, surface-treated bonding wires to reduce surface reflection, or bonding wires made of materials with low surface reflection. Of course it is okay.
第３図は本発明にかかる保護板付きのLEDアレイの断面
図である。基板上12にLEDアレイチップ13とドライバーI
C14と14′とが配設されており、LEDアレイチップ13とド
ライバーIC14,14′とはボンディングワイヤー15,15′と
で電気的に接続され、その上に保護板17が配設されてい
る。保護板の目的はLEDやICやボンディングワイヤーの
保護と発光部の汚れの防止および発光部からの乱反射光
の防止である。保護板17は透明ガラスや透明アクリルや
特定の色に着色されたそれら材質で構成される。また第
３図に示されるように遮光板（または膜）18,18′を設
ける場合もある。遮光板（または膜）18と18′とのギャ
ップ（スリット状の光出射窓）19は、実施例では0.1〜
0.5mmであり、黒色の塗料をプリントすることによりな
された。FIG. 3 is a sectional view of an LED array with a protective plate according to the present invention. LED array chip 13 and driver I on board 12
C14 and 14 'are arranged, the LED array chip 13 and the driver ICs 14 and 14' are electrically connected with bonding wires 15 and 15 ', and a protective plate 17 is arranged thereon. . The purpose of the protective plate is to protect the LEDs, ICs and bonding wires, prevent the light emitting part from becoming dirty, and prevent diffused light from the light emitting part. The protective plate 17 is made of transparent glass, transparent acrylic, or those materials colored in a specific color. Further, as shown in FIG. 3, light shielding plates (or films) 18, 18 'may be provided. The gap (slit-shaped light exit window) 19 between the light shielding plate (or film) 18 and 18 'is 0.1 to
0.5 mm, made by printing black paint.
第４図は本発明にかかるLEDアレイチップを用いた表示
装置の構成図である。収束レンズ20はLEDアレイチップ1
3の発光部16とほぼ焦点の位置関係にあるため、発光ダ
イオードの光は収束レンズ20で平行光線となり、振動ミ
ラー21に当たる。振動ミラー21は、点線21′で示されよ
うにLEDアレイチップ13の発光部位置と同期して振動
（通常50〜60Hz）するため、LEDアレイチップ13を一方
向に走査した情報が二次元の映像情報や文字情報の形で
観察者の目25に認識される。なお、24はLED表示装置の
枠体、22はミラー台、23は表示部分の保護板（保護ガラ
ス板）である。FIG. 4 is a block diagram of a display device using the LED array chip according to the present invention. Converging lens 20 is LED array chip 1
The light from the light emitting diode is collimated by the converging lens 20 and strikes the vibrating mirror 21 because the light is emitted from the light emitting portion 16 of FIG. Since the vibrating mirror 21 vibrates (usually 50 to 60 Hz) in synchronization with the position of the light emitting portion of the LED array chip 13 as indicated by the dotted line 21 ', information obtained by scanning the LED array chip 13 in one direction is two-dimensional. It is recognized by the observer's eyes 25 in the form of image information and text information. In addition, 24 is a frame body of the LED display device, 22 is a mirror stand, and 23 is a protective plate (protective glass plate) for the display portion.
＜発明の効果＞ 以上説明したように本発明は、LEDアレイチップに接続
するボンディングワイヤーの立上がり角度を45度以下に
する構成として、LEDアレイチップのボンディング部とI
Cチップのボンディング部との距離が500〜2,000μｍと
なるよう配置し、ボールボンディングの第１ボンディン
グをICチップに為し、第２ボンディングをLEDアレイチ
ップに為す構成とし、さらに前記第２ボンディングによ
るボンディング時の悪影響をLEDアレイチップに与えな
い構成として、LEDアレイチップのボンディング部の電
極膜厚を３〜10μｍと設定することにより、容易にボン
ディング条件を設定することが可能となり、にじみがな
く安価で高信頼性のあるLED表示装置を実現できる効果
がある。<Effects of the Invention> As described above, according to the present invention, the bonding wire of the LED array chip and the bonding portion of the LED array chip are configured so that the rising angle of the bonding wire connected to the LED array chip is 45 degrees or less.
Arranged so that the distance from the bonding portion of the C chip is 500 to 2,000 μm, the first ball bonding is used as the IC chip, and the second bonding is used as the LED array chip. By setting the electrode film thickness of the bonding part of the LED array chip to 3 to 10 μm as a structure that does not adversely affect the LED array chip during bonding, it is possible to easily set the bonding conditions and there is no bleeding and it is inexpensive. Therefore, there is an effect that a highly reliable LED display device can be realized.
第１図は本発明のLEDアレイチップとICチップとのボン
ディング接続構成の一実施例を示す断面図、第２図は同
平面図、第３図は本発明の保護板付きのLEDアレイ例を
示す断面図、第４図は本発明のLEDアレイを用いた表示
装置例を示す構成図、第５図および第６図は従来例を示
す断面図及び要部拡大断面図である。 12……基板、13……LEDアレイチップ、14,14′……ドラ
イバーIC、15,15′……ボンディングワイヤー。FIG. 1 is a sectional view showing an embodiment of a bonding connection structure of an LED array chip and an IC chip of the present invention, FIG. 2 is a plan view of the same, and FIG. 3 is an example of an LED array with a protective plate of the present invention. 4 is a sectional view showing an example of a display device using the LED array of the present invention, and FIGS. 5 and 6 are a sectional view showing a conventional example and an enlarged sectional view of an essential part. 12 …… Board, 13 …… LED array chip, 14,14 ′ …… Driver IC, 15,15 ′ …… Bonding wire.
Claims (1)
駆動用ドライバーICチップとを備え、前記LEDアレイチ
ップと駆動用ドライバーICとをワイヤボンディングによ
って接続してなるLED表示装置において、 前記LEDアレイチップはそのボンディング部の電極膜厚
が３〜10μｍと設定され、LEDアレイチップのボンディ
ング部とICチップのボンディング部との距離が500〜2,0
00μｍとなるように配置してなり、ボールボンディング
の第１ボンディングをICチップに為し、第２ボンディン
グをLEDアレイチップに為すことを特徴とするLED表示装
置。1. An LED display device comprising an LED array chip and a driver IC chip for driving the LED array chip, wherein the LED array chip and the driver driver IC are connected by wire bonding. The electrode film thickness of the bonding part of the chip is set to 3 to 10 μm, and the distance between the LED array chip bonding part and the IC chip bonding part is 500 to 2,0.
An LED display device, which is arranged so as to have a diameter of 00 μm, wherein the first bonding of ball bonding is made into an IC chip and the second bonding is made into an LED array chip.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP9979189A JPH0750800B2 (en) | 1989-04-18 | 1989-04-18 | LED display device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP9979189A JPH0750800B2 (en) | 1989-04-18 | 1989-04-18 | LED display device |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPH02277274A JPH02277274A (en) | 1990-11-13 |
| JPH0750800B2 true JPH0750800B2 (en) | 1995-05-31 |
Family
ID=14256745
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP9979189A Expired - Fee Related JPH0750800B2 (en) | 1989-04-18 | 1989-04-18 | LED display device |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH0750800B2 (en) |
Family Cites Families (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS6118848U (en) * | 1984-07-06 | 1986-02-03 | 三洋電機株式会社 | optical print head |
| JPS61211063A (en) * | 1985-03-15 | 1986-09-19 | Kyocera Corp | Optical printing head |
| JPS62242558A (en) * | 1986-04-16 | 1987-10-23 | Fuji Xerox Co Ltd | Light-emitting diode array unit |
| JPS63237968A (en) * | 1987-03-26 | 1988-10-04 | Nec Corp | Light-emitting diode printer head |
-
1989
- 1989-04-18 JP JP9979189A patent/JPH0750800B2/en not_active Expired - Fee Related
Also Published As
| Publication number | Publication date |
|---|---|
| JPH02277274A (en) | 1990-11-13 |
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| Date | Code | Title | Description |
|---|---|---|---|
| LAPS | Cancellation because of no payment of annual fees |