JPH02277274A - Led indicator - Google Patents

Led indicator

Info

Publication number
JPH02277274A
JPH02277274A JP1099791A JP9979189A JPH02277274A JP H02277274 A JPH02277274 A JP H02277274A JP 1099791 A JP1099791 A JP 1099791A JP 9979189 A JP9979189 A JP 9979189A JP H02277274 A JPH02277274 A JP H02277274A
Authority
JP
Japan
Prior art keywords
bonding
chip
led array
array chip
led
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP1099791A
Other languages
Japanese (ja)
Other versions
JPH0750800B2 (en
Inventor
Yasuo Yoshioka
靖雄 吉岡
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Sharp Corp
Original Assignee
Sharp Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sharp Corp filed Critical Sharp Corp
Priority to JP9979189A priority Critical patent/JPH0750800B2/en
Publication of JPH02277274A publication Critical patent/JPH02277274A/en
Publication of JPH0750800B2 publication Critical patent/JPH0750800B2/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/42—Wire connectors; Manufacturing methods related thereto
    • H01L24/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L24/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805—Shape
    • H01L2224/4809—Loop shape
    • H01L2224/48091—Arched
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481—Disposition
    • H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48225—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H01L2224/48227—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/484—Connecting portions
    • H01L2224/48463—Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a ball bond
    • H01L2224/48465—Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a ball bond the other connecting portion not on the bonding area being a wedge bond, i.e. ball-to-wedge, regular stitch
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/49—Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/49—Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
    • H01L2224/491—Disposition
    • H01L2224/4912—Layout
    • H01L2224/49175—Parallel arrangements
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/85—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a wire connector
    • H01L2224/8512—Aligning
    • H01L2224/85148—Aligning involving movement of a part of the bonding apparatus
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10—Details of semiconductor or other solid state devices to be connected
    • H01L2924/11—Device type
    • H01L2924/12—Passive devices, e.g. 2 terminal devices
    • H01L2924/1204—Optical Diode
    • H01L2924/12041—LED
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10—Details of semiconductor or other solid state devices to be connected
    • H01L2924/11—Device type
    • H01L2924/14—Integrated circuits

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Wire Bonding (AREA)
  • Led Device Packages (AREA)
  • Led Devices (AREA)

Abstract

PURPOSE:To facilitate the setting of bonding conditions by specifying and disposing a distance of bonding parts of a LED array chip and an IC chip, and conducting first bonding of ball bonding at the chip and second bonding at the array chip. CONSTITUTION:In a ball bonding connecting structure, first bonding is conducted at IC chips 14, 14', second bonding is executed at a LED array chip 13, and a distance between the bonding pad of the chip 13 and the bonding pads of the chips 14, 14' is 20000mum or less. Thus, the rising angles of bonding wires 15, 15' from the face of the chip 13 are reduced, and bonding conditions can be easily set to a wide range without adverse influence at the time of bonding to the chip 13 of a compound semiconductor.

Description

【発明の詳細な説明】 〈産業上の利用分野〉 本発明は、ＬＥＤアレイを用いた表示装置に関し、特に
ＬＥＤアレイとドライバー１ｃとの接続構成に関するも
のである。DETAILED DESCRIPTION OF THE INVENTION <Industrial Application Field> The present invention relates to a display device using an LED array, and particularly relates to a connection configuration between an LED array and a driver 1c.

〈従来の技術〉 従来のドライバー付ＬＥＤアレイを用いたＬＥＤ記録ヘ
ッドを第５図及び第６図に示す。<Prior Art> An LED recording head using a conventional LED array with a driver is shown in FIGS. 5 and 6.

第５図において、基板１上に設置された複数個のＬＥＤ
アレイチップ２はボンディングワイヤー３０により基板
１上の配線パターン４に接続され、同様ノこＬＥＤアレ
イチップ２を駆動するドライバーＩＣ７は、ボンディン
グワイヤー６．８によりそれぞれ配線パターン４および
外部接続端子部９に接続されている。ボンディングワイ
ヤー３０は、ドライバーＩＣ７からの電流をＬＥＤアレ
イチップ２の発光部５に供給するための接続線である。In FIG. 5, a plurality of LEDs installed on the board 1
The array chip 2 is connected to the wiring pattern 4 on the substrate 1 by a bonding wire 30, and similarly, the driver IC 7 for driving the LED array chip 2 is connected to the wiring pattern 4 and the external connection terminal part 9 by bonding wires 6.8, respectively. It is connected. The bonding wire 30 is a connection line for supplying current from the driver IC 7 to the light emitting section 5 of the LED array chip 2.

通電された発光部５から放出された光は、矢印の方向に
収束レンズ１０を経て感光面１１に収束される。Light emitted from the energized light emitting section 5 passes through the converging lens 10 in the direction of the arrow and is converged onto the photosensitive surface 11.

しかし第５図のものでは、発光部５から放出された光が
ボンディングワイヤー３０の直角コーナ部で反射され、
感光面１１での光スポツト径を増大させ光像のにじみを
生じさせる。このようなにじみを解決する構造として、
例えば特開昭６３−２１６３９１号公報において、第６
図に示されるように、ＬＥＤアレイチップ２と配線パタ
ーン４とを接続するボンディングワイヤー３０のＬＥＤ
アレイチップ面に対する立上がり角度Ａをほぼ４５度以
下とすることが提案されている。However, in the one shown in FIG. 5, the light emitted from the light emitting part 5 is reflected at the right angle corner of the bonding wire 30,
The diameter of the light spot on the photosensitive surface 11 is increased, causing blurring of the light image. As a structure to solve this kind of bleeding,
For example, in Japanese Patent Application Laid-open No. 63-216391,
As shown in the figure, the LED of the bonding wire 30 connecting the LED array chip 2 and the wiring pattern 4
It has been proposed that the rising angle A with respect to the array chip surface be approximately 45 degrees or less.

〈発明が解決しようとする課題〉 上記従来技術においては、ＬＥＤアレイチップ２と配線
パターン４とを接続するボンディングワイヤー３０のＬ
ＥＤアレイチップ面に対する立上がり角度Ａを４５度以
下とする具体的に手段として、ウェッジボンディングの
方法を挙げている。<Problems to be Solved by the Invention> In the above-mentioned conventional technology, the length of the bonding wire 30 connecting the LED array chip 2 and the wiring pattern 4 is
A wedge bonding method is cited as a specific means for making the rising angle A with respect to the ED array chip surface 45 degrees or less.

ところでこのウェッジボンディングの方法はボンディン
グワイヤを楔状の治具の先端部で押さえつけてボンディ
ングする方法であり、立上がり角度を低く設定すること
は可能であるが、ボンディング条件をそれぞれの化合物
半導体素子に対して決めることか難しく、また楔状の治
具で押さえつけた跡が長くなりかつ大きな面積を必要と
する問題点があった。By the way, this wedge bonding method is a method of bonding by pressing the bonding wire with the tip of a wedge-shaped jig, and it is possible to set the rising angle low, but the bonding conditions can be adjusted depending on each compound semiconductor element. It was difficult to determine, and there were also problems in that the imprint created by pressing with a wedge-shaped jig became long and required a large area.

本発明はこのような問題点を解決するためになされたも
のであり、新規なＬＥＤアレイチップとＩＣチップとの
ボンディング接続構造を提供することを目的とする。The present invention was made to solve these problems, and an object of the present invention is to provide a new bonding connection structure between an LED array chip and an IC chip.

〈問題点を解決するための手段〉 本発明にがかるＬＥＤアレイチップを用いた表示装置は
、Ｌ　Ｅ　Ｄアレイチ、プとＩＣドライ）ｚとのボール
ボンディング接続構造において、第一ボンディングをＩ
Ｃチップに為し、第２ホンデイングをＬＥＤアレイチッ
プに為すことを特徴としている。また、ＬＥＤアレイチ
ップのホンティングパント部とＩｃドライバーのホンテ
ィングパント部との距離を２．０００μｍ以下とするこ
とら特徴としている。<Means for Solving the Problems> A display device using an LED array chip according to the present invention has a ball bonding connection structure between an LED array chip and an IC dryer, in which the first bonding is
It is characterized in that it is made into a C chip, and the second hondaing is made into an LED array chip. Another feature is that the distance between the honting punt part of the LED array chip and the honting punt part of the Ic driver is 2.000 μm or less.

〈作用〉 上記の構造により、ＬＥＤアレイチップ面からのボンデ
ィングワイヤーの立上がり角度を低くし、化合物半導体
であるＬ　Ｅ　Ｄアレイチップにボンディング時の悪影
響を与えることなく容易にホンティング条件を広い範囲
で設定することかできる。<Function> The above structure lowers the rising angle of the bonding wire from the LED array chip surface, making it possible to easily adjust the bonding conditions over a wide range without adversely affecting the LED array chip, which is a compound semiconductor, during bonding. Can be set.

〈実施例〉 以下第１図乃至第４図に従って本発明の一実施例を説明
する。<Embodiment> An embodiment of the present invention will be described below with reference to FIGS. 1 to 4.

第１図は本発明にかかるＬＥＤアレイチップ（ＧａＡｓ
　Ｐ化合物半導体）とＩＣチップとのボンディング接続
方法の一実施例を示す断面図である。FIG. 1 shows an LED array chip (GaAs) according to the present invention.
FIG. 2 is a cross-sectional view showing an example of a method for bonding a P compound semiconductor and an IC chip.

基板上１２にＬＥＤアレイチップ１３とドライバーＩＣ
１４と１４’　とが配設されており、ＬＥＤアレイチッ
プ１３とドライバーＩＣ１４，１４とはボンディングワ
イヤー１５．１５’　　とで電気的に接続され、ドライ
バーＩＣ１４，１４’　からの電流かＬＥＤアレイチッ
プ１３に供給され、発光部１６から電気信号に応じた発
光強度がこの発光部から放出される。ボンディングワイ
ヤー１５．１５’　の立上がり角度は第１図に示される
ようにドライバーＩＣ１４，１４’　側は大きく設定さ
れ、ＬＥＤアレイチップ１３側は４５°以下の低い角度
に設定されている。ＬＥＤアレイチ、フ１３のボンディ
ングでは極めて多くの接続（例えば２００本〜１４００
本）を必要とするため、ネルボンディング法による高速
自動ボンディング装置を用い、第１ボンディングをＩＣ
チップ１４゜１４′に為し、第２ボンディングをＬＥＤ
アレイチップ１３に為すことにより行われている。LED array chip 13 and driver IC on board 12
14 and 14' are arranged, and the LED array chip 13 and the driver ICs 14 and 14 are electrically connected by bonding wires 15 and 15', and the current from the driver ICs 14 and 14' is connected to the LED array chip 13. The light emitting unit 16 emits light with an intensity corresponding to the electric signal. As shown in FIG. 1, the rising angle of the bonding wires 15, 15' is set large on the driver IC 14, 14' side, and is set at a low angle of 45° or less on the LED array chip 13 side. The bonding of the LED array and F13 requires an extremely large number of connections (for example, 200 to 1400 connections).
Since the first bonding is performed using a high-speed automatic bonding device using the flannel bonding method,
Make the chip 14°14' and connect the second bonding to the LED.
This is done by applying it to the array chip 13.

ボンディングワイヤー線は、例えば田中貴金属工業株式
会社製の高温・高速金ボンディングワイヤ　ＦＡ−２５
線径２５μφ　純度９９９９％以上の金線を用いた。ま
たホールボンディング法では第１ボンディング時（ＩＣ
チップ１３側）よりも第２ボンディング時（Ｌ　Ｅ　Ｄ
アレイチ、プ１４．１４’側）の方かボンディング時の
タメジは大きくなり易いか、ＬＥＤアレイチ、ブ１３に
かかるボンディング時のダメージを低減するため、ボン
ディング条件の最適化を行った。即ち、荷重の低減、ツ
ールスピードの低速化、超音波強度および時間の低減、
キャピラリー形状の改善による単位面積当たりの負荷荷
重の低減、加熱温度の最適化（約２００°Ｃ）などであ
る。ざらにＬＥＤアレイチップのボンタビリティを向上
させるため、電極構造の改善を行った。従来ＬＥＤアレ
イチップ１３であるＧａＡｓＰ化合物半導体の表面電極
は約１μｍのアルミニューム（Ａ　Ｉ　）　膜力用いら
れていたが、今回の実施例ではその膜厚を゛３〜１０μ
ｍ　望ましくは４〜６μｍ　とすることによりボンディ
ング条件を容易に設定できるようになった。The bonding wire wire is, for example, high-temperature/high-speed gold bonding wire FA-25 manufactured by Tanaka Kikinzoku Kogyo Co., Ltd.
A gold wire with a wire diameter of 25 μφ and a purity of 9999% or more was used. In addition, in the hole bonding method, during the first bonding (IC
chip 13 side) during second bonding (L E D
The bonding conditions were optimized in order to reduce the damage to the LED array panel 13 during bonding, since the damage during bonding tends to be larger on the LED array panel 14 and 14' side. i.e. reduced loads, lower tool speeds, reduced ultrasonic intensity and time,
These include reducing the load per unit area by improving the capillary shape and optimizing the heating temperature (approximately 200°C). In order to roughly improve the bondability of the LED array chip, we improved the electrode structure. Conventionally, the surface electrode of the GaAsP compound semiconductor that is the LED array chip 13 was made of aluminum (AI) film with a thickness of approximately 1 μm, but in this embodiment, the film thickness was changed to 3 to 10 μm.
By setting m to preferably 4 to 6 μm, bonding conditions can now be easily set.

第２図は本発明にかかるＬＥＤアレイチップ１３（Ｇａ
ＡｓＰ化合物半導体）とＩＣチップ１４゜１４′とのボ
ンディング接続構造の一実施例を示す平面図である。基
板上１２にＬＥＤアレイチップ１３とドライバーＩＣ１
４と１４′とが配設されており、ＬＥＤアレイチップ１
３とドライバーＩＣ１４，１４’　とはボンディングワ
イヤー１５゜１５′とで電気的に接続されている。ＬＥ
Ｄアレイチップ１３の外形寸法は幅約１．５ｍｍ、長さ
８．６ｍｍ、発光点のピッチは６００ＤＰＩ　　（６０
０発光点／インチ）１発光タイオードの発光部面積は約
３０μｍ角であり、奇数番目の発光ダイオードはドライ
バーＩＣ１４に偶数番目の発光ダイオードはドライバー
ＩＣ１４’　に金線のボンディングワイヤーで接続され
ている。ここで、ＬＥＤアレイチップ１３のボンディン
グパット部とドライバーＩＣ１４，１４’　のボンディ
ングパット部と距離りは最適化されて配設されている。FIG. 2 shows an LED array chip 13 (Ga
FIG. 2 is a plan view showing an embodiment of a bonding connection structure between an AsP compound semiconductor (AsP compound semiconductor) and an IC chip 14°14'. LED array chip 13 and driver IC 1 on board 12
4 and 14' are arranged, and the LED array chip 1
3 and the driver ICs 14, 14' are electrically connected by bonding wires 15.15'. L.E.
The external dimensions of the D array chip 13 are approximately 1.5 mm in width and 8.6 mm in length, and the pitch of the light emitting points is 600 DPI (60
0 light emitting points/inch) The light emitting area of one light emitting diode is about 30 μm square, and the odd numbered light emitting diodes are connected to the driver IC 14 and the even numbered light emitting diodes are connected to the driver IC 14' with gold bonding wires. Here, the distance between the bonding pads of the LED array chip 13 and the bonding pads of the driver ICs 14, 14' is optimized.

ＬＥＤアレイチップ１３面に対するボンディングワイヤ
ー１５．１５’の立上がり角度Ａとパッド部間の距離の
関係は次のとおりである。The relationship between the rising angle A of the bonding wire 15, 15' with respect to the surface of the LED array chip 13 and the distance between the pad portions is as follows.

ＬＥＤアレイチップ１３のボンディングパット部とドラ
イバーＩＣ１４，１４’　のボンディングパット部と距
離りは５００〜２０００μｍ１望ましくは６００〜１２
００μｍである。The distance between the bonding pad portion of the LED array chip 13 and the bonding pad portion of the driver IC 14, 14' is 500 to 2000 μm, preferably 600 to 12 μm.
00 μm.

また、ボンディングワイヤー１５．１５’　として上記
実施例では裸の金線を用いたが、ボンディングワイヤー
１５．１５’　による発光ダイオードの光の乱反射をよ
り低減するために、樹脂コーティングされたボンディン
グワイヤーや、表面反射を低減するための表面処理を施
したボンディングワイヤーや、表面反射の小さい材質の
ボンディングワイヤーを用いても良いことは当然である
。Furthermore, although a bare gold wire was used as the bonding wire 15.15' in the above embodiment, in order to further reduce the diffuse reflection of the light from the light emitting diode by the bonding wire 15.15', a resin-coated bonding wire, It goes without saying that a bonding wire that has been subjected to a surface treatment to reduce surface reflection or a bonding wire made of a material with low surface reflection may be used.

第３図は本発明にかかる保護板付きのＬＥＤアレイの断
面図である。基板上１２にＬＥＤアレイチップ１３とド
ライバーＩＣ１４と１４’　　とが配設されており、Ｌ
ＥＤアレイチップ１３とドライバーＩＣ１４，１４’　
とはボンディングワイヤ１５．１５’　とで電気的に接
続され、その上に保護板１７が配設されている。保護板
の目的はＬＥＤやＩｃやボンディングワイヤーの保護と
発光部の汚れの防止および発光部からの乱反射光の防止
である。保護板１７は透明ガラスや透明アクリルや特定
の色に着色されたそれら材質で構成される。FIG. 3 is a sectional view of an LED array with a protection plate according to the present invention. An LED array chip 13 and driver ICs 14 and 14' are arranged on the board 12, and L
ED array chip 13 and driver IC 14, 14'
are electrically connected to each other by bonding wires 15 and 15', and a protection plate 17 is disposed thereon. The purpose of the protective plate is to protect the LED, IC, and bonding wire, prevent the light emitting part from getting dirty, and prevent diffusely reflected light from the light emitting part. The protection plate 17 is made of transparent glass, transparent acrylic, or any of these materials colored in a specific color.

また第３図に示されるように遮光板（または膜）１８．
１８’　を設ける場合もある。遮光板（または膜）１８
と１８′　とのギャップ（スリット状の光出射窓）１９
は、実施例では０１〜０．５ｍｍであり、黒色の塗料を
プリントすることによりなされた。Also, as shown in FIG. 3, a light shielding plate (or film) 18.
18' may be provided. Light shielding plate (or film) 18
Gap between and 18' (slit-shaped light exit window) 19
is 01 to 0.5 mm in the example, and was made by printing black paint.

第４図は本発明にかかるＬＥＤアレイを用いた表示装置
の構成図である。収束レンズ２０はＬＥＤアレイチップ
１３の発光部１６とほぼ焦点の位置関係にあるため、発
光ダイオードの光は収束レンズ２０で平行光線となり、
振動ミラー２１に当たる。振動ミラー２１は、点線２ビ
で示されようにＬＥＤアレイチップ１３の発光部位置と
同期して振動（通常５０〜６０Ｈｚ）するため、ＬＥＤ
アレイチップ１３を一方向に走査した情報が二次元の映
像情報や文字情報の形で観察者の目２５に認識される。FIG. 4 is a configuration diagram of a display device using an LED array according to the present invention. Since the converging lens 20 is in a nearly focal position with the light emitting part 16 of the LED array chip 13, the light from the light emitting diode becomes a parallel beam at the converging lens 20,
It hits the vibrating mirror 21. The vibrating mirror 21 vibrates (usually at a frequency of 50 to 60 Hz) in synchronization with the light emitting part position of the LED array chip 13, as shown by the dotted line 2B, so that the LED
Information obtained by scanning the array chip 13 in one direction is recognized by the observer's eyes 25 in the form of two-dimensional video information or character information.

なお、２４はＬＥＤ表示装置の枠体、２２はミラー台、
２３は表示部分の保護板（保護ガラス板）である。In addition, 24 is a frame of the LED display device, 22 is a mirror stand,
23 is a protective plate (protective glass plate) for the display portion.

〈発明の効果〉 以上説明したように本発明は、ＬＥＤアレイチップに接
続するボンディングワイヤーの立上がり角度を４５度以
下にする構成として、ＬＥＤアレイチ、プと駆動用ドラ
イバーＩＣとの配置、及びホールボンディングの第１ホ
ンデイングをＩＣチ。<Effects of the Invention> As explained above, the present invention provides a structure in which the rising angle of the bonding wire connected to the LED array chip is set to 45 degrees or less, and the arrangement of the LED array chip, the driver IC, and the hole bonding. The first Hong Kong is IC Chi.

ブに為し、第２ホンデイングをＬＥＤアレイチ。As a result, the second Honda engine was equipped with an LED array.

プに為すことにより、容易にボンディング条件を設定す
ることか可能となり、にじみかなく安価で高信頼性のあ
るＬＥＤ表示装置を実現できる効果がある。By doing so, it becomes possible to easily set bonding conditions, which has the effect of realizing an inexpensive and highly reliable LED display device that does not bleed.

【図面の簡単な説明】[Brief explanation of drawings]

第１図は本発明のＬＥＤアレイチップと■Ｃチ。 ブとのボンディング接続構成の一実施例を示す断面図、
第２図は同平面図、第３図は本発明の保護板付きのＬＥ
Ｄアレイ例を示す断面図、第４図は本発明のＬＥＤアレ
イを用いた表示装置例を示す構成図、第５図および第６
図は従来例を示す断面図及び要部拡大断面図である。 １２・・・基板、１３・・・ＬＥＤアレイチップ、１４
．１４’　　−−・ド５イバ−ＩＣ，１５゜１５’　　
・・・ボンディングワイヤ 代理人　弁理士　杉　山　毅　至（他１名）第１　図 第２図 第３図 第５図 第６図 ／ 第４ 図Figure 1 shows the LED array chip of the present invention and ■C. A sectional view showing an example of a bonding connection configuration with a
Fig. 2 is a plan view of the same, Fig. 3 is an LE with a protection plate of the present invention.
FIG. 4 is a cross-sectional view showing an example of the D array, FIG. 4 is a configuration diagram showing an example of a display device using the LED array of the present invention, and FIGS.
The figures are a cross-sectional view and an enlarged cross-sectional view of essential parts showing a conventional example. 12... Board, 13... LED array chip, 14
．． 14' --・Do 5 driver IC, 15°15'
...Bonding wire agent Patent attorney Takeshi Sugiyama (and 1 other person) Figure 1 Figure 2 Figure 3 Figure 5 Figure 6/ Figure 4

Claims (1)

【特許請求の範囲】[Claims] １、ＬＥＤアレイチップとワイヤボンディングによって
接続された駆動用ドライバーＩＣ及び表示用光学系を有
するＬＥＤ表示装置において、ＬＥＤアレイチップのボ
ンディング部とＩＣチップのボンディング部の距離が２
，０００μｍ以下となるよう配置してなり、ボールボン
ディングの第一ボンディングをＩＣチップに為し、第２
ボンディングをＬＥＤアレイチップに為すことを特徴と
するＬＥＤ表示装置。1. In an LED display device having a driving driver IC and a display optical system connected to the LED array chip by wire bonding, the distance between the bonding part of the LED array chip and the bonding part of the IC chip is 2.
, 000 μm or less, the first ball bonding is made to the IC chip, and the second
An LED display device characterized in that bonding is performed on an LED array chip.
JP9979189A 1989-04-18 1989-04-18 LED display device Expired - Fee Related JPH0750800B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP9979189A JPH0750800B2 (en) 1989-04-18 1989-04-18 LED display device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP9979189A JPH0750800B2 (en) 1989-04-18 1989-04-18 LED display device

Publications (2)

Publication Number Publication Date
JPH02277274A true JPH02277274A (en) 1990-11-13
JPH0750800B2 JPH0750800B2 (en) 1995-05-31

Family

ID=14256745

Family Applications (1)

Application Number Title Priority Date Filing Date
JP9979189A Expired - Fee Related JPH0750800B2 (en) 1989-04-18 1989-04-18 LED display device

Country Status (1)

Country Link
JP (1) JPH0750800B2 (en)

Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6118848U (en) * 1984-07-06 1986-02-03 三洋電機株式会社 optical print head
JPS61211063A (en) * 1985-03-15 1986-09-19 Kyocera Corp Optical printing head
JPS62242558A (en) * 1986-04-16 1987-10-23 Fuji Xerox Co Ltd Light-emitting diode array unit
JPS63237968A (en) * 1987-03-26 1988-10-04 Nec Corp Light-emitting diode printer head

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6118848U (en) * 1984-07-06 1986-02-03 三洋電機株式会社 optical print head
JPS61211063A (en) * 1985-03-15 1986-09-19 Kyocera Corp Optical printing head
JPS62242558A (en) * 1986-04-16 1987-10-23 Fuji Xerox Co Ltd Light-emitting diode array unit
JPS63237968A (en) * 1987-03-26 1988-10-04 Nec Corp Light-emitting diode printer head

Also Published As

Publication number Publication date
JPH0750800B2 (en) 1995-05-31

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