JPH0750750B2 - Electronic component mounting package - Google Patents
Electronic component mounting packageInfo
- Publication number
- JPH0750750B2 JPH0750750B2 JP60177161A JP17716185A JPH0750750B2 JP H0750750 B2 JPH0750750 B2 JP H0750750B2 JP 60177161 A JP60177161 A JP 60177161A JP 17716185 A JP17716185 A JP 17716185A JP H0750750 B2 JPH0750750 B2 JP H0750750B2
- Authority
- JP
- Japan
- Prior art keywords
- lid
- main body
- package
- electronic component
- component mounting
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/02—Containers; Seals
- H01L23/10—Containers; Seals characterised by the material or arrangement of seals between parts, e.g. between cap and base of the container or between leads and walls of the container
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
- H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
- H01L2224/321—Disposition
- H01L2224/32151—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/32221—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/32245—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/4805—Shape
- H01L2224/4809—Loop shape
- H01L2224/48091—Arched
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
- H01L2224/48247—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
- H01L2224/732—Location after the connecting process
- H01L2224/73251—Location after the connecting process on different surfaces
- H01L2224/73265—Layer and wire connectors
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/161—Cap
- H01L2924/1615—Shape
- H01L2924/16152—Cap comprising a cavity for hosting the device, e.g. U-shaped cap
Landscapes
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Solid State Image Pick-Up Elements (AREA)
- Light Receiving Elements (AREA)
Description
【発明の詳細な説明】 産業上の利用分野 本発明は電子部品搭載用パッケージ、たとえば半導体装
置を搭載するためのパッケージに関するものである。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an electronic component mounting package, for example, a package for mounting a semiconductor device.
従来の技術 情報消去可能型半導体記憶素子を搭載するための合成樹
脂型パッケージでは、通常、本体側に半導体素子を搭載
し得る寸法の空洞を設け、空洞部の底面には半導体記憶
素子を接合するためのダイパッド部とパッケージ外部と
半導体記憶素子との間で電気信号を伝達するためのリー
ド線接続用インナーリード先端部を露出させている。こ
の場合、ダイパッド部とインナーリード先端部の表面に
は、金や銀の薄いメッキ層またはアルミニウムのクラッ
ド層が形成されており、半導体記憶素子が銀ペーストや
鉛−錫半田等でダイパッド部に接合搭載され、半導体記
憶素子の入出力信号端子とインナーリード先端部のメッ
キ部とは金、アルミニウムまたはパラジウムからなる細
線で接続されている。この状態で、熱膨張率が空洞部の
蓋に用いる石英ガラスもしくは合成樹脂と近いアルミナ
ガラスが空洞部にはめ込まれ、空洞部の側壁樹脂面とガ
ラス面とが熱硬化性または光硬化性の特殊な接着剤で接
着される。そして、加熱または光照射によって接着剤が
硬化して、空洞部の気密が得られ、中空型のパッケージ
が得られる。2. Description of the Related Art In a synthetic resin type package for mounting an information erasable semiconductor memory element, a cavity having a size capable of mounting the semiconductor element is usually provided on the main body side, and the semiconductor memory element is bonded to the bottom surface of the cavity. The die pad portion for the purpose and the tip of the inner lead for connecting the lead wire for transmitting an electric signal between the outside of the package and the semiconductor memory element are exposed. In this case, a thin plated layer of gold or silver or a clad layer of aluminum is formed on the surfaces of the die pad portion and the inner lead tip portion, and the semiconductor memory element is bonded to the die pad portion with silver paste or lead-tin solder. The input / output signal terminal of the semiconductor memory element and the plated portion at the tip of the inner lead that are mounted are connected by a thin wire made of gold, aluminum or palladium. In this state, quartz glass or alumina glass whose thermal expansion coefficient is close to that of synthetic resin used for the lid of the cavity is fitted into the cavity, and the side wall resin surface and glass surface of the cavity are a thermosetting or photocurable special material. Are glued together. Then, the adhesive is hardened by heating or light irradiation, the airtightness of the cavity is obtained, and a hollow package is obtained.
発明が解決しようとする課題 このような従来のパッケージにおいては、空洞部の蓋に
石英やアルミナ等の高価なガラス材料を必要とし、また
それらの接着にはパッケージを構成する本体や蓋の構成
材料とは異なる接着剤を用いており、その接着部での熱
膨張係数の差から耐熱サイクル疲労性や耐湿性等の信頼
性に課題があった。また、本体と蓋の側面同士を接着し
ているため、接合面が狭く気密性が低かった。DISCLOSURE OF THE INVENTION Problems to be Solved by the Invention In such a conventional package, an expensive glass material such as quartz or alumina is required for the lid of the hollow portion, and the bonding of these materials makes up the constituent material of the main body and lid of the package. However, due to the difference in the coefficient of thermal expansion at the bonded portion, there was a problem in reliability such as heat cycle fatigue resistance and moisture resistance. Further, since the side surfaces of the main body and the lid are bonded to each other, the joint surface is narrow and the airtightness is low.
課題を解決するための手段 本発明の電子部品搭載用パッケージは、上述の課題を解
決するために、少なくともいずれか一方に凹部を備えた
合成樹脂製の本体および蓋からなり、半導体素子を接続
すべきリードフレームが前記本体または蓋に埋め込まれ
た電子部品用樹脂型パッケージであって、本体と蓋との
接合部分がフランジ型形状を有し、接合部分で接着剤に
より封止したものである。Means for Solving the Problems In order to solve the above-mentioned problems, an electronic component mounting package of the present invention comprises a synthetic resin main body and a lid having a recess in at least one of them, and connects a semiconductor element. A lead frame to be embedded is a resin-type package for electronic parts, which is embedded in the main body or the lid, and a joint portion between the main body and the lid has a flange shape and is sealed with an adhesive at the joint portion.
作用 本発明の電子部品搭載用パッケージにおいては、本体お
よび蓋の接合部分がフランジ型形状としたことで、本体
および蓋が薄型化され、パッケージが軽量化される。本
体および蓋の接合部分がフランジ型形状であることか
ら、その接合面積が広く、また半導体素子を接続すべき
リードフレームを本体または蓋に埋め込んだ構造である
ので、パッケージ内に半導体素子を高い気密性で封止で
きる。本体および蓋が合成樹脂製であるので、そのフラ
ンジ型形状の接合部分を接着するための接着剤を、液状
もしくはプリプレグ状の熱硬化性樹脂を使用することが
でき、耐熱性サイクル疲労性や耐湿性が高められる。Action In the electronic component mounting package of the present invention, the joint portion of the main body and the lid is formed in a flange shape, so that the main body and the lid are thinned and the package is lightened. Since the joint part of the main body and lid is flange-shaped, the joint area is wide, and the lead frame to connect the semiconductor element is embedded in the main body or lid, so the semiconductor element is highly airtight in the package. It can be sealed by nature. Since the main body and lid are made of synthetic resin, liquid or prepreg-shaped thermosetting resin can be used as the adhesive to bond the flange-shaped joints, heat resistance cycle fatigue resistance and moisture resistance. The nature is enhanced.
実施例 以下に本発明の一実施例について、撮像用半導体素子の
ための中空型樹脂パッケージの構造を例にあげて、第１
図および第２図を参照しながら説明する。Example A first example of a hollow resin package for an image pickup semiconductor device according to an example of the present invention will be described below.
A description will be given with reference to the drawings and FIG.
この中空型パッケージは、本体２と蓋３とで構成されて
おり、たとえばポリフェニルサルファーからなる熱可塑
性樹脂（PPS樹脂）またはフェニール系エポキシ樹脂等
の熱硬化性樹脂を成型したものである。This hollow package is composed of a main body 2 and a lid 3, and is formed by molding a thermosetting resin such as a thermoplastic resin (PPS resin) made of polyphenylsulfur or a phenyl epoxy resin.
本体２には、それに埋め込まれたリードフレーム４のイ
ンナーリード５の部分と半導体素子１との間を金属細線
６で接続するための作業ができる寸法の凹部７を設け
る。The main body 2 is provided with a recessed portion 7 having a size capable of performing work for connecting the portion of the inner lead 5 of the lead frame 4 embedded therein and the semiconductor element 1 with the thin metal wire 6.
リードフレーム４は、第２図に示すように、本体２の凹
部７の底面において半導体素子１を搭載するためのダイ
パッド８とインナーリード５の先端部分の表面がそれぞ
れ露出するよう、本体２に埋め込まれて保持されてい
る。ここで使用したリードフレーム４の材質は、鉄−ニ
ッケル合金（42アロイ）やコバール、銅合金である。そ
して、リードフレーム４が凹部７内に露出する部分の表
面には、0.5〜３μｍ程度の厚さの、金や銀のメッキ層
またはアルミニウム箔をクラッドした表面加工層９を形
成する。半導体素子１の入出力端子部である、主として
アルミニウムからなるボンディングパッド10と、リード
フレーム４の表面加工層９とを、アルミニウム、金また
はパラジウムからなる金属細線６を用いて、超音波圧着
法や熱圧着法で電気的に接続する。As shown in FIG. 2, the lead frame 4 is embedded in the body 2 so that the surface of the die pad 8 for mounting the semiconductor element 1 on the bottom surface of the recess 7 of the body 2 and the surfaces of the tip portions of the inner leads 5 are exposed. Is held. The material of the lead frame 4 used here is iron-nickel alloy (42 alloy), Kovar, or copper alloy. Then, on the surface of the portion where the lead frame 4 is exposed in the recess 7, a surface processing layer 9 having a thickness of about 0.5 to 3 μm and clad with a gold or silver plating layer or an aluminum foil is formed. The bonding pad 10 mainly made of aluminum, which is the input / output terminal portion of the semiconductor element 1, and the surface processed layer 9 of the lead frame 4 are bonded by ultrasonic bonding using a thin metal wire 6 made of aluminum, gold or palladium. Make electrical connection by thermocompression bonding.
本体２の凹部７の全周縁部分には、蓋３との接合を目的
とした適当な幅と厚さのフランジ部11を一体に設けられ
ている。一方、蓋３にも、本体２と同様に凹部７とフラ
ンジ部11とを設ける。これらフランジ部11はその接合面
が互いに平行になるように形成されている。本体２と蓋
３とは、液状樹脂またはプリプレグ状樹脂からなる熱硬
化性接着剤12を用いて、それらのフランジ部11で接着す
る。なお、熱硬化性接着剤12は、窒素雰囲気中において
100〜170℃の範囲内の温度で熱することで硬化させた。
接着の際には、フランジ部11に熱硬化性接着剤12の層を
塗布形成し、その接合面を合わせてスプリング作用のあ
るクリップで本体２と蓋３とを挟んで固定して、硬化用
処理炉に入れる。このようにして、中空型パッケージが
気密に封止される。A flange portion 11 having an appropriate width and thickness for the purpose of joining to the lid 3 is integrally provided on the entire peripheral portion of the recess 7 of the main body 2. On the other hand, the lid 3 is also provided with the concave portion 7 and the flange portion 11 similarly to the main body 2. These flange portions 11 are formed such that their joint surfaces are parallel to each other. The main body 2 and the lid 3 are bonded at their flange portions 11 using a thermosetting adhesive 12 made of a liquid resin or a prepreg resin. In addition, the thermosetting adhesive 12 is used in a nitrogen atmosphere.
It was cured by heating at a temperature within the range of 100 to 170 ° C.
At the time of bonding, a layer of thermosetting adhesive 12 is applied and formed on the flange portion 11, and the joint surface is aligned and fixed by sandwiching the main body 2 and the lid 3 with a clip having a spring action, for curing. Put in processing furnace. In this way, the hollow package is hermetically sealed.
蓋３に、上述した可視光透過性の透明樹脂の成型品を使
用すれば、撮像素子用で合成樹脂製の、透明窓をもつ中
空型パッケージとすることができる。By using the above-mentioned molded product of the transparent resin transparent to visible light for the lid 3, it is possible to obtain a hollow package having a transparent window, which is made of a synthetic resin for an image pickup device.
発明の効果 本発明の電子部品搭載用パッケージによれば、本体およ
び蓋が樹脂成型品であるため、その構成部品が安価であ
り、軽量である。そして、本体および蓋の接合部分がそ
れぞれフランジ型形状をしているので、接合面の面積が
広く、そのため気密性が高い。さらに、接合部分を樹脂
接着剤を使用して接着することにより、耐熱性サイクル
疲労性や耐湿性が向上し、高い信頼性が得られる。EFFECTS OF THE INVENTION According to the electronic component mounting package of the present invention, since the main body and the lid are resin molded products, the components are inexpensive and lightweight. Further, since the joint portions of the main body and the lid each have a flange type shape, the joint surface has a large area and therefore the airtightness is high. Further, by adhering the joint portion using a resin adhesive, heat resistance cycle fatigue resistance and moisture resistance are improved, and high reliability is obtained.
第１図は本発明の電子部品搭載用パッケージの一実施例
の斜視図、第２図は第１図のＡ−Ａ線に沿った断面図で
ある。 １……半導体素子、２……本体、３……蓋、４……リー
ドフレーム、５……インナーリード、６……金属細線、
７……凹部、８……ダイパッド、９……表面加工層、10
……ボンディングパッド、11……フランジ部、12……熱
硬化性接着剤FIG. 1 is a perspective view of an embodiment of an electronic component mounting package of the present invention, and FIG. 2 is a sectional view taken along the line AA of FIG. 1 ... Semiconductor element, 2 ... Main body, 3 ... Lid, 4 ... Lead frame, 5 ... Inner lead, 6 ... Metal fine wire,
7: recess, 8: die pad, 9: surface processing layer, 10
...... Bonding pad, 11 …… Flange part, 12 …… Thermosetting adhesive
Claims (4)
成樹脂製の本体および蓋からなり、半導体素子を接続す
べきリードフレームが前記本体または前記蓋に埋め込ま
れた電子部品用樹脂型パッケージであって、前記本体と
前記蓋との接合部分がフランジ型形状を有し、前記接合
部分で接着剤により封止されたことを特徴とする電子部
品搭載用パッケージ。1. A resin-type package for electronic parts, comprising a main body and a lid made of synthetic resin having a recess in at least one of them, and a lead frame to which a semiconductor element is to be connected is embedded in the main body or the lid. An electronic component mounting package, wherein a joint portion between the main body and the lid has a flange shape and is sealed with an adhesive at the joint portion.
が、前記本体と前記蓋との接合面を互いに平行としたこ
とを特徴とする特許請求の範囲第１項記載の電子部品搭
載用パッケージ。2. The electronic component mounting apparatus according to claim 1, wherein a flange shape of a joint portion of the main body and the lid is such that joint surfaces of the main body and the lid are parallel to each other. package.
性または熱硬化性であることを特徴とする特許請求の範
囲第１項または第２項記載の電子部品搭載用パッケー
ジ。3. The electronic component mounting package according to claim 1, wherein the synthetic resin forming the main body and the lid is thermoplastic or thermosetting.
特許請求の範囲第１項、第２項または第３項記載の電子
部品搭載用パッケージ。4. The package for mounting electronic components according to claim 1, 2, or 3, wherein the lid is transparent to visible light.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP60177161A JPH0750750B2 (en) | 1985-08-12 | 1985-08-12 | Electronic component mounting package |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP60177161A JPH0750750B2 (en) | 1985-08-12 | 1985-08-12 | Electronic component mounting package |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS6237948A JPS6237948A (en) | 1987-02-18 |
| JPH0750750B2 true JPH0750750B2 (en) | 1995-05-31 |
Family
ID=16026244
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP60177161A Expired - Lifetime JPH0750750B2 (en) | 1985-08-12 | 1985-08-12 | Electronic component mounting package |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH0750750B2 (en) |
Families Citing this family (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH01146379A (en) * | 1987-12-02 | 1989-06-08 | Nec Corp | Electrostrictive element assembly |
| JPH04234151A (en) * | 1990-12-28 | 1992-08-21 | Mitsubishi Electric Corp | Semiconductor device hollow package |
Family Cites Families (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5584956U (en) * | 1978-12-04 | 1980-06-11 | ||
| JPS59181580A (en) * | 1983-03-31 | 1984-10-16 | Toshiba Corp | Semiconductor device |
-
1985
- 1985-08-12 JP JP60177161A patent/JPH0750750B2/en not_active Expired - Lifetime
Also Published As
| Publication number | Publication date |
|---|---|
| JPS6237948A (en) | 1987-02-18 |
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