JPH0750736Y2 - TFT panel with storage capacitor - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION [Industrial field of application] The present invention forms a plurality of pixel electrodes and a plurality of thin film transistors (TFTs) for selectively driving the pixel electrodes on a substrate and arranges the pixel electrodes. The present invention relates to a TFT panel with a storage capacitor provided with an electrode for a storage capacitor facing the pixel electrode via an insulating film for a storage capacitor below.

[Conventional technology]

A TFT panel used in an active matrix type liquid crystal display device in which a pixel electrode is selectively driven by a thin film transistor has a large number of transparent pixel electrodes and a large number of thin film transistors selectively driving the pixel electrode on a transparent substrate made of glass or the like. The thin film transistors are arranged in an array, and the gate electrode and the drain electrode of each thin film transistor are connected to the gate line and the data line wired between the columns of the pixel electrode, and the source electrode is connected to the pixel electrode.

By the way, recently, in order to improve the display image quality of a liquid crystal display device as the TFT panel, a transparent storage capacitor electrode facing the pixel electrode is provided below the pixel electrode via a transparent storage capacitor insulating film, A storage capacitor is formed between the storage capacitor electrode and the pixel electrode so that the storage capacitor can be operated even when the pixel electrode is not selected (for one frame period until the selected pixel electrode is next selected). TFT with storage capacitor that applies voltage to pixel electrode
A panel is proposed.

Conventionally, as the TFT panel with the storage capacitor, there are known one having a structure shown in FIG. 6 and one having a structure shown in FIG. 7 and FIG.

The TFT panel with a storage capacitor shown in FIG. 6 has a transparent storage capacitor electrode 2 made of ITO over the entire surface of a transparent substrate 1 made of glass or the like.
And a transparent storage capacitor insulating film 3 made of SiN is formed thereon, and a large number of transparent pixel electrodes 4 made of ITO are formed on the storage capacitor insulating film 3.
And a number of thin film transistors 5 that selectively drive the pixel electrodes 4 are formed in an array. The thin film transistors 5 are generally of the inverted stagger type. The inverted stagger type thin film transistor 5 is composed of a gate electrode 6 formed on the storage capacitor insulating film 3 and SiN formed on the gate electrode 6 over the entire surface of the storage capacitor insulating film 3. A transparent gate insulating film 7 and a film formed on the gate insulating film 7.
ia-Si semiconductor layer 8 and n ⁺ -on this ia-Si semiconductor layer 8
It is composed of a source electrode 10 and a drain electrode 11 formed via an a-Si layer 9, and the gate electrode 6 is connected to a gate line (not shown) wired on the storage capacitor insulating film 3. The drain electrode 11 is connected to a data line (not shown) wired on the gate insulating film 7. In addition, the pixel electrode 4 is the gate insulating film 7 described above.
The pixel electrode 4 is connected to the source electrode 10 by forming its one side edge portion on the source electrode 10 of the thin film transistor.
The pixel electrode 4 faces the storage capacitor electrode 2 through the storage capacitor insulating film 3 and the gate insulating film 7, and the storage capacitor is provided between the storage capacitor electrode 2 and the pixel electrode 4. C _S is formed.

Further, in the TFT panel with a storage capacitor shown in FIGS. 7 and 8, the storage capacitor electrode (ITO) 2 provided on the transparent substrate 1 has a portion corresponding to the formation region of the thin film transistor 5 and the gate line 6a. The storage capacitor electrode 2 and the gate electrode 6 and the gate line 6a of the thin film transistor 5 are formed on the transparent substrate 1 and the pattern of the thin film transistor 5 and the gate line 6a is removed. A transparent gate insulating film (SiN film) 7 which doubles as an insulating film for storage capacitors is provided on the entire surface,
An inverted stagger type thin film transistor 5 is formed by forming an ia-Si semiconductor layer 8 and an n ⁺ -a-Si layer 9 and source and drain electrodes 10 and 11 on the gate insulating film 7 so as to face the gate electrode 6. In addition, the transparent pixel electrode 4 is provided on the portion of the gate insulating film 7 to be the storage capacitor insulating film, and the storage capacitor C _S is formed between the pixel electrode 4 and the storage capacitor electrode 2. The pixel electrode 4 is connected to the source electrode 10 of the thin film transistor 5. Reference numeral 11a is a data line connected to the drain electrode 11 of the thin film transistor 5, and the data line 11a is wired on the gate insulating film 7.

Each of the above-mentioned TFT panels with a storage capacitor constitutes a liquid crystal display device by being sandwiched by another transparent substrate (not shown) having a transparent counter electrode facing each pixel electrode 4 and a liquid crystal layer. Therefore, the storage capacitor electrode 2 is connected to the counter electrode.
Then, according to the liquid crystal display device using the TFT panel with the storage capacitor, when the pixel electrode 4 is selectively driven through the thin film transistor 5, the storage capacitor C _S is charged with electric charges, and the pixel electrode 4 is in a non-selected state. Since the voltage is applied from the storage capacitor C _S to the pixel electrode 4 even after the change, the liquid crystal is applied even when the pixel electrode 4 is not selected, that is, during one frame period until the selected pixel electrode 4 is next selected. It is possible to improve the display image quality of the liquid crystal display device by maintaining the state of applying the electric field.

[Problems to be solved by the device]

However, in the conventional TFT panel with a storage capacitor shown in FIG. 6, the storage capacitor electrode 2 provided on the transparent substrate 1 is an “entire electrode” over the entire surface of the substrate. Also faces the gate electrode 6 and the gate line of the storage capacitor via the insulating film 3 for the storage capacitor. Therefore, a capacitor (hereinafter, referred to as a gate capacitance) C is also provided between the gate electrode 6 and the gate line and the electrode 2 for the storage capacitor. _It has a problem that _G is formed. Then, in this way, the thin film transistor 5
When the gate capacitance C _G is formed between the gate electrode 6 and the gate line and the storage capacitor electrode 2, the gate electrode 6 of the thin film transistor 5 via the gate line.
Since the gate voltage applied to the gate electrode escapes to the counter electrode side via the gate capacitance C _G , the effective voltage applied to the gate electrode 6 decreases and the waveform output from the thin film transistor 5 to the pixel electrode 4 becomes dull. The response of the liquid crystal display device deteriorates. Moreover, this storage capacitor TF
In the T panel, the insulating film between the storage capacitor electrode 2 and the pixel electrode 4 is the storage capacitor insulating film 3
Since the storage capacitor C _S cannot have a large capacitance because it is a two-layer thick film including the gate insulating film 7 and the gate insulating film 7, a sufficient time for applying the voltage from the storage capacitor C _S to the pixel electrode 4 is secured. There was also the problem of not being able to do it.

On the other hand, the TFT panel with a storage capacitor shown in FIG. 7 and FIG.
Has a pattern in which a portion corresponding to the formation region of the thin film transistor 5 and the gate line 6a is removed wider than the width of the thin film transistor 5 and the gate line 6a. Therefore, the gate electrode 6 and the gate line 6a of the thin film transistor 5 and the storage capacitor electrode 2 are formed. Although the above-mentioned gate capacitance C _G is not formed between the storage capacitor electrode 2 and the storage capacitor electrode 2, the storage capacitor electrode 2, the gate electrode 6 and the gate line 6a are on the same surface (substrate 1 surface). Therefore, the distance between the storage capacitor electrode 2 and the gate electrode 6 and the gate line 6a
If d ₁ and d ₂ are not sufficiently large, the storage capacitor electrode 2 may short-circuit with the gate electrode 6 and the gate line 6a. This is because the storage capacitor electrode 2 has ITO filmed on the substrate 1.
The film is formed by patterning the film by photo-etching, and the gate electrode 6 and the gate line 6a are also
A conductive metal such as C _r attach film on the substrate 1, because it is formed by a method of patterning the metal film by a photoetching method, etching failure or the like of the ITO film or a metal film, a storage capacitor electrode 2 Or, there may be an error in the shape of the gate electrode 6 and the gate line 6a (especially ITO is difficult to etch,
Also, because the physical properties are unstable, even if the resist mask formed on the ITO film has a high pattern accuracy, the ITO film is not etched according to the resist mask pattern.)
Therefore, the storage capacitor electrode 2
If the distances d ₁ and d ₂ between the gate electrode 6 and the gate electrode 6 and the gate line 6a are small, the storage capacitor electrode 2 and the gate electrode 6 and the gate line 6a may come into contact with each other at their side edges and short-circuit. is there. Therefore, conventionally,
Taken sufficiently large the distance d _1, d _2, but so as to prevent a short circuit between the storage capacitor electrode 2 and the gate electrode 6 and the gate lines 6a, the distance d ₁ in which, d ₂
Therefore, the area of the storage capacitor electrode 2 must be reduced by the amount to secure the storage capacitor C. Therefore, even if the insulating film 7 between the storage capacitor electrode 2 and the pixel electrode 4 is a single thin film, the storage capacitor C _Since the area of _S is small and the capacitance cannot be large, there is a problem that it is not possible to secure a sufficient time for applying the voltage from the storage capacitor C _S to the pixel electrode 4.

The present invention has been made in view of the above situation, and an object thereof is to prevent formation of a gate capacitance between a gate electrode and a gate line of a thin film transistor and an electrode for a storage capacitor. Moreover, the short circuit between the gate electrode and the gate line and the storage capacitor electrode is surely prevented, the area of the storage capacitor electrode is sufficiently increased, and the insulating film between the storage capacitor electrode and the pixel electrode is also formed. A further object is to provide a TFT panel with a storage capacitor that can form a large-capacity storage capacitor between a storage capacitor electrode and a pixel electrode.

[Means for Solving the Problems]

In order to achieve the above object, the present invention forms a plurality of pixel electrodes and a plurality of thin film transistors that selectively drive the pixel electrodes on a substrate, and a storage capacitor insulating film is formed under the pixel electrodes. In a TFT panel with a storage capacitor provided with a storage capacitor electrode facing the pixel electrode, a SOG (spin on glass) film is provided on the entire surface of the substrate, and a gate electrode of the thin film transistor and a gate electrode of the thin film transistor are provided on the SOG film. A gate line and a gate insulating film that covers the gate electrode and the gate line wider than its width are formed, and the semiconductor layer and the source and drain electrodes of the thin film transistor are formed on the gate insulating film, and the SOG film of the SOG film is formed. The surface of the part not covered with the above gate insulating film is used for the diffusion of conductive metal. A storage capacitor electrode for remembering Rishirube conductivity, over the storage capacitor electrode, and forming a pixel electrode through the insulating film for the storage capacitor.

[Action]

In other words, the TFT panel with a storage capacitor of the present invention uses a conductive metal film on the surface of the SOG film provided on the substrate with a gate gate insulating film that covers the gate electrode and gate line formed thereon wider than its width as a mask. The surface of the part of the SOG film that is not covered by the gate insulating film is made into a storage capacitor electrode having conductivity by diffusing a conductive metal, and on the storage capacitor electrode. A pixel electrode is provided via an insulating film for a storage capacitor to form a storage capacitor between the electrode for the storage capacitor and the pixel electrode. According to this TFT panel with a storage capacitor, the surface of the SOG film is formed. The electrode for the storage capacitor formed by metal diffusion in
Since the gate electrode and the gate line are formed only in a portion not covered by the gate insulating film that covers the gate electrode and the gate line wider than the width, a gate capacitance is formed between the gate electrode and the gate line of the thin film transistor and the storage capacitor electrode. There is no such thing. Moreover, according to this TFT panel with the storage capacitor, since the storage capacitor electrode is formed only on the surface of the portion of the SOG film which is not covered with the gate insulating film, the gate insulating film covering the gate electrode and the gate line is formed. If the width is made wider than the width of the gate electrode and the gate line, even if the difference between the width of the gate insulating film and the width of the gate electrode and the gate line is made quite small, the gate electrode and the gate line and the storage capacitor are reduced. A short circuit with the working electrode can be reliably prevented. Further, according to this TFT panel with a storage capacitor, since the difference between the width of the gate insulating film and the width of the gate electrode and the gate line can be reduced as described above, the storage capacitor formed on the surface of the SOG film can be used. The area of the electrode can be made sufficiently large, and the insulating film between the storage capacitor electrode and the pixel electrode is a single layer film of only the storage capacitor insulating film. A large-capacity storage capacitor can be formed in between, and a sufficient time for applying a voltage from the storage capacitor to the pixel electrode can be ensured.

〔Example〕

An embodiment of the present invention will be described below with reference to FIGS.

FIG. 1 shows a cross section of a part of the TFT panel of this embodiment,
FIG. 2 shows the plane. In FIGS. 1 and 2, reference numeral 21 is a transparent substrate made of glass or the like, and a transparent SOG film 22 is formed on the entire surface of the substrate 21 by about 2000.
It has a thickness of Å. Reference numeral 23 is a pixel electrode driving thin film transistor arranged and formed on the SOG film 22.
The thin film transistor 23 is of an inverted stagger type, and the inverted stagger type thin film transistor 23 has a gate electrode 24 formed on the SOG film 22 and a gate insulating film 25 made of SiN formed on the gate electrode 24. And the ia-Si semiconductor layer 26 formed on the gate insulating film 25, and the ia-Si semiconductor layer 26.
The source electrode 28 and the drain electrode 29 are formed on the Si semiconductor layer 26 via the n ⁺ -a-Si layer 27, and the gate electrode 24 is a gate line 24a wired on the SOG film 22. Connected to. In addition, the thin film transistor 2
The gate insulating film 25 of 3 is formed only on the gate electrode 24 and the gate line 24a formed on the SOG film 22 so as to have a width wider than the width thereof, and the ia-Si semiconductor layer 26 and n ⁺ -a-Si layer 27 and source and drain electrodes 28, 29
Is formed in a shape whose outer edge matches the outer edge of the gate insulating film 25.

Then, in a portion of the SOG film 22 formed on the substrate 21 that is not covered with the gate insulating film 25, a conductive metal such as ITO is diffused to a depth of about 100 Å from the surface of the SOG film. The metal diffusion layer on the surface of the SOG film 22 serves as a transparent storage capacitor electrode 22a having conductivity by metal diffusion. In addition, "diffusion" here means SOG
It means that metal molecules enter between the molecules of the film 22.

On the SOG film 22 and the thin film transistor 23, a transparent storage capacitor insulating film 30 made of SiN is formed over the substantially entire surface of the substrate 21 to a thickness of about 3000 Å. On top of
A transparent upper SOG film 31 is formed on the pixel electrode formation area in about 1000
It has a thickness of Å. The surface of the upper SOG film 31 is covered with a conductive metal such as ITO over the entire surface.
The metal diffusion layer on the surface of the upper SOG film 31 is diffused to a depth of about Å, and the transparent pixel electrode 31a is made conductive by metal diffusion, and the pixel electrode 31a and the storage capacitor electrode 22a are formed. A storage capacitor C _S is formed between the storage capacitor C _S and the storage capacitor C _S.

Further, in the portion of the storage capacitor insulating film 30 covering the thin film transistor 23, contact holes 30a and 30b are provided corresponding to the source electrode 28 and the drain electrode 29 of the thin film transistor 23, respectively, and the pixel electrode 31a is The pixel electrode 31a is connected to the source electrode 28 of the thin film transistor by a contact electrode 28a which is formed so as to overlap the edge of the pixel electrode 31a and is in contact with the source electrode 28 in the contact hole 30a. Further, 29a is a data line wired on the storage capacitor insulating film 30, and the data line 29a is connected to the drain electrode 29 of the thin film transistor in the contact hole 30b.

FIG. 3 shows the manufacturing process of the above TFT panel, and this TFT panel is manufactured as follows.

First, as shown in FIG. 3A, a silanol resin is applied to the surface of the transparent substrate 21 by a spin coating method or the like, and the silanol resin is baked so that the entire surface of the substrate 21 has a thickness of about
A 2000 Å SOG film (SiO ₂ film) 22 is formed, and then this SOG film is formed.
After forming a gate electrode 24 and a gate line 24a of the thin film transistor 23 by a method of filming a metal such as Cr on 22 and patterning the metal film, the SOG is formed thereon.
The gate insulating film 2 made of SiN is formed over almost the entire surface of the film 22.
5, the ia-Si semiconductor layer 26, the n ⁺ -a-Si layer, and the metal film 32 of Cr, Ti or the like to be the source and drain electrodes 28 and 29 are sequentially deposited.

Next, as shown in FIG. 3B, the metal film 32 and n ⁺
The -a-Si layer 27 and the ia-Si semiconductor layer 26 are patterned according to the outer shape of the thin film transistor 23 to be formed.

Next, as shown in FIGS. 3 (c) and 4, the gate insulating film 25 is dry-etched using CF ₄ or the like to leave a portion covering the gate electrode 24 and the gate line 24a. Then, the surface of the SOG film 22 is removed until it is completely exposed, and the gate insulating film 25 is patterned into a shape that covers only the gate electrode 24 and the gate line 24a wider than its width. At this time, the gate insulating film
A portion of 25 which covers the terminal portion (not shown) of the gate line 24a is also removed at the same time to expose the terminal portion of the gate line 24a.

After patterning the gate insulating film 25,
While heating the entire substrate 21 to a temperature of about 300 ° C., a conductive metal 33 such as ITO is deposited on the entire upper surface thereof by a sputtering method to a thickness of about 500 Å as shown by a chain line in FIG. 3 (c). Let When the conductive metal 33 is deposited while heating the entire substrate 21 in this way, the molecules of the metal 33 deposited on the exposed portion of the SOG film 22 (the portion not covered with the gate insulating film 25) are thermally diffused. A transparent storage capacitor electrode 22a made of a metal diffusion layer is formed on the surface of the exposed portion of the SOG film 22 between the molecules of the SOG film 22, as shown in FIGS. 3 (c) and 4. In this case, when the diffusion depth of the metal into the SOG film 22 is not sufficient, the conductive metal 33 is deposited and then the substrate 2 is heated to about 300 ° C.
It is sufficient to heat 1 again, and if this heat treatment is performed, S
The metal diffusion depth to the OG film 22 can be further increased to form the storage capacitor electrode 22a having a sufficient layer thickness (about 100Å). Further, after this, the conductive metal 33
The deposited film of is removed. This deposited film can be removed by, for example, HCl: HNO ₃ : H ₂ O = 1: 0.08: 1 for an ITO film with a deposited film thickness of 500Å.
It is sufficient to carry out wet etching using the above etching solution, and if the etching solution temperature is 35 ° C. and etching is carried out for about 2 minutes, the deposited ITO film can be completely removed. The storage capacitor electrode 22a formed by diffusion on the surface of the SOG film 22 is left without being etched.

Next, as shown in FIG. 3 (d), the channel region of the metal film 32 to be the source / drain electrodes 28, 29 is removed by etching together with the n ⁺ -a-Si layer 27 under the channel region. The film 32 is separated into source and drain electrodes 28 and 29, and then a transparent storage capacitor insulating film 30 made of SiN is formed on the entire substrate to a thickness of about 3000 Å, and the transparent film is further formed thereon. The upper SOG film 31 is applied to a thickness of about 1000Å.

Next, as shown in FIG. 3 (e), the entire substrate 21 is heated to 300 ° C.
While heating to about a temperature, 500 Å of a conductive metal 34 such as ITO is deposited on the entire upper surface of the upper SOG film 31 as shown by a chain line in the figure.
Deposit to a thickness of about. When the conductive metal 34 is deposited on the upper SOG film 31 while heating the entire substrate 21 in this manner, the conductive metal 34 is thermally diffused in the upper SOG film 31, and the entire surface of the upper SOG film 31 is A transparent metal diffusion layer (pixel electrode) 31a having conductivity is formed. In this case, too,
When the diffusion depth of the metal into the upper SOG film 31 is not sufficient, the substrate 21 may be heated again.

Thereafter, as shown in FIG. 3 (f), the upper SOG film 31 is removed by dry etching using CF ₄ or the like except for the pixel electrode forming portion, and the surface of the remaining upper SOG film 31 is removed. The metal diffusion layer is used as the transparent pixel electrode 31a, and the thin film transistor 23 of the storage capacitor insulating film 30 is used.
In the portion covering the contact holes 30 corresponding to the source electrode 28 and the drain electrode 29 of the thin film transistor 23, respectively.
Form a, 30b.

After that, a metal such as Al is applied as a film and the metal film is patterned to form a contact electrode 28a connecting the pixel electrode 31a and the source electrode 28 of the thin film transistor 23, and a data line 29a connected to the drain electrode 29 of the thin film transistor. Are formed to complete the TFT panel shown in FIGS. 1 and 2.

That is, the TFT with the storage capacitor of the above embodiment
In the panel, the conductive metal is diffused on the surface of the SOG film 22 provided on the transparent substrate 21 with the gate insulating film 25 covering the gate electrode 24 and the gate line 24a formed thereon wider than its width as a mask. Thus, the surface of the portion of the SOG film 22 which is not covered with the gate insulating film 25 is used as the storage capacitor electrode 22a having conductivity by diffusion of a conductive metal, and on the storage capacitor electrode 22a. A pixel electrode 31a formed by diffusing a conductive metal is provided in the upper SOG film 31 via the storage capacitor insulating film 30, and the storage capacitor C _S is provided between the storage capacitor electrode 22a and the pixel electrode 31a. It was formed.

Therefore, according to this TFT panel with a storage capacitor, the storage capacitor electrode 22a formed by metal diffusion on the surface of the SOG film 22 has the width of the gate electrode 24 and the gate line 24a as shown in FIG. The gate electrode of the thin film transistor 23 is formed only in a portion not covered by the gate insulating film 25 that covers more widely than
No gate capacitance is formed between 24 and the gate line 24a and the storage capacitor electrode 22a. Moreover, in this TFT panel with storage capacitor,
Since the storage capacitor electrode 22a is formed only on the surface of the portion of the SOG film 22 which is not covered with the gate insulating film 25, the width of the gate insulating film 25 covering the gate electrode 24 and the gate line 24a is set to the width of the gate electrode 24a. And gate line 24a
The width of the gate insulating film 25 and the width of the gate electrode 24 and the gate line 24a can be made considerably smaller than the width of the gate electrode 24 and the gate line 24a.
It is possible to reliably prevent a short circuit between a and the storage capacitor electrode 22a. Further, according to the TFT panel with the storage capacitor, as described above, the gate insulating film 25
Since the difference between the width of the SOG film 22 and the width of the gate electrode 24 and the gate line 24a can be made small, the area of the storage capacitor electrode 22a formed on the surface of the SOG film 22 can be made sufficiently large, and the storage capacitor Since the insulating film between the storage electrode 22a and the pixel electrode 31a is a single-layer film including only the storage capacitor insulating film 30, a large-capacity storage capacitor C _S is provided between the storage capacitor electrode 22a and the pixel electrode 31a. After being formed, it is possible to secure a sufficient time for applying the voltage from the storage capacitor C _S to the pixel electrode 31a.

Further, in the TFT panel with the storage capacitor of the above-mentioned embodiment, the pixel electrode 31a is formed by diffusing the conductive metal in the upper SOG film 31 formed on the insulating film 30 for the storage capacitor. Even if there is a defect such as a pinhole in the insulating film 30 for pixel, the pixel electrode 31a
Is the storage capacitor electrode 22a in the defective portion.
There is no short circuit with. That is, when an ITO film is directly formed on the storage capacitor insulating film 30 to form a pixel electrode, if there is a defect such as a pinhole in the storage capacitor insulating film 30, ITO will enter into this defective portion to cause storage. There is a risk of short-circuiting with the capacitor electrode 22a, but as in the above embodiment, the storage capacitor insulating film
When the upper SOG film 31 is formed on the upper SOG film 30 and a conductive metal is diffused in the upper SOG film 31 to form the pixel electrode 31a, the upper SOG film 31 is deposited on the storage capacitor insulating film 30. Since defects a such as pinholes in the storage capacitor insulating film 30 are filled with SOG as shown in FIG. 5, a pixel electrode 31a formed by diffusing a conductive metal on the surface of the upper SOG film 31 and the storage are formed. A short circuit with the capacitor electrode 22a can be reliably prevented.

In the above embodiment, the pixel electrode 31a is formed by diffusing the conductive metal in the upper SOG film 31, but if the storage capacitor insulating film 30 has no defects such as pinholes,
A pixel electrode made of ITO or the like may be formed directly on the storage capacitor insulating film 30. In the above embodiment,
Although the thin film transistor 23 is of the inverse stagger type, this thin film transistor may be of the inverse coplanar type.

[Effect of device]

The TFT panel with a storage capacitor of the present invention has an SOG film over the entire surface of a substrate, and the gate electrode and gate line of a thin film transistor and the gate electrode and gate line are covered with a wider width than the SOG film. A gate insulating film is formed, a semiconductor layer of the thin film transistor and a source / drain electrode are formed on the gate insulating film, and a surface of a portion of the SOG film which is not covered with the gate insulating film is formed of a conductive metal. The storage capacitor electrode is made conductive by diffusion of the storage capacitor, and the pixel electrode is formed on the storage capacitor electrode via the insulating film for the storage capacitor. A gate capacitance may be formed between the capacitor electrode In addition, the short circuit between the gate electrode and the gate line and the storage capacitor electrode is surely prevented, the area of the storage capacitor electrode is sufficiently increased, and the insulating film between the storage capacitor electrode and the pixel electrode is formed. As one layer, a large-capacity storage capacitor can be formed between the storage capacitor electrode and the pixel electrode.

[Brief description of drawings]

1 to 5 show an embodiment of the present invention. FIGS. 1 and 2 are a sectional view and a plan view of a part of a TFT panel with a storage capacitor, and FIG. 3 is a TFT with a storage capacitor. Panel manufacturing process diagram, Fig. 4 is the third
FIG. 5 (c) is a plan view, and FIG. 5 is an enlarged view of part A in FIG. 3 (f). Figure 6 shows a conventional storage capacitor
FIG. 7 is a sectional view of a part of a TFT panel, and FIGS. 7 and 8 are sectional views and plan views of a part of another conventional TFT panel with a storage capacitor. 21 ... Substrate, 22 ... SOG film, 22a ... Storage capacitor electrode (metal diffusion layer), 23 ... Thin film transistor, 24
...... Gate electrode, 24a …… Gate line, 25 …… Gate insulating film, 26 …… ia-Si semiconductor layer, 27 …… n ⁺ ‐a-Si layer, 28
...... Source electrode, 28a …… Contact electrode, 29 …… Drain electrode, 29a …… Data line, 30 …… Storage capacitor insulating film, 31 …… Upper SOG film, 31a …… Pixel electrode (metal diffusion layer).

Claims (1)

[Scope of utility model registration request] 1. A plurality of pixel electrodes and a plurality of thin film transistors that selectively drive the pixel electrodes are arranged on a substrate, and the pixel electrodes face the pixel electrodes under the pixel electrodes with a storage capacitor insulating film interposed therebetween. TFT with storage capacitor provided with electrodes for storage capacitors
In the panel, SOG over the entire surface of the substrate
A (spin-on-glass) film is provided, and a gate electrode and a gate line of the thin film transistor and a gate insulating film that covers the gate electrode and the gate line wider than the width thereof are formed on the SOG film. An electrode for a storage capacitor in which a semiconductor layer and a source / drain electrode of the thin film transistor are formed thereon, and the surface of a portion of the SOG film which is not covered with the gate insulating film is made conductive by diffusion of a conductive metal. A TFT panel with a storage capacitor, wherein a pixel electrode is formed on the storage capacitor electrode via an insulating film for the storage capacitor.