JPH0748630B2 - Transversal type automatic equalizer - Google Patents
Transversal type automatic equalizerInfo
- Publication number
- JPH0748630B2 JPH0748630B2 JP62169789A JP16978987A JPH0748630B2 JP H0748630 B2 JPH0748630 B2 JP H0748630B2 JP 62169789 A JP62169789 A JP 62169789A JP 16978987 A JP16978987 A JP 16978987A JP H0748630 B2 JPH0748630 B2 JP H0748630B2
- Authority
- JP
- Japan
- Prior art keywords
- tap
- automatic equalizer
- tap coefficients
- type automatic
- transversal type
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
Links
Landscapes
- Filters That Use Time-Delay Elements (AREA)
- Cable Transmission Systems, Equalization Of Radio And Reduction Of Echo (AREA)
Description
【発明の詳細な説明】 〔産業上の利用分野〕 本発明はデータモデムなどで一般的に使用されるトラン
スバーサル型自動等化器に関する。The present invention relates to a transversal type automatic equalizer generally used in data modems and the like.
従来,この種のトランスバーサル型自動等化器はNタッ
プのFIR(finite impulse response)フィルタと該フィ
ルタのN個のタップ係数を制御する制御手段より構成さ
れ,これを有するモデムなどの装置が遭遇するであろう
と思われる最悪の回線,即ち伝送路のインパルス応答が
最長である回線に対処するに充分なタップ長を有してい
て,そのタップ長は装置に固有かつ不変であった。従っ
て,モデムの装置内遅延はこの自動等化器のタップ長に
よってほぼ決定されていた。Conventionally, this type of transversal type automatic equalizer is composed of an N-tap FIR (finite impulse response) filter and a control means for controlling N tap coefficients of the filter, and a device such as a modem encounters this. It had a tap length sufficient to cope with the worst possible line that would be expected, that is, the line with the longest impulse response in the transmission line, which tap length was device-specific and invariant. Therefore, the delay in the modem device was almost determined by the tap length of this automatic equalizer.
従って,上述した従来の自動等化器は設計目標とした最
悪の回線によって装置内遅延が決定されている為,場合
によっては大半を占めるとも思われるインバルス応答が
比較的短かい回線に適用する場合も,装置内遅延が長く
なってしまい本装置を含むシステムのスループットを低
下させてしまうなど,総合的に考えると最適の特性を発
揮しているとは言い難いという欠点がある。Therefore, in the above-mentioned conventional automatic equalizer, the intra-device delay is determined by the worst line as the design target. However, there is a drawback in that it is hard to say that the optimum characteristics are exhibited from a comprehensive viewpoint, such as the delay in the device becomes longer and the throughput of the system including this device is reduced.
本発明の目的は,上述のような欠点を除去し,上述した
装置内の遅延を減少せしめ,上記システムのスループッ
トを向上できるトランスバーサル型自動等化器を提供す
るものである。An object of the present invention is to provide a transversal type automatic equalizer capable of eliminating the above-mentioned drawbacks, reducing the delay in the above-mentioned apparatus, and improving the throughput of the above-mentioned system.
本発明によれば,NタップのFIRフィルタと該FIRフィルタ
のN個のタップ係数を制御する制御手段とを含むトラン
スバーサル型自動等化器において,前記制御手段は,前
記N個のタップ係数に前記FIRフィルタの入力に近い方
から順に0,1,2,…,N−1と番号付けを行なったとき,0番
目乃至L番目(L<N)のタップ係数の絶対値がすべて
予め定められた値より小さい場合に,L+1番目乃至N−
1番目のタップ係数を0番目乃至N−L−2番目のタッ
プ係数として各々シフトし,残りのN−L−1番目乃至
N−1番目のタップ係数をすべて零にする手段を含むこ
とを特徴とするトランスバーサル型自動等化器が得られ
る。According to the present invention, in a transversal type automatic equalizer including an N-tap FIR filter and a control means for controlling N tap coefficients of the FIR filter, the control means has the N tap coefficients. When the numbers are numbered 0, 1, 2, ..., N-1 in order from the one closest to the input of the FIR filter, the absolute values of the 0th to Lth tap coefficients (L <N) are all predetermined. L + 1 to N-
A means for shifting the first tap coefficient as the 0th to NL-2nd tap coefficients, respectively, and setting all the remaining NL-1th to N-1th tap coefficients to zero. A transversal type automatic equalizer is obtained.
次に本発明について図面を参照して説明する。 Next, the present invention will be described with reference to the drawings.
第1図は本発明の自動等化器の一実施例の構成図であ
る。入力信号はT秒遅延を生ずる遅延器101に入力され
る。遅延器101の出力D0はタップ係数発生器102-0の出力
であるタップ係数C0と乗算器103によって掛け合わさ
れ,累算器104に入力される。同様に遅延器出力D1〜D19
もタップ係数C1〜C19と掛け合わされ累算器104に入力さ
れる。累算器104はこれらの入力をすべて加算し出力す
る。タップ係数発生器102-0〜102-19の出力であるタッ
プ係数は制御部106によって,回線特性を最適に等化す
べく調節される。この調節のアルゴリズムは特に述べな
いが周知のグラデュエント法等を採用すればよい。FIG. 1 is a block diagram of an embodiment of the automatic equalizer of the present invention. The input signal is input to the delay device 101 which produces a T second delay. The output D 0 of the delay device 101 is multiplied by the tap coefficient C 0 which is the output of the tap coefficient generator 102-0 by the multiplier 103 and input to the accumulator 104. Similarly, delay device outputs D 1 to D 19
Is also multiplied by tap coefficients C 1 to C 19 and input to the accumulator 104. The accumulator 104 adds all these inputs and outputs it. The tap coefficient output from the tap coefficient generators 102-0 to 102-19 is adjusted by the control unit 106 to optimally equalize the line characteristics. The algorithm for this adjustment is not particularly described, but a well-known gradient method or the like may be adopted.
一方,タップ係数発生器102-0の出力であるタップ係数
は絶対値変換器105-0〜105-19により絶対値に変換され
て制御部106に入力される。On the other hand, the tap coefficient output from the tap coefficient generator 102-0 is converted into an absolute value by the absolute value converters 105-0 to 105-19 and input to the control unit 106.
タップ係数C0〜C20の値をグラフにより表現すると第2
図の様になる。第2図(a)は回線特性が比較的劣悪な
場合のタップ係数であり,C0〜C19まですべてのタップ
係数が有意な値を持っている。If the values of the tap coefficients C 0 to C 20 are expressed by a graph,
It becomes like the figure. Figure 2 (a) is a tap coefficient when the line characteristics are relatively poor, all the tap coefficients to C 0 -C 19 has a significant value.
第2図(b)は回線特性が比較的優良な場合のタップ係
数であり,C0〜C8までの9個のタップ係数はその絶対値
が0.01以下と非常に小さいため,殆んど無意味である。Fig. 2 (b) shows the tap coefficients when the line characteristics are relatively excellent, and the nine tap coefficients C 0 to C 8 have very small absolute values of 0.01 or less, so there are almost no tap coefficients. Is the meaning.
ところで,この様な場合,自動等化器に信号が入力され
てから出力されるまでの遅延は,C0から最も大きな値を
とるC12までの時間,即ち13×T(秒)である。By the way, in such a case, the delay from the input of the signal to the automatic equalizer to the output thereof is the time from C 0 to C 12 having the largest value, that is, 13 × T (seconds).
第2図(b)の様なタップ係数の場合はC0〜C8までは無
意味なので,これを第2図(c)の様にタップ係数をシ
フトして,C0〜C10のタップ係数を第2図(b)のC9〜C
19のタップ係数と各々等しくし,C11〜C19には零を設定
する。すると,第2図(c)のタップ係数列は第2図
(b)と同じ形状であるから,その信号に対する応答は
不変であるが,第2図(c)では最も大きな値をもつタ
ップ係数がC3であるので,本自動等化器内の遅延は4×
T(秒)となる。In the case of the tap coefficient as shown in FIG. 2 (b), since C 0 to C 8 are meaningless, the tap coefficient is shifted as shown in FIG. 2 (c) and the taps of C 0 to C 10 are made. The coefficient is C 9 to C in Fig. 2 (b).
Each equal to the tap coefficients of the 19, the C 11 -C 19 sets zero. Then, since the tap coefficient sequence in FIG. 2 (c) has the same shape as that in FIG. 2 (b), the response to the signal is unchanged, but in FIG. 2 (c), the tap coefficient having the largest value is obtained. Is C 3 , so the delay in this automatic equalizer is 4 ×
It becomes T (second).
即ち,第2図(c)のタップ係数をもつ自動等化器は,
第2図(b)のそれに比べて,同様の特性を保ちつつ,
遅延を9×T(秒)短縮している。That is, the automatic equalizer having the tap coefficient shown in FIG.
Compared to that of Fig. 2 (b), while maintaining the same characteristics,
The delay is reduced by 9 × T (seconds).
上記の制御は、制御部106にて行われる。このような制
御は、一般的には、NタップのFIRフィルタと該FIRフィ
ルタのN個のタップ係数を制御する制御部(106)とを
含むトランスバーサル型自動等化器において、前記N個
のタップ係数に前記FIRフィルタの入力に近い方から順
に0,1,2,…,N−1と番号付けを行なったとき、0番目乃
至L番目(L<N)のタップ係数の絶対値がすべて予め
定められた値εより小さい場合に、L+1番目乃至N−
1番目のタップ係数を0番目乃至N−L−2番目のタッ
プ係数として各々シフトし、残りのN−L−1番目乃至
N−1番目のタップ係数をすべて零にする手段を、前記
制御部が含むことによって達成される。The above control is performed by the control unit 106. Such control is generally performed in a transversal type automatic equalizer including an N-tap FIR filter and a control unit (106) for controlling N tap coefficients of the FIR filter. When the tap coefficients are numbered as 0, 1, 2, ..., N-1 in order from the one closest to the input of the FIR filter, the absolute values of the 0th to Lth (L <N) tap coefficients are all If it is smaller than a predetermined value ε, L + 1 to N−
The control unit is configured to shift the 1st tap coefficient as 0th to NL-2nd tap coefficients, respectively, and set all remaining NL-1th to N-1th tap coefficients to zero. Is achieved by including.
以上の一連の制御動作を達成するための制御部106の動
作手順を第3図のフローチャートに示す。The operation procedure of the control unit 106 for achieving the above series of control operations is shown in the flowchart of FIG.
P01〜P10は合計11個のプロセスを表わす。P01〜P03はC0
から何番目までのタップ係数がε(=0.01)より小であ
るかを計数するプロセスである。P04〜P07は,前述のプ
ロセスの結果に基づきタップ係数をシフトするプロセ
ス,P08〜P10は残りのタップ係数に零を設定するプロセ
スである。P01 to P10 represent a total of 11 processes. P01-P03 is C 0
It is a process of counting the tap coefficient up to which is smaller than ε (= 0.01). P04 to P07 are processes for shifting tap coefficients based on the results of the above-mentioned process, and P08 to P10 are processes for setting the remaining tap coefficients to zero.
以上,20タップの自動等化器に本発明を実施した例につ
いて説明したが,他の構成の自動等化器,例えば複素自
動等化器やダブルサンプリング型自動等化器にも応用で
きることは自明である。The example in which the present invention is applied to the 20-tap automatic equalizer has been described above, but it is obvious that the present invention can be applied to automatic equalizers having other configurations, such as a complex automatic equalizer and a double sampling type automatic equalizer. Is.
以上説明したように,本発明は回線特性が優良な場合は
自動等化器のタップ係数を前方にシフトする事により,
この自動等化器を有する装置内の遅延を減少せしめ,こ
の装置を含むシステムのスループット向上に貢献できる
という効果がある。As described above, the present invention shifts the tap coefficient of the automatic equalizer forward when the line characteristic is excellent,
This has the effect of reducing the delay in the device having this automatic equalizer and contributing to improving the throughput of the system including this device.
第1図は本発明の一実施例の構成図,第2図はタップ係
数の一例の概略図,第3図は本発明による制御手順のフ
ローチャートである。 101…遅延器,102-0〜102-19…タップ係数発生器,103-0
〜103-19…乗算器,104…累算器,105-0〜105-19…絶対値
変換器,106…制御部FIG. 1 is a configuration diagram of an embodiment of the present invention, FIG. 2 is a schematic diagram of an example of a tap coefficient, and FIG. 3 is a flowchart of a control procedure according to the present invention. 101 ... Delay device, 102-0 to 102-19 ... Tap coefficient generator, 103-0
~ 103-19 ... Multiplier, 104 ... Accumulator, 105-0 to 105-19 ... Absolute value converter, 106 ... Control unit
Claims (1)
N個のタップ係数を制御する制御手段とを含むトランス
バーサル型自動等化器において、前記制御手段は、前記
N個のタップ係数に前記FIRフィルタの入力に近い方か
ら順に0,1,2,…,N−1と番号付けを行なったとき、0番
目乃至L番目(L<N)のタップ係数の絶対値がすべて
予め定められた値より小さい場合に、L+1番目乃至N
−1番目のタップ係数を0番目乃至N−L−2番目のタ
ップ係数として各々シフトし、残りのN−L−1番目乃
至N−1番目のタップ係数をすべて零にする手段を含む
ことを特徴とするトランスバーサル型自動等化器。1. A transversal type automatic equalizer including an N-tap FIR filter and a control means for controlling N tap coefficients of the FIR filter, wherein the control means includes the N tap coefficients for the N tap coefficients. When numbering 0, 1, 2, ..., N-1 in order from the closest to the input of the FIR filter, the absolute values of the 0th to Lth (L <N) tap coefficients are all predetermined. If smaller than the value, L + 1 to N
A means for shifting the -1st tap coefficient as the 0th to NL-2nd tap coefficients and setting the remaining NL-1th to N-1th tap coefficients to zero. Characteristic transversal type automatic equalizer.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP62169789A JPH0748630B2 (en) | 1987-07-09 | 1987-07-09 | Transversal type automatic equalizer |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP62169789A JPH0748630B2 (en) | 1987-07-09 | 1987-07-09 | Transversal type automatic equalizer |
Publications (2)
Publication Number | Publication Date |
---|---|
JPS6416009A JPS6416009A (en) | 1989-01-19 |
JPH0748630B2 true JPH0748630B2 (en) | 1995-05-24 |
Family
ID=15892909
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP62169789A Expired - Lifetime JPH0748630B2 (en) | 1987-07-09 | 1987-07-09 | Transversal type automatic equalizer |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPH0748630B2 (en) |
Families Citing this family (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH0490614A (en) * | 1990-08-03 | 1992-03-24 | Nippon Telegr & Teleph Corp <Ntt> | Equalizer |
Family Cites Families (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS57152719A (en) * | 1981-03-17 | 1982-09-21 | Toshiba Corp | Automatic equalizer |
-
1987
- 1987-07-09 JP JP62169789A patent/JPH0748630B2/en not_active Expired - Lifetime
Also Published As
Publication number | Publication date |
---|---|
JPS6416009A (en) | 1989-01-19 |
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