JPH0746669B2 - Thin film capacitor - Google Patents

Thin film capacitor

Info

Publication number
JPH0746669B2
JPH0746669B2 JP3139506A JP13950691A JPH0746669B2 JP H0746669 B2 JPH0746669 B2 JP H0746669B2 JP 3139506 A JP3139506 A JP 3139506A JP 13950691 A JP13950691 A JP 13950691A JP H0746669 B2 JPH0746669 B2 JP H0746669B2
Authority
JP
Japan
Prior art keywords
thin film
dielectric
film capacitor
upper electrode
electrode
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
JP3139506A
Other languages
Japanese (ja)
Other versions
JPH04338619A (en
Inventor
敏幸 佐久間
新太郎 山道
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp filed Critical NEC Corp
Priority to JP3139506A priority Critical patent/JPH0746669B2/en
Priority to US07/882,000 priority patent/US5262920A/en
Priority to DE69205063T priority patent/DE69205063T2/en
Priority to EP92304302A priority patent/EP0514149B1/en
Publication of JPH04338619A publication Critical patent/JPH04338619A/en
Publication of JPH0746669B2 publication Critical patent/JPH0746669B2/en
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

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Description

【発明の詳細な説明】Detailed Description of the Invention

【0001】[0001]

【産業上の利用分野】本発明は基板上に順に形成された
下部電極、誘電体、上部電極からなる薄膜キャパシタの
構造に関し、特に下部および上部電極の少なくとも1つ
が複数の層からなる導電層からなり、かつ複数の導電層
のうち少なくとも誘電体と接する一導電層が導電性金属
酸化膜からなる構造を有する薄膜キャパシタに関する。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a structure of a thin film capacitor comprising a lower electrode, a dielectric and an upper electrode which are sequentially formed on a substrate, and more particularly, at least one of the lower electrode and the upper electrode comprises a conductive layer composed of a plurality of layers. And a thin film capacitor having a structure in which at least one conductive layer in contact with a dielectric among a plurality of conductive layers is made of a conductive metal oxide film.

【0002】[0002]

【従来の技術】従来、この種の薄膜キャパシタは、シリ
コン電極上に直接にスパッタ法により誘電体膜、上部電
極を順に形成した構造(特願平1−217918号)、
またはシリコン電極上にTa、Tiなどの少なくとも1
種類の高融点金属からなる第1層およびPt,Pdの少
なくとも1種類の材料からなる第2層とから構成される
導電層上に誘電体膜、上部電極を順に形成した構造(特
願平1−238484号)となっていた。また、例えば
1969年のアイ・ビ−・エム・ジャ―ナル・オブ・リ
サ―チ・アンド・ディベロップメント、第68巻、68
6〜695ペ―ジ( IBM Journal of Research andDeve
lopment ,68(1969)、p.686〜695)に記
載されているように、サファイア等の絶縁基板上に下部
電極としてPtまたはPdを堆積し、誘電体膜、上部電
極を順に形成した構造がすでに知られている。
2. Description of the Related Art Conventionally, a thin film capacitor of this type has a structure in which a dielectric film and an upper electrode are sequentially formed on a silicon electrode by a sputtering method (Japanese Patent Application No. 1-217918).
Or at least one of Ta, Ti, etc. on the silicon electrode
A structure in which a dielectric film and an upper electrode are sequentially formed on a conductive layer composed of a first layer made of a kind of refractory metal and a second layer made of at least one kind of material of Pt and Pd (Patent application 1 -238484). Also, for example, 1969 I Bem Journal of Research and Development, Volume 68, 68.
Pages 6-695 (IBM Journal of Research and Dev
lopment, 68 (1969), p.686-695), a structure in which Pt or Pd is deposited as a lower electrode on an insulating substrate such as sapphire, and a dielectric film and an upper electrode are formed in this order. Already known.

【0003】[0003]

【発明が解決しようとする課題】上述した従来の構造の
薄膜キャパシタのうち、シリコン電極上に直接にスパッ
タ法により誘電体を形成した場合には、シリコン電極表
面が誘電体を形成する時に酸化され、誘電率の高い誘電
体を形成してもシリコン電極と誘電体との界面に存在す
る低誘電率の二酸化シリコンのために薄膜キャパシタ全
体の容量を大きくすることが制限されるという欠点があ
るものの、二酸化シリコン層の存在によりリ―ク電流が
あまり大きくならずに済むといった利点がある。また、
前述のシリコン電極に第1および第2の材料からなる導
電層を形成し、その上に誘電体、上部電極を順に形成し
た構造の場合には、適切な熱処理を行うことにより低誘
電率層の形成を防止しながら薄膜キャパシタ全体の容量
を大きくすることが可能であるが、誘電体膜中を流れる
リ−ク電流を抑制することはできなくなり、特に誘電体
膜の膜厚が50nm以下のような薄膜にした場合にはキ
ャリアのトンネリングが生じてリ−ク電流量が増大する
という欠点がある。本発明は、このような従来の問題点
を解決するためになされたもので、大容量で、かつリ−
ク電流の少ない薄膜キャパシタを提供することを目的と
する。
In the thin film capacitor having the conventional structure described above, when the dielectric is directly formed on the silicon electrode by the sputtering method, the surface of the silicon electrode is oxidized when the dielectric is formed. However, even if a dielectric having a high dielectric constant is formed, there is a drawback in that the capacitance of the whole thin film capacitor is limited due to the low dielectric constant silicon dioxide existing at the interface between the silicon electrode and the dielectric. However, the presence of the silicon dioxide layer has an advantage that the leak current does not become too large. Also,
In the case of a structure in which a conductive layer made of the first and second materials is formed on the silicon electrode, and a dielectric and an upper electrode are sequentially formed on the conductive layer, a suitable heat treatment is performed to form the low dielectric constant layer. Although it is possible to increase the capacitance of the entire thin film capacitor while preventing the formation, it becomes impossible to suppress the leak current flowing in the dielectric film, and especially when the thickness of the dielectric film is 50 nm or less. If such a thin film is used, there is a disadvantage that carrier tunneling occurs and the amount of leak current increases. The present invention has been made in order to solve the above-mentioned conventional problems, and has a large capacity and a read capacity.
It is an object of the present invention to provide a thin film capacitor with a low dc current.

【0004】[0004]

【課題を解決するための手段】本発明は、下部電極と、
誘電体と、上部電極とが順次形成された薄膜キャパシタ
において、下部電極および上部電極の少なくとも一方は
複数の導電層からなり、かつ下部電極および上部電極の
いずれか一方は複数の導電層で、かつ誘電体と接する導
電層が導電性金属酸化膜からなることを特徴とする薄膜
キャパシタ、および、下部電極と、誘電体と、上部電極
とが順次形成された薄膜キャパシタにおいて、下部電極
および上部電極の双方が複数の導電層からなり、かつ誘
電体と接する2つの導電層は導電性金属酸化膜からなる
ことを特徴とする薄膜キャパシタである。
The present invention comprises a lower electrode,
In a thin film capacitor in which a dielectric and an upper electrode are sequentially formed, at least one of the lower electrode and the upper electrode is composed of a plurality of conductive layers, and one of the lower electrode and the upper electrode is a plurality of conductive layers, and In a thin film capacitor characterized in that a conductive layer in contact with the dielectric is made of a conductive metal oxide film, and a thin film capacitor in which a lower electrode, a dielectric and an upper electrode are sequentially formed, a lower electrode and an upper electrode A thin film capacitor characterized in that both are composed of a plurality of conductive layers, and two conductive layers in contact with the dielectric are composed of a conductive metal oxide film.

【0005】[0005]

【作用】本発明の薄膜キャパシタでは、低誘電率層の形
成を防止することにより大容量を実現するとともにリ−
ク電流の少ないキャパシタを形成するために、複数の層
からなる導電層のうち誘電体膜と接する層を導電性金属
膜とすることで、電子または正孔に対してのバリア効果
を利用してリ−ク電流を減少させる構造を有している。
このとき、誘電体膜と接する複数の導電膜からなる一方
の電極の導電層のみが導電性金属酸化膜である場合には
リ−ク電流量に極性が生じるので、リ−ク電流量を小さ
く抑えるには上部および下部電極に印加する電圧の極性
は固定されることになる。一方、誘電体膜と接する複数
の導電層からなる上部および下部電極の両方を導電性金
属酸化膜とすることにより、印加電圧の極性に無関係に
リ−ク電流を減少させることができる。
In the thin film capacitor of the present invention, a large capacitance is realized by preventing the formation of the low dielectric constant layer, and
In order to form a capacitor with a small electric current, by using a conductive metal film as the layer in contact with the dielectric film among the conductive layers consisting of multiple layers, the barrier effect against electrons or holes is utilized. It has a structure that reduces the leak current.
At this time, when only the conductive layer of one electrode composed of a plurality of conductive films in contact with the dielectric film is a conductive metal oxide film, the leak current amount has a polarity, so that the leak current amount is small. To suppress it, the polarities of the voltages applied to the upper and lower electrodes are fixed. On the other hand, the leak current can be reduced regardless of the polarity of the applied voltage by using both the upper and lower electrodes made of a plurality of conductive layers in contact with the dielectric film as conductive metal oxide films.

【0006】[0006]

【実施例】次に、本発明の実施例について図面を参照し
て説明する。 実施例1 図1は、誘電体としてSrTiO3を使用した本発明に
よる薄膜キャパシタの一実施例の縦断面図である。図
中、1はAu膜、2はTi膜、3はSrTiO3、4は
PdO、5はPt、6はTa、7は低抵抗のシリコン基
板である。1および2のAu、Ti膜により上部電極を
構成し、4〜7のPdO,Pt,Ta,シリコン基板に
より下部電極を形成している。作製プロセスは以下のよ
うに公知の薄膜堆積技術を使用した。まず、シリコン基
板7上にTa6,Pt5を順にそれぞれ10〜150n
m、20〜150nmの厚さに直流マグネトロンスパッ
タ法により堆積し、その後、スパッタガスとしてAr/
2の混合ガスを使用してPdO4を反応性直流マグネ
トロンスパッタ法により5〜150nmの厚さに堆積し
て下部電極を形成する。さらに、SrTiO3膜3を高
周波マグネトロンスパッタ法により30〜500nmの
厚さに堆積する。最後に上部電極として、直流マグネト
ロンスパッタ法によりTi2およびAu1をそれぞれ1
0〜150nm,100〜500nmの厚さに堆積して
図1の薄膜キャパシタを作製した。図1に示す構造の薄
膜キャパシタでは、上部電極を正電圧、下部電圧を負電
圧にしたときには、薄膜キャパシタを流れるリ−ク電流
は小さいが、逆の電圧を印加したときにはリ−ク電流は
大きい。
Embodiments of the present invention will now be described with reference to the drawings. Example 1 FIG. 1 is a longitudinal sectional view of an example of a thin film capacitor according to the present invention using SrTiO 3 as a dielectric. In the figure, 1 is an Au film, 2 is a Ti film, 3 is SrTiO 3 , 4 is PdO, 5 is Pt, 6 is Ta, and 7 is a low resistance silicon substrate. The Au and Ti films 1 and 2 constitute an upper electrode, and the PdO, Pt, Ta and silicon substrates 4 to 7 form a lower electrode. The fabrication process used a known thin film deposition technique as follows. First, Ta6 and Pt5 are sequentially formed on the silicon substrate 7 in the order of 10 to 150 n, respectively.
m to a thickness of 20 to 150 nm by a direct current magnetron sputtering method, and then Ar / as a sputtering gas.
The PdO4 using a mixed gas of O 2 is deposited to a thickness of 5~150nm by reactive DC magnetron sputtering to form a lower electrode. Further, the SrTiO 3 film 3 is deposited to a thickness of 30 to 500 nm by the high frequency magnetron sputtering method. Finally, as the upper electrode, 1 each of Ti2 and Au1 was formed by the DC magnetron sputtering method.
The thin film capacitors shown in FIG. 1 were manufactured by depositing the films with a thickness of 0 to 150 nm and 100 to 500 nm. In the thin film capacitor having the structure shown in FIG. 1, when the upper electrode is set to a positive voltage and the lower voltage is set to a negative voltage, the leak current flowing through the thin film capacitor is small, but when the reverse voltage is applied, the leak current is large. .

【0007】実施例2 図2は本発明の別の実施例の縦断面図である。図中、1
1はAu膜、12はTi膜、13および15はPdO、
14はSrTiO3、16はPt、17はTa、18は
低抵抗のシリコン基板である。作製プロセスは図1の薄
膜キャパシタと同様であるが、上部および下部電極のS
rTiO3と接する導電層が5〜150nm厚のPdO
である点が異なる。図2の構造の薄膜キャパシタでは上
部および下部電極に印加される電圧の極性に無関係にリ
−ク電流は小さいということが図1の薄膜キャパシタと
異なる利点である。なお、上記の各実施例では導電性の
金属酸化膜としてPdOを使用したが、この他、導電性
のTaOx,SrTiOx等を使用することもできる。
Embodiment 2 FIG. 2 is a vertical sectional view of another embodiment of the present invention. 1 in the figure
1 is an Au film, 12 is a Ti film, 13 and 15 are PdO,
14 is SrTiO 3 , 16 is Pt, 17 is Ta, and 18 is a low resistance silicon substrate. The manufacturing process is similar to that of the thin film capacitor of FIG.
The conductive layer in contact with rTiO 3 is PdO having a thickness of 5 to 150 nm.
Is different. The thin film capacitor having the structure of FIG. 2 has a small leak current regardless of the polarities of the voltages applied to the upper and lower electrodes, which is an advantage different from the thin film capacitor of FIG. Although PdO is used as the conductive metal oxide film in each of the above-described embodiments, conductive TaO x , SrTiO x, or the like can also be used.

【0008】[0008]

【発明の効果】以上説明したように、本発明によれば、
下部電極および上部電極の一方または両方の誘電体膜と
接する導電体層を導電性金属酸化膜とすることにより、
それぞれ印加電圧の単極性または双極性に対してリ−ク
電流を減少させることができる効果がある。
As described above, according to the present invention,
By using a conductive metal oxide film as the conductor layer in contact with the dielectric film of one or both of the lower electrode and the upper electrode,
There is an effect that the leak current can be reduced depending on whether the applied voltage is unipolar or bipolar.

【図面の簡単な説明】[Brief description of drawings]

【図1】本発明による薄膜キャパシタの一実施例の縦断
面図である。
FIG. 1 is a vertical sectional view of an embodiment of a thin film capacitor according to the present invention.

【図2】本発明による薄膜キャパシタの別の一実施例の
縦断面図である。
FIG. 2 is a vertical sectional view of another embodiment of the thin film capacitor according to the present invention.

【符号の説明】[Explanation of symbols]

1,11 Au 2,12 Ti 3,14 SrTiO3 4,13,15
PdO 5,16 Pt 6,17 Ta 7,18 シリコン基板
1,11 Au 2,12 Ti 3,14 SrTiO 3 4,13,15
PdO 5,16 Pt 6,17 Ta 7,18 Silicon substrate

Claims (2)

【特許請求の範囲】[Claims] 【請求項1】 下部電極と、誘電体と、上部電極とが順
次形成された薄膜キャパシタにおいて、下部電極および
上部電極の少なくとも一方は複数の導電層からなり、か
つ下部電極および上部電極のいずれか一方は複数の導電
層で、かつ誘電体と接する導電層がPdO,TaO
SrTiO から選ばれる少なくとも一つの導電性金属
酸化膜からなることを特徴とする薄膜キャパシタ。
1. In a thin film capacitor in which a lower electrode, a dielectric and an upper electrode are sequentially formed, at least one of the lower electrode and the upper electrode comprises a plurality of conductive layers, and either the lower electrode or the upper electrode. One is a plurality of conductive layers, and the conductive layer in contact with the dielectric is PdO, TaO x ,
A thin film capacitor comprising at least one conductive metal oxide film selected from SrTiO x .
【請求項2】 下部電極と、誘電体と、上部電極とが順
次形成された薄膜キャパシタにおいて、下部電極および
上部電極の双方が複数の導電層からなり、かつ誘電体と
接する2つの導電層はPdO,TaO ,SrTiO
から選ばれる少なくとも一つの導電性金属酸化膜からな
ることを特徴とする薄膜キャパシタ。
2. In a thin film capacitor in which a lower electrode, a dielectric and an upper electrode are sequentially formed, both the lower electrode and the upper electrode are composed of a plurality of conductive layers, and the two conductive layers in contact with the dielectric are PdO, TaO x , SrTiO x
A thin film capacitor comprising at least one conductive metal oxide film selected from the group consisting of:
JP3139506A 1991-05-16 1991-05-16 Thin film capacitor Expired - Lifetime JPH0746669B2 (en)

Priority Applications (4)

Application Number Priority Date Filing Date Title
JP3139506A JPH0746669B2 (en) 1991-05-16 1991-05-16 Thin film capacitor
US07/882,000 US5262920A (en) 1991-05-16 1992-05-13 Thin film capacitor
DE69205063T DE69205063T2 (en) 1991-05-16 1992-05-13 Thin film capacitor.
EP92304302A EP0514149B1 (en) 1991-05-16 1992-05-13 Thin film capacitor

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP3139506A JPH0746669B2 (en) 1991-05-16 1991-05-16 Thin film capacitor

Publications (2)

Publication Number Publication Date
JPH04338619A JPH04338619A (en) 1992-11-25
JPH0746669B2 true JPH0746669B2 (en) 1995-05-17

Family

ID=15246881

Family Applications (1)

Application Number Title Priority Date Filing Date
JP3139506A Expired - Lifetime JPH0746669B2 (en) 1991-05-16 1991-05-16 Thin film capacitor

Country Status (1)

Country Link
JP (1) JPH0746669B2 (en)

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5348894A (en) * 1993-01-27 1994-09-20 Texas Instruments Incorporated Method of forming electrical connections to high dielectric constant materials
JP3159561B2 (en) * 1993-03-29 2001-04-23 ローム株式会社 Electrodes for crystalline thin films

Family Cites Families (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS62266814A (en) * 1986-05-14 1987-11-19 日本電気株式会社 Thin film capacitor
JPH0338008A (en) * 1989-07-05 1991-02-19 Mitsui Petrochem Ind Ltd Thin-film capacitor and manufacture thereof

Also Published As

Publication number Publication date
JPH04338619A (en) 1992-11-25

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