JPH0746068Y2 - Pulse width modulation power supply frequency synchronization circuit - Google Patents

Pulse width modulation power supply frequency synchronization circuit

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Publication number
JPH0746068Y2
JPH0746068Y2 JP11816586U JP11816586U JPH0746068Y2 JP H0746068 Y2 JPH0746068 Y2 JP H0746068Y2 JP 11816586 U JP11816586 U JP 11816586U JP 11816586 U JP11816586 U JP 11816586U JP H0746068 Y2 JPH0746068 Y2 JP H0746068Y2
Authority
JP
Japan
Prior art keywords
oscillator
resistor
pulse width
width modulation
capacitor
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
JP11816586U
Other languages
Japanese (ja)
Other versions
JPS6324989U (en
Inventor
猛博 小西
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Japan Radio Co Ltd
Original Assignee
Japan Radio Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Japan Radio Co Ltd filed Critical Japan Radio Co Ltd
Priority to JP11816586U priority Critical patent/JPH0746068Y2/en
Publication of JPS6324989U publication Critical patent/JPS6324989U/ja
Application granted granted Critical
Publication of JPH0746068Y2 publication Critical patent/JPH0746068Y2/en
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

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  • Synchronizing For Television (AREA)
  • Dc-Dc Converters (AREA)

Description

【考案の詳細な説明】 (産業上の利用分野) 本考案は、定電圧電源用スイッチング電源の周波数を,
他の回路の周波数に自動的に同期させる回路に関する。
[Detailed Description of the Invention] (Industrial field of application) The present invention relates to the frequency of a switching power supply for a constant voltage power supply,
The present invention relates to a circuit that automatically synchronizes with the frequency of another circuit.

(従来の技術とその問題点) 市販のパルス幅変調(P.W.M)方式の定電圧電源用コン
トローラICに於いては,外部信号との同期を合わせる事
が出来ず,例えばブラウン管を使用している機器に,こ
のICを用いた定電圧電源を使用すると,ブラウン管の偏
向ヨークトランスが,定電圧電源のトランスの漏洩磁束
の影響を受けて,ブラウン管の画面に縞模様の雑音が目
立つ欠点が有った。これを防ぐには,偏向ヨークトラン
スと電源トランスの距離を離せばよいが,距離をとれな
い小型の機器に於いては雑音除去が困難であった。
(Prior art and its problems) In a commercially available pulse width modulation (PWM) type constant voltage power supply controller IC, it is not possible to synchronize with an external signal, for example, a device using a cathode ray tube. In addition, when a constant voltage power supply using this IC is used, the deflection yoke transformer of the cathode ray tube is affected by the leakage magnetic flux of the transformer of the constant voltage power source, and there is a drawback that the stripe noise is noticeable on the screen of the cathode ray tube. . To prevent this, the distance between the deflection yoke transformer and the power transformer should be increased, but it was difficult to remove noise in a small device that cannot keep the distance.

このように,市販の定電圧電源用のコントローラICを使
用する場合のブラウン管画面上に生ずる雑音除去を簡単
な手段によって実現できることが望まれていた。
As described above, it has been desired that the noise generated on the screen of the cathode ray tube when a commercially available controller IC for a constant voltage power supply is used can be removed by a simple means.

(問題点を解決するための手段) 本考案はこれらの欠点を除去するため、制御側及び出力
側にそれぞれ外部接続された抵抗(RT)及びコンデンサ
(CT)にレファレンス電圧を電源とする定電流電源から
の同じ大きさの定電流をそれぞれ供給して発振周期を定
める内蔵の発振器(OSC)によりパルス幅変調を行って
定電圧動作を行わせるパルス幅変調方式定電圧電源用の
コントローラ(5)に、前記発振器(OSC)の発振パル
スを方形波信号に変換する手段(4)と、外部からの同
期信号を方形波信号に変換する手段(2)と、これらの
2つの方形波信号の排他的論理和をとる手段(3)と、
その出力レベルのH(ハイ)又はL(ロー)レベルによ
り抵抗(R2)を通じて前記発振周期より長い時定数で充
放電が行われるコンデンサ(C1)と、前記抵抗(RT)と
該コンデンサ(C1)間に接続され前記発振器(OSC)の
定電流電源の電流を制御する電流制御抵抗(R1)とを付
加して、前記コントローラの発振器の発振周期を外部か
らの同期信号に同期できるようにしたもので以下図面に
より説明する。
(Means for Solving Problems) In order to eliminate these drawbacks, the present invention uses a reference voltage as a power source for a resistor (R T ) and a capacitor (C T ) externally connected to the control side and the output side, respectively. Controller for pulse width modulation type constant voltage power supply that supplies constant current of the same magnitude from constant current power supply to perform pulse width modulation by built-in oscillator (OSC) that determines the oscillation cycle ( 5) Means (4) for converting the oscillation pulse of the oscillator (OSC) into a square wave signal, means (2) for converting an external synchronization signal into a square wave signal, and these two square wave signals Means (3) for obtaining the exclusive OR of
A capacitor (C 1 ) that is charged and discharged through a resistor (R 2 ) with a time constant longer than the oscillation cycle according to the output level H (high) or L (low), the resistor (R T ) and the capacitor. A current control resistor (R 1 ) connected between (C 1 ) to control the current of the constant current power supply of the oscillator (OSC) is added to synchronize the oscillation cycle of the oscillator of the controller with a synchronization signal from the outside. This will be described below with reference to the drawings.

(実施例) 第1図は本考案の一実施例にかかるパルス幅変調方式電
源の周波数同期回路であり,図において1は例えばテレ
ビ等の水平同期信号等を入力する外部同期用入力端子,
2,4及び7はフリップフロップ回路(F/F),3は排他的論
理和回路,5はパルス幅変調方式のスイッチングレギュレ
ータ用コントローラIC,6は電源回路の一部を構成するト
ランスで,IC5と組合せて定電圧電源回路を構成する。8
はDC入力端子,9はDC出力端子である。前記IC5の内部は
第2図に示すように発振器OSC,フリップフロップF/F,基
準電源VC,コンパレータCOMPなどで構成され,前記発振
器OSCは抵抗RT,コンデンサCTの定数により周波数を決
めるようになっておりその具体的な回路列を第3図に示
す。
(Embodiment) FIG. 1 shows a frequency synchronizing circuit of a pulse width modulation type power supply according to an embodiment of the present invention. In FIG. 1, reference numeral 1 denotes an external synchronizing input terminal for inputting a horizontal synchronizing signal of a television,
2, 4 and 7 are flip-flop circuits (F / F), 3 is an exclusive OR circuit, 5 is a pulse width modulation type switching regulator controller IC, and 6 is a transformer which constitutes a part of the power supply circuit. A constant voltage power supply circuit is configured in combination with. 8
Is a DC input terminal and 9 is a DC output terminal. Oscillator OSC as internal are shown in FIG. 2 of the IC 5, the flip-flop F / F, the reference power supply VC, is configured by a comparator COMP, the oscillator OSC resistor R T, to determine the frequency by the constant of the capacitor C T FIG. 3 shows a concrete circuit sequence of the above.

第3図において、発振器OSCの出力側に外部接続された
コンデンサCTには制御側に外部接続された抵抗RTに流れ
る定電流Iと同じ大きさの定電流Iが流れ、コンデンサ
CTが定電流充電されるため第4図のような発振周期Tを
有する鋸波波形が得られ発振する。
In FIG. 3, a constant current I of the same magnitude as the constant current I flowing through the resistor R T externally connected to the control side flows through the capacitor C T externally connected to the output side of the oscillator OSC,
Since C T is charged with a constant current, a sawtooth waveform having an oscillation period T as shown in FIG. 4 is obtained and oscillates.

ここで第3図のトランジスタQ2およびQ3のエミッタ・ベ
ース間電圧をそれぞれVEB(Q2)およびVEB(Q3)とし,
コンデンサCTの端子電圧VCTの電圧変化ΔVが第4図に
示すものであるとすると,第3図に示す発振回路の電流
Iは次式で表わすことができる。
Let V EB (Q 2 ) and V EB (Q 3 ) be the emitter-base voltages of the transistors Q 2 and Q 3 in FIG. 3 , respectively.
Assuming that the voltage change ΔV of the terminal voltage V CT of the capacitor C T is as shown in FIG. 4, the current I of the oscillator circuit shown in FIG. 3 can be expressed by the following equation.

ΔV=VH−VL …………………………(2) また発振周期Tは次式のとおり表わすことができる。 ΔV = V H −V L (2) Further, the oscillation period T can be expressed by the following equation.

第3図および上記の(1)〜(3)式から明らかなとお
り,発振回路OSCのトランジスタQ1のコレクタに接続さ
れた発振周期Tを決定する抵抗RTに電流制御用抵抗R1
並列に接続して電流Iを変化させることにより,コンデ
ンサCTに流れる電流Iも変化するので,上記(3)式よ
り発振周期Tを変化させることが可能である。
As is clear from FIG. 3 and the above equations (1) to (3), the current control resistor R 1 is connected in parallel with the resistor R T that determines the oscillation period T connected to the collector of the transistor Q 1 of the oscillator circuit OSC. Since the current I flowing through the capacitor C T also changes when the current I is changed by connecting to the capacitor, it is possible to change the oscillation period T from the above equation (3).

さて第1図にもどり外部同期用入力端子1に外部からの
同期信号(第5図a)が入力されると,フリップフロッ
プ2(F/F)で方形波(第5図b)に変換される。一方I
C5の発振器出力端子OSCOUTからの発振周期パルス(第5
図c)は,フリップフロップ4(F/F)で波形を方形波
(第5図d)に変換される。
Now, returning to FIG. 1, when an external synchronizing signal (Fig. 5a) is input to the external synchronizing input terminal 1, it is converted into a square wave (Fig. 5b) by the flip-flop 2 (F / F). It Meanwhile I
Oscillation cycle pulse from the oscillator output terminal OSCOUT of C5 (5th
In Fig. C), the waveform is converted into a square wave (Fig. 5d) by the flip-flop 4 (F / F).

この場合IC5の発振周期パルス(第5図c)が外部から
の同期信号の2倍の周波数で出力されているICについて
はフリップフロップ4(F/F)に更にフリップフロップ
7(F/F)を追加しその周波数を1/4に低くする。その出
力波形を第5図eに示す。
In this case, for an IC in which the oscillation cycle pulse of IC5 (Fig. 5c) is output at twice the frequency of the synchronization signal from the outside, flip-flop 7 (F / F) is added to flip-flop 4 (F / F). To reduce the frequency to 1/4. The output waveform is shown in FIG.

フリップフロップ2と7の出力(第5図bとe)は排他
的論理和回路3で論理和がとられ,その出力は抵抗R2
通してコンデンサC1に接続され,さらに電流制御用抵抗
R1を通してスイッチングコントローラ5のRT端子に接続
される。コンデンサC1は排他的論理和回路3の出力状態
によりHレベルの時に充電されLレベルの時に放電され
る。
The outputs of the flip-flops 2 and 7 (FIGS. 5b and e) are ORed by the exclusive OR circuit 3, the output of which is connected to the capacitor C 1 through the resistor R 2 and the current control resistor.
It is connected to the R T terminal of the switching controller 5 through R 1 . The capacitor C 1 is charged at the H level and discharged at the L level according to the output state of the exclusive OR circuit 3.

第5図fは排他的論理和回路3の出力波形を示す。コン
デンサC1の充放電電圧は第5図gの如くなる。即ちスイ
ッチングコントローラ5の発振器OSCの発振周期Tが,
外部から同期信号(第5図a)の周期に比べ大きい場合
は,コンデンサC1の充電電圧が下がり,スイッチングコ
ントローラ5のRT端子から電流制御用抵抗R1(第1図)
に電流が流れるため,(3)式の電流Iが増加すること
により発振器OSCの発振周期Tが小さくなる。
FIG. 5f shows the output waveform of the exclusive OR circuit 3. The charging / discharging voltage of the capacitor C 1 is as shown in FIG. That is, the oscillation cycle T of the oscillator OSC of the switching controller 5 is
External from the synchronizing signal is larger compared to the period of (FIG. 5 a), it decreases the charging voltage of the capacitor C 1, R T terminal current control resistor from R 1 (FIG. 1) of the switching controller 5
Since the current flows in the equation (3), the oscillation period T of the oscillator OSC becomes smaller as the current I in the equation (3) increases.

またこれとは反対に発振器OSCの発振周期Tが外部から
の同期信号の周期に比べ小さければ,コンデンサC1の充
電電圧が上りスイッチングコントローラ5のRT端子から
抵抗R1への電流が流れなくなり,(3)式の電流Iが減
少することにより発振周期Tが大きくなる。
On the contrary, if the oscillation cycle T of the oscillator OSC is smaller than the cycle of the synchronizing signal from the outside, the charging voltage of the capacitor C 1 rises and the current from the RT terminal of the switching controller 5 to the resistor R 1 stops flowing. , The oscillation period T increases as the current I in the equation (3) decreases.

このように,スイッチングコントローラ5のRT端子の電
流Iを制御することにより,発振器OSCの発振周期Tを
外部同期信号に同期をとる事が出来る。この方法は第4
図のΔVとかVH,VLに影響を与えていないので,スイッ
チングコントローラ5(IC)のパルス幅変調制御機能は
100%活かせたもので外部同期をとることができる。
As described above, by controlling the current I of the RT terminal of the switching controller 5, the oscillation cycle T of the oscillator OSC can be synchronized with the external synchronization signal. This method is the fourth
Since it does not affect ΔV, V H , and V L in the figure, the pulse width modulation control function of the switching controller 5 (IC)
It can be synchronized externally with 100% utilization.

具体的な例として第1図の外部同期用入力端子1にテレ
ビの水平同期信号(15.75KHz)を接続した場合には,こ
の周波数に同期したスイッチング電源を作ることが出
来,ブラウン管画面上に表われる雑音は同期がとられて
いるので目立たなくなる。この他にスイッチング電源の
周波数は水平同期信号により安定に保たれるため,この
周波数がドリフトして受信機の帯域内に入り雑音になっ
ていたような問題も解決される。
As a concrete example, when the horizontal sync signal (15.75KHz) of the TV is connected to the external sync input terminal 1 in Fig. 1, a switching power supply synchronized with this frequency can be created and displayed on the CRT screen. The noise that is heard is inconspicuous because it is synchronized. In addition to this, the frequency of the switching power supply is kept stable by the horizontal synchronizing signal, so the problem that this frequency drifts and enters the receiver band to become noise is also solved.

(考案の効果) 以上説明したように本考案はパルス幅変調方式のスイッ
チング電源のコントローラICの発振周波数を,その外部
端子から入力される同期信号に同期するように,前記IC
の発振周波数を制御する抵抗RTとコンデンサCTとからな
る定数回路に対し,前記抵抗RTと並列に電流制御用抵抗
R1を並列接続し、RT端子からこれに流れる電流を外部周
期信号の周期により変化させて発振周波数を調整するよ
うにしたものである。
(Effects of the Invention) As described above, the present invention is designed to synchronize the oscillation frequency of the controller IC of the pulse width modulation type switching power supply with the synchronization signal input from its external terminal.
To constant circuit composed of the R T resistor and a capacitor C T for controlling the oscillation frequency of the R T resistor in parallel with the current control resistor
R 1 is connected in parallel and the oscillation frequency is adjusted by changing the current flowing from the R T terminal according to the period of the external periodic signal.

したがって簡単な回路構成によって外部から入力される
同期信号によってスイッチングコントローラの発振器の
発振周波数が同期されるので,本考案回路をブラウン管
表示器に使用すると,表示画面に雑音が表示されること
なく,極めて都合がよい。
Therefore, the oscillation frequency of the oscillator of the switching controller is synchronized by the synchronizing signal input from the outside with a simple circuit configuration. Therefore, when the circuit of the present invention is used for the cathode ray tube display, no noise is displayed on the display screen, and convenient.

【図面の簡単な説明】[Brief description of drawings]

第1図は本考案の一実施例にかかる周波数同期回路図,
第2図はスイッチングレギュレータ用コントローラICの
回路構成図,第3図は第2図の発振器回路,第4図はそ
のCT端子波形図,第5図は第1図の動作を説明するため
の各部の波形図である。 1;外部同期用入力端子,2,4及び7;フリップフロップ(F/
F),3;排他的論理和回路,5;スイッチングレギュレータ
用コントローラIC,6;トランス,8及び9;DC入力端子及び
出力端子,Q1,Q2,Q3;トランジスタ,RT;抵抗,CT
コンデンサ,R1;電流制御用抵抗。
FIG. 1 is a frequency synchronization circuit diagram according to an embodiment of the present invention,
2 is a circuit configuration diagram of a controller IC for a switching regulator, FIG. 3 is an oscillator circuit of FIG. 2, FIG. 4 is its C T terminal waveform diagram, and FIG. 5 is a diagram for explaining the operation of FIG. It is a waveform diagram of each part. 1; Input terminal for external synchronization, 2, 4 and 7; Flip-flop (F /
F), 3; exclusive OR circuit, 5; controller IC for switching regulator, 6; transformer, 8 and 9; DC input terminal and output terminal, Q 1 , Q 2 , Q 3 ; transistor, RT ; resistance, C T ;
Capacitor, R 1 ; current control resistor.

Claims (1)

【実用新案登録請求の範囲】[Scope of utility model registration request] 【請求項1】制御側及び出力側にそれぞれ外部接続され
た抵抗(RT)及びコンデンサ(CT)にレファレンス電圧
を電源とする定電流電源からの同じ大きさの定電流をそ
れぞれ供給して発振周期を定める内臓の発振器(OSC)
によりパルス幅変調を行って定電圧動作を行わせるパル
ス幅変調方式定電圧電源用のコントローラ(5)に、前
記発振器(OSC)の発振パルスを方形波信号に変換する
手段(4)と、外部からの同期信号を方形波信号に変換
する手段(2)と、これら2つの方形波信号の排他的論
理和をとる手段(3)と、その出力レベルのH(ハイ)
又はL(ロー)レベルにより抵抗(R2)を通じて前記発
振周期より長い時定数で充放電が行われるコンデンサ
(C1)と、前記抵抗(RT)と該コンデンサ(C1)間に接
続され前記発振器(OSC)の定電流電源の電流を制御す
る電流制御抵抗(R1)とを付加して、前記コントローラ
の発振器の発振周期を外部からの同期信号に同期できる
ようにしたことを特徴とするパルス幅変調方式電源の周
波数同期回路。
1. A constant current of the same magnitude is supplied from a constant current power source using a reference voltage as a power source to a resistor (R T ) and a capacitor (C T ) externally connected to a control side and an output side, respectively. Built-in oscillator (OSC) that determines the oscillation cycle
A controller (5) for a pulse width modulation type constant voltage power source that performs pulse width modulation to perform a constant voltage operation by means (4) for converting an oscillation pulse of the oscillator (OSC) into a square wave signal; Means (2) for converting the synchronizing signal from the above into a square wave signal, means (3) for taking the exclusive OR of these two square wave signals, and the output level H (high)
Alternatively, a capacitor (C 1 ) which is charged and discharged through a resistor (R 2 ) at a L (low) level with a time constant longer than the oscillation cycle is connected between the resistor (R T ) and the capacitor (C 1 ). A current control resistor (R 1 ) for controlling the current of the constant current power source of the oscillator (OSC) is added to enable the oscillation cycle of the oscillator of the controller to be synchronized with an external synchronization signal. Pulse width modulation type power supply frequency synchronization circuit.
JP11816586U 1986-07-30 1986-07-30 Pulse width modulation power supply frequency synchronization circuit Expired - Lifetime JPH0746068Y2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP11816586U JPH0746068Y2 (en) 1986-07-30 1986-07-30 Pulse width modulation power supply frequency synchronization circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP11816586U JPH0746068Y2 (en) 1986-07-30 1986-07-30 Pulse width modulation power supply frequency synchronization circuit

Publications (2)

Publication Number Publication Date
JPS6324989U JPS6324989U (en) 1988-02-18
JPH0746068Y2 true JPH0746068Y2 (en) 1995-10-18

Family

ID=31004361

Family Applications (1)

Application Number Title Priority Date Filing Date
JP11816586U Expired - Lifetime JPH0746068Y2 (en) 1986-07-30 1986-07-30 Pulse width modulation power supply frequency synchronization circuit

Country Status (1)

Country Link
JP (1) JPH0746068Y2 (en)

Also Published As

Publication number Publication date
JPS6324989U (en) 1988-02-18

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