JPH03256405A - Sawtooth voltage generation circuit - Google Patents

Abstract

PURPOSE:To decrease the current proof of a convergence output circuit and a power source circuit for the circuit by generating a sawtooth signal whose amplitude is kept constant in spite of the change of a deflecting frequency. CONSTITUTION:An integration circuit 21 forms a sawtooth voltage at an output terminal 5 by performing a charge/discharge operation by output from a frequency voltage conversion circuit 6 and an inversion amplifier 24. The amplitude of the sawtooth voltage is proportional to the product of the integral action time of the integration circuit 21 and a current outputted from a power source for charge/discharge. The integral action time decides the short inclination period and the long inclination period of the sawtooth voltage, and it is inversely proportional to the deflecting frequency, and the output current of the power source for charge/discharge is proportional to the deflecting frequency, therefore, the amplitude of the sawtooth voltage can be kept constant in spite of the deflecting frequency (frequency of flyback pulse). In such a way, it is possible to use the convergence circuit or the power source circuit for the circuit with low current proof.

Description

[Detailed Description of the Invention] [Object of the Invention] (Industrial Application Field) The present invention is a method for selecting and receiving multiple types of signal sources with different synchronous frequencies, such as standard television signals and computer image signals. The present invention relates to a sawtooth voltage generation circuit that generates a sawtooth voltage necessary for performing convergence correction and the like in a display device such as a television receiver that can be used.

(Prior Art) Display devices such as television receivers use sawtooth wave voltages with horizontal and vertical cycles and parabolic wave voltages obtained by modulating the sawtooth wave voltages to perform convergence correction, linearity correction of deflection signals, and distortion. Corrections are being made. The performance of these corrections depends on the linearity of the tornado wave. A method of generating a highly accurate sawtooth voltage is to control the opening and closing of a constant current source for charging and discharging using a retrace pulse with a vertical period (or horizontal period when obtaining a sawtooth voltage with a horizontal period) as a trigger signal. There is a method of driving an integrator circuit. Although such a sawtooth voltage generation circuit can obtain harmonic voltages with extremely high precision, it cannot be A display device that selects and receives multiple different types of signal sources, if the synchronization frequency changes,
Since the rate of charging and discharging by the constant current source is constant, the amplitude of the mud wave changes.

In a monitor receiver that automatically tracks an arbitrary synchronization frequency, it is desirable that the level (signal amplitude) of the harmonic voltages that are the various basic signals remain constant even if the deflection frequency changes. Required.

In the case of harmonic voltages required for convergence correction, stabilization of the signal level is not an absolute requirement as long as linearity is ensured within the adjustment range against frequency changes. However, since the convergence correction amount always changes when the frequency changes, it is troublesome to have to perform level adjustment during correction. Additionally, the sawtooth voltage signal processing circuit also needs to have a dynamic range that can process from small signals to large signals. ■The S/N ratio deteriorates when the signal is small. ■When the signal is small, even the slightest drift in the DC potential of the processing circuit cannot be ignored. ■In the event of a large signal, inconveniences such as critical adjustments may occur. Therefore, in reality, it is necessary to keep the level of the fundamental harmonic voltage constant even if the frequency changes.

FIG. 4 shows an example of a circuit that outputs a convergence correction voltage (harmonic voltage) at a constant level even when the deflection frequency changes.

In FIG. 4, operational amplifier A1 and capacitor C constitute an integrating circuit 21. In FIG. The integrating circuit 21 has a constant current of 1
A constant current source 8 that outputs a constant current IR is connected to the switch SW 1, and a constant current source 9 that outputs a constant current IR is connected to the switch SW 1. The constant current source 8 serves as a charging current source and causes a constant current RE to flow through the integrating circuit 21, and the constant current source 9 serves as a current source for charging and causes a constant current IR to flow through the integrating circuit 21. The switch S W 1 is turned off during the slope period of the harmonic voltage output from the integrating circuit 21 and turned on during the rising period of the harmonic voltage.

The harmonic voltage output from the integrating circuit 21 is derived to the output terminal 5. The output terminal 5 feeds back the output to a comparator 23 that regulates the amplitude of the harmonic voltage. In the comparator 23, the reference voltage Vs from the voltage source 22 is applied to one input terminal of the operational amplifier 2, and the harmonic voltage from the output terminal 5 is introduced to the other input terminal of the operational amplifier A2. As a result, the comparator 23 produces a comparison output that changes from low level to high level when the harmonic voltage in the rising period exceeds Vs, and as described later, R
The switch SW1 is controlled via the S flip-flop 3 to regulate the amplitude of the output wave voltage.

On the other hand, a retrace pulse signal having a horizontal or vertical period based on a received television signal or computer image signal is introduced to the input terminal 1. The retrace pulse signal is passed through the differentiating circuit 2 to the set terminal S of the RS flip-flop 3.
guided by. Reset terminal R of RS flip-flop 3
The comparison output from the comparator 23 is introduced into. The RS flip-flop 3 controls the switch SW1 by a signal 3a from the output terminal Q.

Further, the circuit shown in FIG.
The output current amount of the constant current source 8 is controlled by the output of the constant current source 8.

The above circuit generates a harmonic voltage of constant amplitude in the following manner. Now, when the capacitor C is sufficiently charged by the constant current +1iii8, the potential of the output terminal 5 becomes a negative potential, and the lowest level of the harmonic voltage is determined. Next, a retrace pulse BLK is generated, and R
When the S flip-flop 3 is set (the output state is at high level), the switch SW1 is turned ON'' (conducted). When the switch SW1 is turned ON'', the capacitor C
The charges are rapidly discharged by the currents of the constant current sources 8 and 9. When the charge on the capacitor C becomes zero due to this discharge, the potential at the output terminal 5 exhibits a zero potential. Since the switch S W 1 is still in the "ON" state, the constant current '&9 now rapidly charges the capacitor C so as to increase the voltage at the output terminal 5 in the positive polarity direction. Furthermore, when the potential of the output terminal 5 exceeds the reference voltage Vs, the comparison output level of the comparator 23 is inverted and the RS flip 7
Reset 0 knob 3. As a result, switch SW1
is switched to “OFF” (non-conducting) (determining the highest point of the sawtooth voltage).

When the switch SW1 is turned "OFF", the capacitor C is slowly charged by the constant current 1c of the constant current source 8 alone.

Note that when viewed from the integrating circuit 21, the potential of the output terminal 5 is V.
The period from s to zero potential corresponds to discharging, and the period from zero potential to the next lowest level corresponds to charging.

FIG. 5 shows the above operation, where waveform A shows the retrace pulse signal and waveform B shows the sawtooth voltage. In addition, T
R indicates a period during which the switch SW1 is "ON", and Tc indicates a period during which the switch SW1 is "OFF".

Here, when the deflection frequency changes, the switch SW1 "
If the ON" and "OFF" periods change and the current remains constant despite this, the amplitude of the sawtooth voltage will fluctuate.

Therefore, when the deflection frequency becomes low and the amplitude of the sawtooth voltage becomes small, the AGC circuit 4 controls the constant current source 8 to increase the entire amount of charging/discharging current to increase the amplitude of the sawtooth voltage. Furthermore, when the deflection frequency becomes high and the amplitude of the sawtooth voltage becomes large, the AGC circuit 4 controls the constant current source 8 to reduce the overall amount of charging/discharging current, thereby lowering the amplitude of the sawtooth voltage. . With this kind of feedback,
Even if the deflection frequency changes, a sawtooth voltage with a constant amplitude is always obtained.

However, as a means of stabilizing the output amplitude, AGC
Because the method uses feedback, the following problems occurred.

In order to operate the AGC circuit stably, a certain amount of time constant (1ffi) is required. For example, when the signal input to the receiver is switched and the synchronous frequency is not switched,
An excessive level signal (sawtooth voltage) may be output during a period until the GC operation reaches a stable point.

This output signal level fluctuation occurs not only when switching signals, but also when turning on the power, for example, and when changing the TV signal level! This also occurs when changing channels at 1 o'clock or when receiving noise from an empty channel.

Furthermore, a peak detection method is adopted as a means for detecting the output signal level, which is extremely susceptible to external disturbances, and the output signal level may fluctuate due to noise, causing screen shaking. Furthermore, since the external terminal of the capacitor for peak detection has a very high impedance, the AGC operation may not be performed normally due to leakage current during dew condensation, and an excessive signal may be output.

(Problem to be Solved by the Invention) In the prior art, the method was effective in obtaining a sawtooth voltage with a constant amplitude even when the deflection frequency changes, but there is a method to stabilize the output signal level. AG when taking measures
Since a C circuit is used, a signal of an excessive level may be outputted due to its response time constant, which has the disadvantage that the current withstand capacity of the convergence output circuit and its power supply circuit must be increased.

SUMMARY OF THE INVENTION An object of the present invention is to provide a sawtooth voltage generation circuit that generates a sawtooth signal having a constant amplitude regardless of changes in deflection frequency.

[Structure of the Invention] (Means for Solving the Five Problems) The present invention includes an integrating circuit for generating a sawtooth voltage, a retrace pulse signal whose horizontal a first current source that generates a current; a second current source that generates a current that has a different polarity from the current from the current source; and a current that is supplied from the first and second current sources to the integrating circuit. A current control circuit that controls opening and closing based on the retrace pulse signal, and amplitude regulation of the output voltage from the integrating circuit so that the current has a different amount during the short and long ramp periods of the sawtooth voltage. According to such a configuration, the amplitude of the mud wave voltage is is proportional to the product of the integration time of the integration circuit and the current output from the charge/discharge current source.The integration time determines the short and long slope periods of the mud wave voltage, and is inversely proportional to the deflection frequency. However, since the output current of the charging/discharging current source is proportional to the deflection frequency, the amplitude of the mud wave voltage is constant regardless of the deflection frequency (retrace pulse frequency).

(Example) Embodiments of the present invention will be described below with reference to the drawings.

FIG. 1 is a circuit diagram without showing an embodiment of the sawtooth voltage generating circuit according to the present invention, and the same parts as in FIG. 4 are given the same reference numerals and will be explained.

In FIG. 1, an input terminal 1 receives, for example, a retrace pulse signal with a vertical period based on a received signal.

The retrace pulse signal is introduced to the set terminal S of the RS flip-flop 7 via the differentiating circuit 2 and is also supplied to the frequency-voltage conversion circuit 6. The frequency-voltage conversion circuit 6 generates a voltage obtained by smoothing the retrace pulse signal, and transmits the voltage through a resistor R3 and further through a series connection of a switch SW11 that is turned on by a high-level signal. and supplies it to the integrating circuit 21. As a result, the integrating circuit 21
Then, a current in the direction of the arrow according to the generated voltage from the frequency-voltage conversion circuit 6 flows into the integrating circuit 21 through the resistor R3. The same frequency voltage conversion circuit 6 and the resistor R3 constitute a first current source, and flow out a current proportional to the frequency of the retrace pulse signal. Further, the voltage output from the same frequency voltage conversion circuit 6 is transferred to an inverting amplifier 2 constituted by an operational amplifier A3.
4 is input. The inverting amplifier 24 has a resistor R2 connected between the inverting input terminal (->) and the output terminal of the operational amplifier A3, a non-inverting input terminal of the operational amplifier A3 being connected to a ground point, and a voltage output from the frequency-voltage conversion circuit 6. is introduced into the inverting input terminal of operational amplifier A3 via resistor R1.

The inverting amplifier 24 outputs a voltage obtained by inverting the polarity of the voltage from the frequency-voltage conversion circuit 6, and further includes a switch 5W that turns on this output by a resistor R4 and a high-level signal.
Integrating circuit 21 via I2! :Supply. This results in
A current flows through the integrating circuit 21 in the direction of arrow B through the resistor R4. Inverting amplifier 24 and resistor R4 constitute a second current source.

The integrating circuit 21 performs charging and discharging operations using currents based on the outputs from the frequency-voltage conversion circuit 6 and the inverting amplifier 24, and forms a mud wave voltage at the output terminal 5.

The voltage from terminal 5 is applied to comparator 2, which has the same configuration as the conventional one.
3 and is compared with a reference voltage Vs that determines the highest point level of the mud wave voltage. The output of the comparator 23 is led to the reset terminal R of the RS flip-flop 7, and controls the RS flip-flop 7. In the RS flip-flop 7, the positive phase output cuff b controls the switch SW 12, and the negative phase output cuff a controls the switch SWn.

The operation of the above circuit will be explained below.

First, when the RS flip-flop 7 is set at the timing of the rise of the retrace pulse BLK, the switch SWn turns "○" and the switch SW 12 turns "ON".

At this timing, the charge charged in capacitor C is
The capacitor C is rapidly discharged by the constant current IR from the inverting amplifier 24, and the charge on the capacitor C becomes zero due to this discharge.

Even after this, the switch SW 12 remains in the "ON" state, so the capacitor C continues to rapidly discharge due to the constant current IR. However, this discharge is caused by the integration circuit 21
When viewed from above, it is charging. Through such discharging and charging,
A waveform of the rising period of the mud wave voltage is formed. Output terminal 5
When the potential of exceeds the reference voltage vs, the comparator 23
The comparison output level of is inverted and the RS flip-flop 7 is reset, and the positive phase output cuff b is at a high level and the negative phase output cuff a is at a high level.
becomes low level and switch SWn turns “ON”
The switch SW 12 is turned "OFF". This means that the highest point of the mud wave voltage is limited to the level VS, and the amplitude of the mud wave voltage is regulated. The capacitor C is a constant current IC based on the voltage from the frequency-voltage conversion circuit 6.
As a result, it is slowly charged and a waveform in the slope period of the mud wave voltage is formed. When viewed from the integrating circuit 21, this charging corresponds to discharging when the potential of the output terminal 5 goes from Vs to zero potential, and corresponds to charging when the potential at the output terminal 5 goes from zero potential to the lowest level.

Here, if the rising period is TR1 and the slope period is TC, then
The frequency f of the retrace pulse signal can be expressed as 1=TR+TC...■.

Further, if the coefficient representing the slope of the electroencephalogram voltage in the rising period TR is 1, then vl is proportional to the frequency f, so Vl=α×f...■. Note that α is a constant determined by the resistor R3, the capacitor C, and the operational amplifier A1.

On the other hand, if v2 is a coefficient representing the slope of the electroencephalogram voltage during the slope period Tc, v2 is proportional to the frequency f, so v2=β×f...■. Note that β is a constant determined by the amplification degree of the resistor R4, the capacitor C, the operational amplifier A1, and the inverting amplifier 24.

From the formula ■, the amplitude of the rising period of the electroencephalogram voltage L+i, L+
= - αxf

The amplitude L2 of the pressure gradient period is: It is expressed as L2=-βxfXTc.

Since L1=12=1, The following relationship is obtained.

If we calculate the amplitude by combining equations (■) and (■), we get the following. This indicates that the amplitude of the electroencephalogram voltage is constant regardless of the deflection frequency.

Fig. 2 and Fig. 3 are explanatory diagrams comparing each operation waveform when the deflection frequency is low and high. Fig. 2 shows the case of the low frequency f1, and Fig. 3 shows the case of the high frequency f2. show. Coefficient V1. V2 is small in FIG. 2, and as the frequency increases, Vi.

By increasing v2, the effect of increasing the amount of charging and discharging current similar to the AGC circuit of FIG. 4 is produced, and the amplitude is maintained constant (V□1=VH2>).

On the other hand, in the frequency-voltage conversion circuit 6, the period during which the amplitude changes due to switching of the deflection frequency is short, so there is no risk of outputting an excessively high level signal (#A wave voltage) compared to the method of stabilizing with an AGC circuit. Furthermore, when the power is turned on, the frequency-voltage conversion circuit 6 always starts up from the lowest level, so the level of the obtained brain wave voltage also rises from the lowest level, so there is no possibility that an excessive level signal (brain wave voltage) will be output. This makes it possible to use a convergence circuit and its power supply circuit with a small current withstand capacity, reducing the cost of the projection receiver.Furthermore, it is possible to use a monostable multivibrator using C, MOS-IC. If the frequency-voltage conversion circuit 6 is configured in this way, the noise margin will be large and it will be resistant to external disturbances.In addition, since there are no parts configured with a particularly high impedance, it will be stable against dew condensation, etc. take action.

In the embodiment, a circuit for a vertical period has been described, but a circuit for a horizontal period may be used.

Further, although the current from the frequency-voltage conversion circuit and the current from the inverting amplifier were controlled to open and close using separate switches, it is also possible to use only one on the switch S W 12 side, as in FIG. 4.

[Effects of the Invention] As described above, according to the present invention, even when signals having different synchronization frequencies are input, an electroencephalogram voltage having a constant amplitude can be obtained.

[Brief explanation of drawings]

FIG. 1 is a circuit diagram showing an embodiment of the sawtooth voltage generating circuit according to the present invention, FIGS. 2 and 3 are operational waveform diagrams comparing and showing differences in waveforms due to differences in deflection frequency, and FIG. 5 is a circuit diagram showing a conventional sawtooth voltage generating circuit, and FIG. 5 is an explanatory diagram illustrating the operation of the circuit shown in FIG. 4. DESCRIPTION OF SYMBOLS 1... Input width, 2... Differentiating circuit, 5... Output terminal, 6... Frequency voltage conversion circuit, 7... Flip-flop, 21... Integrating circuit, 23... Comparator , 24... Inverting amplifier, Al, A3... Operational amplifier, C... Capacitor, 5WI1. ,5WI2...
switch. Fifth

Claims (1)

[Scope of Claims] An integrating circuit for generating a sawtooth voltage; a first current source that receives a horizontal or vertical cycle retrace pulse signal and generates a current proportional to the frequency of this signal; and this current source. a second current source that generates a current with a polarity different from that of the current from the current source; and a second current source that generates a current with a polarity different from that of the current from the current source, and a current that is supplied from the first and second current sources to the integrating circuit by a short ramp period and a long ramp period of the sawtooth voltage. A current control circuit that performs opening/closing control based on the retrace pulse signal and an output voltage from the integrating circuit are compared with a reference level for amplitude regulation so that the current amount is different at 1. A sawtooth voltage generation circuit comprising: a comparator for controlling opening/closing operations of a control circuit.