JPH0740631B2 - Thick film circuit board manufacturing method - Google Patents

Thick film circuit board manufacturing method

Info

Publication number
JPH0740631B2
JPH0740631B2 JP62014696A JP1469687A JPH0740631B2 JP H0740631 B2 JPH0740631 B2 JP H0740631B2 JP 62014696 A JP62014696 A JP 62014696A JP 1469687 A JP1469687 A JP 1469687A JP H0740631 B2 JPH0740631 B2 JP H0740631B2
Authority
JP
Japan
Prior art keywords
resistance
film
circuit board
thick film
silicide
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
JP62014696A
Other languages
Japanese (ja)
Other versions
JPS63181496A (en
Inventor
勉 西村
徹 石田
寛敏 渡辺
治 牧野
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Holdings Corp
Original Assignee
Matsushita Electric Industrial Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Matsushita Electric Industrial Co Ltd filed Critical Matsushita Electric Industrial Co Ltd
Priority to JP62014696A priority Critical patent/JPH0740631B2/en
Publication of JPS63181496A publication Critical patent/JPS63181496A/en
Publication of JPH0740631B2 publication Critical patent/JPH0740631B2/en
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

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  • Apparatuses And Processes For Manufacturing Resistors (AREA)

Description

【発明の詳細な説明】 産業上の利用分野 本発明は、IC、チップ部品などの電子部品の実装を高密
度に低コストに行う厚膜回路基板の製造方法に関するも
のである。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for manufacturing a thick film circuit board, which mounts electronic parts such as ICs and chip parts at high density and at low cost.

従来の技術 近年、各種電子機器の小型化や多機能化が年を追って進
んできているが、この中で回路部品の高密度実装技術は
重要な役割を演じてきている。特に、IC、LSIの発達に
伴う抵抗器、コンデンサ等のチップ化や厚膜化そして、
配線基板の多層化などによる小型化、高密度化には目を
見張るものがある。さらに、ある回路ブロックを、厚膜
状の抵抗と配線導体を形成した厚膜回路基板上に他のチ
ップ状態の受動部品を搭載するいわゆる厚膜ハイブリッ
ドICへと移行してきている。
2. Description of the Related Art In recent years, miniaturization and multi-functionalization of various electronic devices have been progressing year by year, and in this, high-density mounting technology of circuit components plays an important role. In particular, with the development of IC and LSI, making resistors and capacitors into chips and making them thicker,
The miniaturization and high density of multi-layered wiring boards are remarkable. Furthermore, a certain circuit block has been transferred to a so-called thick film hybrid IC in which other chip-state passive components are mounted on a thick film circuit board on which a thick film resistance and a wiring conductor are formed.

この厚膜ハイブリッドICは、抵抗体が厚膜状であるた
め、抵抗トリミングによる調整が容易な事と、セラミッ
ク材料を用いるため高信頼性である事などから、広く普
及してきている。
This thick film hybrid IC is widely used because the resistor is a thick film and therefore adjustment by resistance trimming is easy, and because it uses a ceramic material, it is highly reliable.

以下図面を参照しながら、上述した従来の厚膜回路基板
の製造方法の一例について述べる。
An example of the conventional method for manufacturing the above-described thick film circuit board will be described below with reference to the drawings.

第3図は従来の厚膜回路基板の断面図を示すものであ
る。同図において、10はセラミック基板、20は貴金属導
体膜、30はRuO2系グレーズ抵抗膜を示す。従来の厚膜回
路基板は、焼結されたアルミナ基板10上に、Au,Ag,Pd,P
tなどの貴金属を主成分とするペーストをスクリーン印
刷し、乾燥後に850℃前後の温度の空気中で焼成して貴
金属系の導体膜20を得た後、RuO2−ガラスからなるペー
ストを前記導体膜と接触するようにスクリーン印刷し、
乾燥後に空気中750〜900℃の温度で焼成してRuO2系のグ
レーズ抵抗膜30を設けて得られるのが一般的である。上
記のようにして得られた厚膜回路基板は、すべて空気中
で焼成できるという手軽さと、抵抗体特性も優れたもの
が得られておるため広く実用に供されている。(例え
ば、「厚膜IC化技術」日本マイクロエレクトロニクス協
会編、工業調査会発行)。
FIG. 3 is a sectional view of a conventional thick film circuit board. In the figure, 10 is a ceramic substrate, 20 is a noble metal conductor film, and 30 is a RuO 2 -based glaze resistance film. A conventional thick film circuit board is formed by sintering Au, Ag, Pd, P on a sintered alumina substrate 10.
A paste containing a precious metal such as t as a main component is screen-printed, dried and then baked in air at a temperature of about 850 ° C. to obtain a precious metal-based conductor film 20, and then a paste made of RuO 2 -glass is used as the conductor. Screen print to make contact with the membrane,
It is generally obtained by drying and baking in air at a temperature of 750 to 900 ° C. to provide a RuO 2 -based glaze resistance film 30. The thick film circuit board obtained as described above is widely used because it is easy to fire in air and has excellent resistance characteristics. (For example, "Thick Film IC Technology" edited by Japan Microelectronics Association, published by Industrial Research Board).

しかし、反面では、導体材料、抵抗材料共に高価で価格
変動の大きい貴金属材料を用いているため、いくら製造
の合理化をはかったとしても非常に高価な回路基板にな
るという問題点を有していた。そこで、両者とも貴金属
材料を用いないつまり低コストで価格変動も少ない卑金
属材料のみからなる導体材料と抵抗材料を用いた構成の
ものが提案されている。
On the other hand, on the other hand, since both the conductor material and the resistance material use precious metal materials that are expensive and whose price fluctuates greatly, there is a problem in that the circuit board becomes an extremely expensive circuit board no matter how much the manufacturing is rationalized. . Therefore, there has been proposed a structure in which a conductor material and a resistance material which are made of only a base metal material that does not use a precious metal material, that is, has a low cost and a small price fluctuation are used.

〔例えば、プロシーディングス オブ ザ フォース
インターナショナル マイクロエレクトロニクス カン
ファレンス アイ エム シー 1986 コーベ,アイエ
ス エッチ エム ジャパン発行;267〜271P(Proceedi
ngs of the 4th International Microelectronics conf
erence INC 1986 Kobe,ISHM Japan発行;267〜271P)〕 これは、Cuなどの卑金属導体を予めセラミック基板10に
メタライズして導体膜20とし、その後、珪化物−ガラス
系グレーズ抵抗ペーストを前記のメタライズ導体膜と接
触する様に印刷し、乾燥後、850℃〜1000℃の非酸化性
雰囲気中の高温で焼付けてグレーズ抵抗体を得るもので
ある。確かに、この構成では、電極、抵抗材料共に卑
金属を用いるため安価であり、Cuなどの卑金属は半田
付けが容易でしかもマイグレーションしにくいなどの優
れた点を有しており、また、抵抗体としての諸特性はRu
O2系のそれと同等の優れた特性を有している。
[For example, Proceedings of the Force
International Microelectronics Conference IMC 1986 Kobe, IS H.M. Japan; 267〜271P (Proceedi
ngs of the 4th International Microelectronics conf
erence INC 1986 Kobe, ISHM Japan issued; 267-271P)] This is a conductor film 20 in which a base metal conductor such as Cu is previously metallized on the ceramic substrate 10 and then a silicide-glass type glaze resistance paste is metallized as described above. The glaze resistor is obtained by printing so as to come into contact with the conductor film, drying, and baking at a high temperature in a non-oxidizing atmosphere of 850 ° C to 1000 ° C. Certainly, in this configuration, since the base metal is used for both the electrode and the resistance material, it is inexpensive, and the base metal such as Cu has an excellent point that it is easy to solder and migration is difficult, and as a resistor. Properties of Ru
It has the same excellent characteristics as those of O 2 series.

発明が解決しようとする問題点 しかしながら、上記の構成においては、抵抗は基本特性
面では満足できるものの、抵抗値の初期バラツキが大き
いため実用上大きな不安を残している。特に、同じ面積
抵抗(Rs)の抵抗膜でありながら抵抗膜のたて・よこ比
(アスペクト比)によってRsが異なり、抵抗値を設計す
る上で大きな障害となっている。これは、抵抗膜をX線
などで解析したところ、焼成時に電極と抵抗体の界面で
不要な反応が生じ、この反応層の抵抗変化によってバラ
ツキが発生するものと推測される。
Problems to be Solved by the Invention However, in the above-mentioned configuration, although the resistance is satisfactory in terms of basic characteristics, there is a great concern in practical use because the initial variation of the resistance value is large. In particular, even though the resistance film has the same sheet resistance (Rs), Rs varies depending on the vertical / horizontal ratio (aspect ratio) of the resistance film, which is a major obstacle in designing the resistance value. This is presumed to be due to an undesired reaction occurring at the interface between the electrode and the resistor during firing when the resistive film is analyzed by X-ray or the like, and variation occurs due to the resistance change of this reaction layer.

このように、従来の珪化物−ガラス系グレーズ抵抗は初
期抵抗の不安定さからなかなか実用に供されないのが実
状であった。
As described above, the conventional silicide-glass type glaze resistance is difficult to put into practical use due to the instability of the initial resistance.

本発明は、上記問題点に鑑み、使用する材料は卑金属材
料であるため安価で、安定な抵抗特性を有したグレーズ
抵抗と優れた導体膜とを有する高信頼性の厚膜回路基板
の製造方法を提供するものである。
In view of the above problems, the present invention is a method for manufacturing a highly reliable thick film circuit board having a glaze resistance that is inexpensive and has a stable resistance characteristic and an excellent conductor film because the material used is a base metal material. Is provided.

問題点を解決するための手段 上記問題点を解決するために本発明の厚膜回路基板の製
造方法は、絶縁性磁器基板上に、珪化物−ガラス系グレ
ーズ抵抗膜を非酸化性雰囲気中の高温で焼成した後、前
記抵抗膜に接触する卑金属材料からなる導体膜を抵抗膜
の焼成温度より低い温度の非酸化性雰囲気中で焼成する
という構成を備えたものである。
Means for Solving the Problems In order to solve the above problems, the method for manufacturing a thick film circuit board according to the present invention comprises a silicide-glass type glaze resistance film on an insulating porcelain substrate in a non-oxidizing atmosphere. After firing at a high temperature, the conductor film made of a base metal material that contacts the resistance film is fired in a non-oxidizing atmosphere at a temperature lower than the firing temperature of the resistance film.

作用 本発明の方法によれば、抵抗膜を予め形成してあるため
に、抵抗体中の導体成分である珪化物をガラスがおおっ
た状態となり、さらに、抵抗膜中のガラスが結晶化して
いるため、電極焼成段階において、卑金属とガラスある
いは、卑金属と珪化物の化学反応を抑えることができ
る。このため、電極焼成後の抵抗膜と電極膜との界面に
反応層が生成されず、膜形状依存性のない抵抗膜を有す
る厚膜回路基板を提供できるものである。
Effect According to the method of the present invention, since the resistance film is formed in advance, the glass covers the silicide, which is the conductor component in the resistor, and the glass in the resistance film is crystallized. Therefore, the chemical reaction between the base metal and the glass or the base metal and the silicide can be suppressed in the electrode firing step. Therefore, a reaction layer is not formed at the interface between the resistance film and the electrode film after firing the electrode, and it is possible to provide a thick film circuit board having a resistance film that does not depend on the film shape.

実施例 以下本発明の一実施例の厚膜回路基板の製造方法につい
て、図面を参照しながら説明する。第1図は本発明の実
施例における厚膜回路基板の断面図を示すものである。
第1図において、10はセラミック基板、40は卑金属導
体、50は珪化物−ガラス系グレーズ抵抗膜を示す。
Example A method for manufacturing a thick film circuit board according to an example of the present invention will be described below with reference to the drawings. FIG. 1 is a sectional view of a thick film circuit board according to an embodiment of the present invention.
In FIG. 1, 10 is a ceramic substrate, 40 is a base metal conductor, and 50 is a silicide-glass type glaze resistance film.

3種類の珪化物組成を有する珪化物粉体を特開昭56−15
3702号公報に示す手順で得た。この珪化物粉体に、BaO,
B2O3,MgO,CaO,SiO2からなるガラスフリットと、アクリ
ル系バインダをテレピン油に10%溶解したビヒクルとを
加え、よく混練して珪化物−ガラス系グレーズ抵抗ペー
ストとした。この時、珪化物粉体とガラスフリットとの
合計量に対する珪化物粉体を5〜50重量%になるように
した。また、ペースト作製時に用いる有機バインダーと
しては、非酸化性雰囲気で焼き付けするため、熱分解性
のアクリル系バインダーが望ましい。以上の様にして作
製した抵抗ペーストを、アルミナ純度が96%の焼結体で
あるセラミック基板10上にスクリーン印刷し、120℃で1
0分間乾燥した後、最高温度が850〜1000℃で、N2のみ
か、またはH2とN2の混合ガスの非酸化性雰囲気に保たれ
た連続ベルト炉に通して焼成し、珪化物−ガラス系グレ
ーズ抵抗膜50を形成した。この時、焼付温度は、ガラス
組成と導体材料の組合せによって異なる。
A silicide powder having three kinds of silicide compositions is disclosed in JP-A-56-15.
It was obtained by the procedure shown in Japanese Patent No. 3702. BaO,
A glass frit made of B 2 O 3 , MgO, CaO, and SiO 2 and a vehicle in which an acrylic binder was dissolved in turpentine oil in 10% were added and well kneaded to obtain a silicide-glass-based glaze resistance paste. At this time, the content of the silicide powder was 5 to 50% by weight based on the total amount of the silicide powder and the glass frit. Further, as the organic binder used when preparing the paste, a thermally decomposable acrylic binder is desirable because it is baked in a non-oxidizing atmosphere. The resistance paste prepared as described above is screen-printed on a ceramic substrate 10 which is a sintered body having an alumina purity of 96%, and is screen-printed at 120 ° C.
After drying for 0 minutes, the maximum temperature is 850 ~ 1000 ℃, and fired through a continuous belt furnace maintained in a non-oxidizing atmosphere of N 2 only or a mixed gas of H 2 and N 2 to obtain a silicide- A glass-based glaze resistance film 50 was formed. At this time, the baking temperature differs depending on the combination of the glass composition and the conductor material.

次に、導体材料としてCuを主成分としたペーストを抵抗
膜50に接触するようにスクリーン印刷し、120℃で10分
間乾燥した後、最高温度が850〜950℃(ただし、抵抗焼
成よりも低い温度)で、N2のみか、またはH2とN2混合ガ
スの非酸化性雰囲気に保たれた連続ベルト炉に通して焼
成しCuの導体膜40を形成した。この時の電極間距離
(L)は0.5〜10mmで0.5mmおきに異なっており、また抵
抗体幅は1mmで一定とした。
Next, a paste containing Cu as a main component as a conductor material is screen-printed so as to come into contact with the resistance film 50, and after drying at 120 ° C for 10 minutes, the maximum temperature is 850 to 950 ° C (however, lower than resistance firing. At a temperature), the Cu conductor film 40 was formed by firing through a continuous belt furnace kept in a non-oxidizing atmosphere of N 2 alone or a mixed gas of H 2 and N 2 . The distance (L) between the electrodes at this time was 0.5 to 10 mm, which differed at intervals of 0.5 mm, and the resistor width was fixed at 1 mm.

このようにして得られた厚膜回路基板のグレーズ抵抗の
面積抵抗Rs(Ω/□)Rs=Ro/L、25℃と125℃における
抵抗の温度変化率TCR(ppm/℃)、電流ノイズ(dB)、1
50mW/mm2の負荷を5秒間印加した時の抵抗変化率ΔR
(%)についてそれぞれ調べた。また、電極界面のRsへ
の影響を明らかにするために、L=10mmのときの面積抵
抗R10とL=0.5mmの時の面積抵抗R0.5の比(AR)をとっ
て調べた。
The area resistance Rs (Ω / □) Rs = Ro / L of the glaze resistance of the thick film circuit board obtained in this way, the temperature change rate TCR (ppm / ℃) of the resistance at 25 ° C and 125 ° C, the current noise ( dB), 1
Resistance change rate ΔR when a load of 50 mW / mm 2 is applied for 5 seconds
(%) Was examined. In order to clarify the effect of the electrode interface on Rs, the ratio (AR) of the sheet resistance R 10 when L = 10 mm and the sheet resistance R 0.5 when L = 0.5 mm was taken and examined.

(AR)=R10/R0.5 第1表に実施例で得られた抵抗体の材料組成と代表的抵
抗体特性であるRs,TCR,N,ΔR,ARを示す。同表から、珪
化物組成の違いによらず、抵抗値の形状依存性が極めて
少ないことがわかる。
(AR) = R 10 / R 0.5 Table 1 shows the material composition of the resistors obtained in the examples and Rs, TCR, N, ΔR, AR which are typical resistor characteristics. From the table, it can be seen that the shape dependence of the resistance value is extremely small regardless of the difference in the silicide composition.

比較例 本発明の効果を明らかにするために、従来の方法、すな
わち卑金属電極形成後に、珪化物−ガラス系グレーズ抵
抗体を形成する方法で得られた厚膜回路基板の抵抗の代
表的特性を実施例の代表的特性と共に第2表に示し両者
を比較する。
Comparative Example In order to clarify the effect of the present invention, the typical characteristics of the resistance of a thick film circuit board obtained by a conventional method, that is, a method of forming a silicide-glass-based glaze resistor after forming a base metal electrode, will be described. The typical characteristics of the examples are shown in Table 2 and both are compared.

第2表の比較例との比較から、本発明の製造方法によっ
て、優れた抵抗体特性を有する厚膜回路基板が得られる
事がわかる。とりわけ、電極との反応が少なく、膜形状
依存性の小さい(ARが1に近い)抵抗の形成が可能とな
る。さらに、第2図には、電極間距離(L)と面積抵抗
Rsとの関係を、実施例(a)と比較例(b)の代表的な
ものについて示した。第2図から、本発明の製造方法に
より形成した抵抗は膜形状依存性が全くない事がわか
る。さらに、第1表から、本発明の製造方法のなかで、
抵抗体としては、珪化物−ガラス系のグレーズ抵抗体で
あればよく珪化物の種類によって、その効果が著しく変
わらない事がわかる。
From the comparison with the comparative example in Table 2, it can be seen that the manufacturing method of the present invention can provide a thick film circuit board having excellent resistance characteristics. In particular, it is possible to form a resistor having a small reaction with the electrode and a small film shape dependency (AR is close to 1). Further, FIG. 2 shows the distance (L) between electrodes and the sheet resistance.
The relationship with Rs is shown for typical examples (a) and comparative examples (b). It can be seen from FIG. 2 that the resistance formed by the manufacturing method of the present invention has no dependence on the film shape. Further, from Table 1, in the production method of the present invention,
It is understood that the resistor may be any silicide-glass type glaze resistor, and its effect does not significantly change depending on the type of silicide.

なお、本実施例ではグレーズ抵抗体のガラス成分として
硼珪酸バリウム系のものを用いたが、非酸化性雰囲気の
高温で安定な抵抗膜を形成できるものであればこれに限
らない。
In this embodiment, the glass component of the glaze resistor is made of barium borosilicate, but the glass component is not limited to this as long as it can form a stable resistance film at a high temperature in a non-oxidizing atmosphere.

発明の効果 以上のように本発明の製造方法は、絶縁性磁器基板上
に、珪化物−ガラス系グレーズ抵抗膜を非酸化性雰囲気
中の高温で焼成した後、前記抵抗膜に接触する卑金属材
料からなる導体膜を抵抗膜の焼成温度より低い温度の非
酸化性雰囲気中で焼成することにより、高信頼性で膜形
状依存性の小さい抵抗体と、優れた導体膜を有する厚膜
回路基板を提供することができる。
EFFECTS OF THE INVENTION As described above, the manufacturing method of the present invention is a base metal material that comes into contact with the resistance film after firing the silicide-glass based glaze resistance film on the insulating porcelain substrate at a high temperature in a non-oxidizing atmosphere. By firing a conductor film made of (1) in a non-oxidizing atmosphere at a temperature lower than the firing temperature of the resistive film, a thick film circuit board having a highly reliable resistor having a small film shape dependency and an excellent conductor film can be obtained. Can be provided.

さらに、導体膜としてCuの持っている導体抵抗の低さ、
半田付け性の良さ、耐マイグレーション性の良さ、低コ
ストを充分に生かせるものであり、工業上極めて効果的
な発明である。
Furthermore, the low conductor resistance that Cu has as a conductor film,
This is an invention that is extremely effective in industry because it fully utilizes good solderability, good migration resistance, and low cost.

【図面の簡単な説明】[Brief description of drawings]

第1図は本発明の実施例における厚膜回路基板の断面
図、第2図は電極間距離Lと面積抵抗Rsとの関係を示す
特性図、第3図は従来の厚膜回路基板の断面図である。 10……セラミック基板、20……導体膜、30……グレーズ
抵抗膜、40……卑金属導体膜、50……珪化物−ガラス系
グレーズ抵抗膜。
FIG. 1 is a sectional view of a thick film circuit board according to an embodiment of the present invention, FIG. 2 is a characteristic diagram showing a relationship between an interelectrode distance L and sheet resistance Rs, and FIG. 3 is a sectional view of a conventional thick film circuit board. It is a figure. 10 …… ceramic substrate, 20 …… conductor film, 30 …… glaze resistance film, 40 …… base metal conductor film, 50 …… silicide-glass type glaze resistance film.

───────────────────────────────────────────────────── フロントページの続き (72)発明者 牧野 治 大阪府門真市大字門真1006番地 松下電器 産業株式会社内 (56)参考文献 特開 昭55−27658(JP,A) ─────────────────────────────────────────────────── ─── Continuation of front page (72) Inventor Osamu Makino 1006 Kadoma, Kadoma City, Osaka Prefecture Matsushita Electric Industrial Co., Ltd. (56) References JP-A-55-27658 (JP, A)

Claims (1)

【特許請求の範囲】[Claims] 【請求項1】絶縁性磁器基板上に、珪化物−ガラス系グ
レーズ抵抗膜を非酸化性雰囲気中の高温で焼成した後、
前記抵抗膜に接触する卑金属材料からなる導体膜を抵抗
膜の焼成温度より低い温度の非酸化性雰囲気中で焼成す
ることを特徴とする厚膜回路基板の製造方法。
1. A silicide-glass type glaze resistance film is baked on an insulating porcelain substrate at a high temperature in a non-oxidizing atmosphere,
A method for manufacturing a thick film circuit board, comprising: firing a conductor film made of a base metal material, which is in contact with the resistance film, in a non-oxidizing atmosphere at a temperature lower than the firing temperature of the resistance film.
JP62014696A 1987-01-23 1987-01-23 Thick film circuit board manufacturing method Expired - Lifetime JPH0740631B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP62014696A JPH0740631B2 (en) 1987-01-23 1987-01-23 Thick film circuit board manufacturing method

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP62014696A JPH0740631B2 (en) 1987-01-23 1987-01-23 Thick film circuit board manufacturing method

Publications (2)

Publication Number Publication Date
JPS63181496A JPS63181496A (en) 1988-07-26
JPH0740631B2 true JPH0740631B2 (en) 1995-05-01

Family

ID=11868350

Family Applications (1)

Application Number Title Priority Date Filing Date
JP62014696A Expired - Lifetime JPH0740631B2 (en) 1987-01-23 1987-01-23 Thick film circuit board manufacturing method

Country Status (1)

Country Link
JP (1) JPH0740631B2 (en)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2777206B2 (en) * 1989-07-20 1998-07-16 住友金属鉱山株式会社 Manufacturing method of thick film resistor

Also Published As

Publication number Publication date
JPS63181496A (en) 1988-07-26

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