JP2760035B2 - Thick film circuit board - Google Patents

Thick film circuit board

Info

Publication number
JP2760035B2
JP2760035B2 JP1096972A JP9697289A JP2760035B2 JP 2760035 B2 JP2760035 B2 JP 2760035B2 JP 1096972 A JP1096972 A JP 1096972A JP 9697289 A JP9697289 A JP 9697289A JP 2760035 B2 JP2760035 B2 JP 2760035B2
Authority
JP
Japan
Prior art keywords
resistor
conductor
circuit board
film circuit
layer
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
JP1096972A
Other languages
Japanese (ja)
Other versions
JPH02273986A (en
Inventor
年厚 長屋
直人 三輪
和彦 安田
一義 大竹
康直 三浦
三信 丹羽
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Denso Corp
Original Assignee
Denso Corp
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Filing date
Publication date
Application filed by Denso Corp filed Critical Denso Corp
Priority to JP1096972A priority Critical patent/JP2760035B2/en
Publication of JPH02273986A publication Critical patent/JPH02273986A/en
Application granted granted Critical
Publication of JP2760035B2 publication Critical patent/JP2760035B2/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

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Description

【発明の詳細な説明】 (産業上の利用分野) 本発明は、厚膜ハイブリッドIC回路を有する厚膜回路
基板に関するものである。
Description: TECHNICAL FIELD The present invention relates to a thick film circuit board having a thick film hybrid IC circuit.

(従来の技術) 従来より、アルミナなどのセラミック基板に導電層や
抵抗体層、絶縁体層などをスクリーン印刷法により形成
した厚膜回路基板が知られており、その厚膜回路基板の
構造は、例えば第2図に示すようである。
(Prior Art) Conventionally, a thick film circuit board in which a conductive layer, a resistor layer, an insulator layer, and the like are formed on a ceramic substrate such as alumina by a screen printing method is known. , For example, as shown in FIG.

この厚膜回路基板の製造法について説明すると、ま
ず、アルミナ等のセラミックス材料で形成された絶縁基
板1上に、例えばAg系の導体ペーストをスクリーン印刷
法にて印刷し、酸化雰囲気中800〜900℃の温度領域で焼
付して導体層2を形成する。次に絶縁基板1上に前記導
体層2に重なるように、例えば酸化ルテニウム系の抵抗
ペーストを印刷し、800〜900℃の温度領域で焼付して抵
抗体層3を形成する。また通常は、この導体層2と抵抗
体層3の上に保護ガラスペーストを印刷し、450〜600℃
にて焼付して保護ガラス層を形成することが多い。
The method of manufacturing this thick-film circuit board will be described. First, for example, an Ag-based conductor paste is printed on an insulating substrate 1 formed of a ceramic material such as alumina by a screen printing method, and is then placed in an oxidizing atmosphere at 800 to 900 mm. The conductor layer 2 is formed by baking in a temperature range of ° C. Next, a resistor paste of, for example, ruthenium oxide is printed on the insulating substrate 1 so as to overlap the conductor layer 2 and baked in a temperature range of 800 to 900 ° C. to form the resistor layer 3. Also, usually, a protective glass paste is printed on the conductor layer 2 and the resistor layer 3, and the temperature is 450 to 600 ° C.
To form a protective glass layer.

この場合、抵抗体層3の抵抗値Rは、抵抗ペーストの
シート抵抗と抵抗体の形状によって設計値になるように
調整される。ここに、例えば第3図に示すように、抵抗
体の長さをL、抵抗体の幅をWとすると、抵抗値Rが例
えばR=10kΩの抵抗体を形成する場合、シート抵抗10k
Ω/□の抵抗ペーストを、L=1mm、W=1mmになるよう
に印刷し、焼付する。さらに抵抗値の微調整が必要な場
合には、レーザトリミング法等により設定値になるよう
に調節する。
In this case, the resistance value R of the resistor layer 3 is adjusted to a design value by the sheet resistance of the resistor paste and the shape of the resistor. Here, as shown in FIG. 3, for example, assuming that the length of the resistor is L and the width of the resistor is W, when a resistor having a resistance value R of, for example, R = 10 kΩ is formed, the sheet resistance is 10 kΩ.
A resistive paste of Ω / □ is printed and baked so that L = 1 mm and W = 1 mm. If the resistance value needs to be finely adjusted, the resistance value is adjusted to a set value by a laser trimming method or the like.

(発明が解決しようとする課題) しかしながら、前述したアルミナの絶縁基板を用いた
従来の厚膜回路基板においては、抵抗体の形状効果と呼
ばれる問題がある。ここに「形状効果」とは、基板上に
印刷し焼付して得られた抵抗体のシート抵抗値が抵抗体
の形状により異なることをいう。また、例えば第4図に
示すように、抵抗体の長さLとシート抵抗値の関係につ
いて、導体と抵抗体の組合わせにより、形状効果が異な
ることも一般に知られている。
(Problems to be Solved by the Invention) However, the conventional thick film circuit board using the alumina insulating substrate described above has a problem called a resistor shape effect. Here, the “shape effect” means that the sheet resistance of a resistor obtained by printing and printing on a substrate differs depending on the shape of the resistor. In addition, as shown in FIG. 4, for example, it is generally known that the relationship between the length L of the resistor and the sheet resistance varies depending on the combination of the conductor and the resistor.

このため、市販の抵抗体についてはカタログデータに
形状効果が記載される場合があり、この場合ユーザはカ
タログデータの記載に基づいてパターン設計することが
できる。しかし実際には、ユーザごとに焼付条件が異な
るため形状効果も微妙に異なってくるので、ユーザにと
ってはテストパターンによって形状効果を確認した後で
パターン設計を行わなくてはならずパターン設計が煩雑
になりがちである。
For this reason, in the case of a commercially available resistor, the shape effect may be described in the catalog data. In this case, the user can design a pattern based on the description of the catalog data. However, in practice, the shape effect is slightly different due to the different printing conditions for each user, so the user must perform pattern design after confirming the shape effect with a test pattern, which makes pattern design complicated. It tends to be.

また、周知の如く近年の電子機器の小型化、高性能化
に伴ない、厚膜回路基板材料には、アルミナよりも高熱
伝導性、低熱膨張性、低誘電性の優れた材料が要求さ
れ、これに見合った基板材料として、種々の窒化アルミ
ナ基板、低温焼成基板(LFC基板)が開発されている。
Also, as is well known, with the recent miniaturization and high performance of electronic devices, thick film circuit board materials are required to have materials with higher thermal conductivity, lower thermal expansion, and lower dielectric properties than alumina, Various types of alumina nitride substrates and low-temperature fired substrates (LFC substrates) have been developed as suitable substrate materials.

ところが、本発明者の行なった実験によると、窒化ア
ルミナ基板やLFC基板に対して市販の導体と市販の抵抗
体を用いる場合、抵抗体の焼付時に抵抗体と導体の境界
部の抵抗体にクラックが発生しやすいことが判明し、ま
た、導体なしで抵抗体のみを基板上へ印刷氏焼付する場
合は、抵抗体のクラックが発生しにくいことが判明し
た。形状効果については、窒化アルミ基板やLFC基板の
場合もアルミナ基板の場合と同様に発現した。
However, according to an experiment conducted by the present inventors, when a commercially available conductor and a commercially available resistor are used for an alumina nitride substrate or an LFC substrate, cracks occur in the resistor at the boundary between the resistor and the conductor when the resistor is baked. It has been found that cracking of the resistor is unlikely to occur when printing only the resistor on the substrate without a conductor. Regarding the shape effect, the aluminum nitride substrate and the LFC substrate exhibited the same effect as the alumina substrate.

ここで導体が抵抗体に影響を与えることによって、抵
抗体の形状効果が生じることと、抵抗体のクラックが発
生することの2つを「電極効果」と定義する。
Here, the effect of the conductor on the resistor to generate a shape effect of the resistor and the occurrence of cracks in the resistor are defined as “electrode effect”.

電極効果が生じる原因は、抵抗体の焼付時に導体から
抵抗体中に成分拡散が生じ、導体近傍部の抵抗体が変質
することにより、その部分の電気的および熱的性質が変
化することによるものと考えられる。さらに具体的に
は、形状効果が発生する原因は、導体中の主成分である
Agと抵抗体の反応によるものであると考えられる。一
方、クラックの発生は導体膜中のガラス成分と抵抗体の
反応に起因すると考えられるが、導体は導体特性(はん
だ性、基板との接着強度の確保)を満足させるために、
Bi2O3、ガラス、遷移金属酸化物等の添加物が必要不可
欠であるので、導体膜中のガラスを極端に減らしたり、
また組成を大幅に変更することはできない。
The cause of the electrode effect is due to the diffusion of components from the conductor into the resistor when the resistor is baked, which changes the electrical and thermal properties of the resistor in the vicinity of the conductor due to deterioration of the resistor. it is conceivable that. More specifically, the cause of the shape effect is a main component in the conductor.
This is probably due to the reaction between Ag and the resistor. On the other hand, the occurrence of cracks is thought to be due to the reaction between the glass component in the conductor film and the resistor. However, in order to satisfy the conductor characteristics (solderability, ensuring the adhesion strength to the substrate),
Since additives such as Bi 2 O 3 , glass, and transition metal oxides are indispensable, the glass in the conductor film can be extremely reduced,
Also, the composition cannot be changed significantly.

本発明は、上記実情を考慮してなされたもので、厚膜
回路基板の構造を変えることで、電極効果がほとんどな
く、かつ製造時にクラックが発生せず、導体の特性も損
なわないような厚膜回路基板の製造方法を提供すること
を目的とするものである (課題を解決するための手段) 前記課題を解決するための本発明の厚膜回路基板の製
造方法は、セラミック絶縁基板上に銀系の導体層と抵抗
体層とを設けた厚膜回路基板であって、前記銀系の導体
層は第1の導体層と第2の導体層とからなり、前記第1
の導体層は前記抵抗体層と重ならないように形成され、
前記第2の導体層はその一部が前記第1の導体層の一部
および前記抵抗体層の一部と重なるように形成され、前
記第1の導体層および前記抵抗体層を800〜900℃の雰囲
気中で焼結し、その後、前記第2の導体層を500〜600℃
の雰囲気中で焼結することを特徴とする。
The present invention has been made in view of the above circumstances, and has a structure in which a thick film circuit board has a structure in which the electrode structure has almost no electrode effect, cracks do not occur during manufacturing, and the characteristics of the conductor are not impaired. It is an object of the present invention to provide a method for manufacturing a film circuit board. (Means for Solving the Problems) A method for manufacturing a thick film circuit board according to the present invention for solving the above-mentioned problems is provided on a ceramic insulating substrate. A thick-film circuit board provided with a silver-based conductor layer and a resistor layer, wherein the silver-based conductor layer comprises a first conductor layer and a second conductor layer,
Is formed so as not to overlap with the resistor layer,
The second conductor layer is formed so that a part thereof overlaps a part of the first conductor layer and a part of the resistor layer, and forms the first conductor layer and the resistor layer by 800 to 900. Sintering in an atmosphere at a temperature of 500 ° C.
Characterized by sintering in an atmosphere of

ここに、第1の導体層に適する材料は、ハンダぬれ
性、耐ハンダくわれ性、ハンダ付け後の耐久接着強度等
の導体特性が良好である材料、例えばAg−Pd系、Ag−Pt
系で800〜900℃焼付温度の高温焼付ペーストを用いるの
が望ましい。
Here, a material suitable for the first conductor layer is a material having good conductor properties such as solder wettability, solder resistance, and durable adhesive strength after soldering, for example, Ag-Pd, Ag-Pt
It is desirable to use a high temperature baking paste with a baking temperature of 800-900 ° C in the system.

第2の導体層に適する材料は、焼付温度は抵抗体ガラ
スの軟化温度より低く(例えば650℃以下)、Ag以外の
ガラスや金属酸化物がなるべく少なく、抵抗体へのAgお
よびガラス成分が拡散し難く、Agの焼結が充分でありシ
ート抵抗値が充分に低い(例えば20mΩ/□以下)のよ
うな材料が望ましい。
The material suitable for the second conductor layer has a baking temperature lower than the softening temperature of the resistor glass (for example, 650 ° C. or lower), glass and metal oxides other than Ag as little as possible, and Ag and glass components diffuse into the resistor. It is desirable to use a material that is difficult to perform, has sufficient Ag sintering, and has a sufficiently low sheet resistance (for example, 20 mΩ / □ or less).

なお、前記第1の導体層、第2の導体層および抵抗体
層の上に保護ガラスペーストを印刷し、450〜600℃にて
焼付して保護ガラス層を形成してもよいことはもちろん
である。
The protective glass layer may be formed by printing a protective glass paste on the first conductor layer, the second conductor layer, and the resistor layer, and baking the paste at 450 to 600 ° C. is there.

(実施例) 以下、本発明を図面にもとづいて詳細に説明する。Hereinafter, the present invention will be described in detail with reference to the drawings.

本発明の厚膜回路基板の基本的な構造は、第1図に示
すとおりであり、厚膜回路基板20は、絶縁基板21上に形
成される第1の導体層22と、絶縁基板21上に第1の導体
層22に重ならないように形成される抵抗体層23と、絶縁
基板21上に第1の導体層22上の一部と抵抗体層23上の一
部とに重なるように形成される電極効果の小さな第2の
導体層24から成っている。
The basic structure of the thick-film circuit board according to the present invention is as shown in FIG. 1, and the thick-film circuit board 20 includes a first conductor layer 22 formed on an insulating substrate 21 and a A resistor layer 23 formed so as not to overlap the first conductor layer 22, and a portion on the first conductor layer 22 and a portion on the resistor layer 23 on the insulating substrate 21. It consists of a second conductor layer 24 with a small electrode effect formed.

このような構造をもつ厚膜回路基板を従来のものと比
較して試験した。本発明の実施例および比較例において
用いた材料は共通であり、下記に示すとおりである。
The thick film circuit board having such a structure was tested in comparison with the conventional one. Materials used in Examples and Comparative Examples of the present invention are common and are as shown below.

「絶縁基板」は、アルミナを主成分とした低温焼成基
板であり、その熱膨張系数は室温〜約500℃の温度範囲
で5.3×10-6/℃である。
The “insulating substrate” is a low-temperature fired substrate containing alumina as a main component, and has a thermal expansion coefficient of 5.3 × 10 −6 / ° C. in a temperature range from room temperature to about 500 ° C.

「第1の導体」は、重量比Ag:Pd=85:15のAg、Pdを主
成分としたAg−Pd系導体であり、添加物としてPbO−B2O
3−SiO2−ZnO系ガラス、Bi2O3、ZnO、および微量の遷移
金属酸化物を、総量で金属成分に対して約10wt%含んだ
材料である。この材料を850℃にて基板上へ焼付するこ
とにより、良好な導体特性(ハンダぬれ性、耐ハンダく
われ性、ハンダ付け後の耐久接着強度、低配線抵抗)が
得られる。
The “first conductor” is an Ag—Pd-based conductor containing Ag and Pd at a weight ratio of Ag: Pd = 85: 15, and PbO—B 2 O as an additive.
It is a material containing a total of about 10 wt% of 3- SiO 2 -ZnO-based glass, Bi 2 O 3 , ZnO, and a small amount of transition metal oxide with respect to the metal component. By baking this material on a substrate at 850 ° C., good conductor characteristics (solder wettability, solder break resistance, durable adhesive strength after soldering, low wiring resistance) can be obtained.

「第2の導体」は、低温焼付仕様の市販Ag導体であ
り、焼付温度はメーカ指定で500〜600℃である。組成は
Ag100に対して約7%のホウケイ酸鉛とBi2O3を添加した
材料であり、この材料を500〜600℃で焼付することによ
りシート抵抗10mΩ/□となる。ただし、ハンダくわれ
性が大きいので、ハンダが用いられる部位には不適であ
る。
The "second conductor" is a commercially available Ag conductor with a low-temperature baking specification, and the baking temperature is 500 to 600 ° C. as specified by the manufacturer. The composition is
A material obtained by adding about 7% lead borosilicate and Bi 2 O 3 with respect to AG100, a sheet resistance 10 m [Omega / □ by baking the material at 500 to 600 ° C.. However, since the solder is easily broken, it is not suitable for a site where solder is used.

「抵抗体」は、Pb2Ru2O7-X(パイロクロア)およびRu
O2の導電粒子とPbO−SiO2−B2O3−Al2O3系ガラスの混合
物であり、導電粒子とガラスの比は重量比で20:80であ
る。焼付温度は850℃である。
“Resistors” are Pb 2 Ru 2 O 7-X (pyrochlore) and Ru
Conductive particles and PbO-SiO 2 -B 2 in O 2 O 3 is a mixture of -Al 2 O 3 based glass, the ratio of the conductive particles and the glass is 20:80 by weight. The baking temperature is 850 ° C.

「保護ガラス」は、PbO−SiO2−B2O3−Al2O3系ガラス
であり、焼付温度は600℃である。
The “protective glass” is a PbO—SiO 2 —B 2 O 3 —Al 2 O 3 system glass and has a baking temperature of 600 ° C.

試験結果を示すと、第1表に示すとおりであった。 The test results are as shown in Table 1.

第1表において、比較例1〜4は従来技術に属し、実
施例1と2は本発明に属する。
In Table 1, Comparative Examples 1 to 4 belong to the prior art, and Examples 1 and 2 belong to the present invention.

比較例 1 比較例1の厚膜回路基板の構造は、第5図に示すよう
に、基板51上に第1の導体成分を印刷し、850℃で焼付
することにより、第1の導体52を形成した。次に同様に
抵抗体成分を印刷、焼付して抵抗体53を形成した。
Comparative Example 1 As shown in FIG. 5, the structure of the thick film circuit board of Comparative Example 1 is such that the first conductor component is printed on a substrate 51 and baked at 850 ° C. to form the first conductor 52. Formed. Next, a resistor component was similarly printed and baked to form a resistor 53.

得られた厚膜回路基板10枚を観察した結果、抵抗体20
0個中35個の抵抗体にクラックが発生していた。
Observation of the obtained 10 thick-film circuit boards revealed that the resistor 20
Cracks occurred in 35 of the 0 resistors.

比較例 2 比較例2の厚膜回路基板の構造は、第6図に示すよう
に、基板61上に抵抗体成分を印刷し、850℃で焼付する
ことにより、抵抗体62を形成した。次に第2の導体成分
を印刷し、600℃の低温焼付により第2の導体63を形成
した。次に第2の導体63の一部が露出するように保護ガ
ラス成分を印刷し、600℃で焼付することにより、保護
ガラス64を形成した。
Comparative Example 2 In the structure of the thick film circuit board of Comparative Example 2, as shown in FIG. 6, a resistor component was printed on a substrate 61 and baked at 850 ° C. to form a resistor 62. Next, a second conductor component was printed, and a second conductor 63 was formed by low-temperature baking at 600 ° C. Next, a protective glass component was printed so that a part of the second conductor 63 was exposed, and baked at 600 ° C. to form a protective glass 64.

得られた厚膜回路基板を235℃のハンダ槽に約5秒間
浸漬したところ、ハンダくわれが著しく、実用に耐えな
いことが解った。
When the obtained thick film circuit board was immersed in a solder bath at 235 ° C. for about 5 seconds, it was found that the solder was severely cracked and was not practical.

比較例 3 比較例3の厚膜回路基板の構造は、第7図に示すよう
に、基板71上に抵抗体成分を印刷し、850℃で焼付する
ことにより、抵抗体72を形成した。次に、第1の導体成
分を印刷し、850℃で焼付することにより、第1の導体7
3を形成した。
Comparative Example 3 In the structure of the thick-film circuit board of Comparative Example 3, as shown in FIG. 7, a resistor component was printed on a substrate 71 and baked at 850 ° C. to form a resistor 72. Next, the first conductor component is printed and baked at 850 ° C.
Formed three.

得られた厚膜回路基板10枚を観察した結果、抵抗体20
0個中の全ての抵抗体にクラックが発生していた。
Observation of the obtained 10 thick-film circuit boards revealed that the resistor 20
Cracks occurred in all of the 0 resistors.

比較例 4 比較例2の厚膜回路基板の構造は、第8図に示すよう
に、基板81上に抵抗体成分を印刷し、850℃で焼付する
ことにより、抵抗体82を形成した。次に、第2の導体成
分を印刷し、850℃で焼付することにより、第2の導体8
3を形成した。
Comparative Example 4 In the structure of the thick film circuit board of Comparative Example 2, as shown in FIG. 8, a resistor component was printed on a substrate 81 and baked at 850 ° C. to form a resistor 82. Next, the second conductor component is printed and baked at 850 ° C.
Formed three.

得られた厚膜回路基板10枚を観察した結果、抵抗体20
0個中の41個の抵抗体にクラックが発生していた。
Observation of the obtained 10 thick-film circuit boards revealed that the resistor 20
Cracks occurred in 41 of the 0 resistors.

実施例 1 実施例1の厚膜回路基板の構造は、第9図に示すよう
に、基板91上に第1の導体成分と抵抗体成分を順次印刷
し、850℃で同時焼付することにより、第1の導体92と
抵抗体93を同時に形成した。次に第2の導体成分を印刷
し、600℃の低温焼付により第2の導体94を形成した。
次に保護ガラス成分を第1の導体92の一部が露出するよ
うに印刷し、600℃での焼付により保護ガラス95を形成
した。
Embodiment 1 As shown in FIG. 9, the structure of the thick-film circuit board of Embodiment 1 is such that a first conductor component and a resistor component are sequentially printed on a substrate 91 and simultaneously printed at 850 ° C. The first conductor 92 and the resistor 93 were formed at the same time. Next, a second conductor component was printed, and a second conductor 94 was formed by low-temperature baking at 600 ° C.
Next, a protective glass component was printed so that a part of the first conductor 92 was exposed, and the protective glass 95 was formed by baking at 600 ° C.

この厚膜回路基板の特性は第1表に示すように良好で
あった。
The characteristics of this thick film circuit board were good as shown in Table 1.

実施例 2 実施例2の厚膜回路基板の構造は、第10図に示すよう
に、基板91上に第1の導体成分と抵抗体成分を順次印刷
し、850℃で同時焼付することにより、第1の導体92と
抵抗体93を同時に形成した。次に第2の導体成分と保護
ガラス成分を順次印刷し、600℃での同時焼付により第
2の導体94と保護ガラス95を同時に形成した。
Embodiment 2 The structure of the thick film circuit board according to Embodiment 2 is as shown in FIG. 10 by sequentially printing a first conductor component and a resistor component on a substrate 91 and simultaneously printing at 850 ° C. The first conductor 92 and the resistor 93 were formed at the same time. Next, the second conductor component and the protective glass component were sequentially printed, and the second conductor 94 and the protective glass 95 were formed simultaneously by simultaneous baking at 600 ° C.

この特性は第1表に示すように良好であった。 This characteristic was good as shown in Table 1.

(発明の効果) 以上説明したように、本発明の厚膜回路基板によれ
ば、導体特性を損なうことなくかつ形状効果の生じない
構成をもつ回路基板構造であるため、抵抗体の形状効果
を考慮に入れることなく抵抗値を設計することができ、
抵抗体パターンの設計が簡便化され、しかも製造時に抵
抗体にクラック等の破損が生じないという効果がある。
(Effects of the Invention) As described above, according to the thick film circuit board of the present invention, since the circuit board structure has a configuration in which the conductor characteristics are not impaired and the shape effect does not occur, the shape effect of the resistor can be reduced. The resistance value can be designed without taking into account
This has the effect of simplifying the design of the resistor pattern and preventing the resistor from being damaged such as cracks during manufacturing.

【図面の簡単な説明】[Brief description of the drawings]

第1図は本発明の実施例の厚膜回路基板の構造を示す概
略断面図、第2図は従来例を説明するための厚膜回路基
板を示す概略断面図、第3図および第4図は従来例を説
明するための図、第5図、第6図、第7図、第8図はそ
れぞれ従来技術に属する厚膜回路基板の構造を示す概略
断面図、第9図および第10図は本発明の実施例の厚膜回
路基板の構造を示す概略断面図である。 20……厚膜回路基板、 21……絶縁基板、 22……第1の導体層、 23……抵抗体層、 24……第2の導体層。
FIG. 1 is a schematic sectional view showing a structure of a thick film circuit board according to an embodiment of the present invention, FIG. 2 is a schematic sectional view showing a thick film circuit board for explaining a conventional example, and FIGS. FIGS. 5A, 5B, 6A, 6B, 7A, and 8B are schematic sectional views showing the structure of a thick film circuit board belonging to the prior art, FIGS. 9A and 10B, respectively. 1 is a schematic sectional view showing the structure of a thick film circuit board according to an embodiment of the present invention. 20: thick film circuit board, 21: insulating substrate, 22: first conductor layer, 23: resistor layer, 24: second conductor layer.

───────────────────────────────────────────────────── フロントページの続き (72)発明者 大竹 一義 愛知県刈谷市昭和町1丁目1番地 日本 電装株式会社内 (72)発明者 三浦 康直 愛知県刈谷市昭和町1丁目1番地 日本 電装株式会社内 (72)発明者 丹羽 三信 愛知県刈谷市昭和町1丁目1番地 日本 電装株式会社内 (56)参考文献 特開 昭63−226901(JP,A) 実開 昭62−135476(JP,U) (58)調査した分野(Int.Cl.6,DB名) H05K 1/09 H05K 1/16──────────────────────────────────────────────────続 き Continuing on the front page (72) Inventor Kazuyoshi Otake 1-1-1, Showa-cho, Kariya-shi, Aichi Japan Inside Denso Co., Ltd. (72) Inventor Yasuo Miura 1-1-1, Showa-cho, Kariya-shi, Aichi Japan Japan Denso Stock In-company (72) Inventor Sanshin Niwa 1-1-1, Showa-cho, Kariya-shi, Aichi Japan Inside Denso Co., Ltd. (56) References JP-A-63-226901 (JP, A) Jpn. (58) Fields surveyed (Int.Cl. 6 , DB name) H05K 1/09 H05K 1/16

Claims (1)

(57)【特許請求の範囲】(57) [Claims] 【請求項1】セラミック絶縁基板上に銀系の導体層と抵
抗体層とを設けた厚膜回路基板であって、 前記銀系の導体層は第1の導体層と第2の導体層とから
なり、 前記第1の導体層は前記抵抗体層と重ならないように形
成され、 前記第2の導体層はその一部が前記第1の導体層の一部
および前記抵抗体層の一部と重なるように形成され、 前記第1の導体層および前記抵抗体層を800〜900℃の雰
囲気中で焼結し、その後、前記第2の導体層を500〜600
℃の雰囲気中で焼結することを特徴とする厚膜回路基板
の製造方法。
1. A thick film circuit board comprising a ceramic insulating substrate provided with a silver-based conductor layer and a resistor layer, wherein the silver-based conductor layer comprises a first conductor layer and a second conductor layer. The first conductor layer is formed so as not to overlap with the resistor layer, and the second conductor layer has a part thereof a part of the first conductor layer and a part of the resistor layer. And sintering the first conductor layer and the resistor layer in an atmosphere at 800 to 900 ° C., and then forming the second conductor layer to 500 to 600
A method for producing a thick-film circuit board, characterized by sintering in an atmosphere at a temperature of ° C.
JP1096972A 1989-04-17 1989-04-17 Thick film circuit board Expired - Fee Related JP2760035B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP1096972A JP2760035B2 (en) 1989-04-17 1989-04-17 Thick film circuit board

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP1096972A JP2760035B2 (en) 1989-04-17 1989-04-17 Thick film circuit board

Publications (2)

Publication Number Publication Date
JPH02273986A JPH02273986A (en) 1990-11-08
JP2760035B2 true JP2760035B2 (en) 1998-05-28

Family

ID=14179136

Family Applications (1)

Application Number Title Priority Date Filing Date
JP1096972A Expired - Fee Related JP2760035B2 (en) 1989-04-17 1989-04-17 Thick film circuit board

Country Status (1)

Country Link
JP (1) JP2760035B2 (en)

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP3633028B2 (en) * 1995-04-28 2005-03-30 株式会社デンソー Thick film printed circuit board and manufacturing method thereof
JP2006190701A (en) * 2003-02-26 2006-07-20 Murata Mfg Co Ltd Ceramic circuit substrate and conductor paste used for this

Family Cites Families (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS62135476U (en) * 1986-02-20 1987-08-26
JPH06103642B2 (en) * 1987-03-16 1994-12-14 タムラ化研株式会社 Printed resistor and manufacturing method thereof

Also Published As

Publication number Publication date
JPH02273986A (en) 1990-11-08

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