JPH0738548A - Transmitter - Google Patents

Transmitter

Info

Publication number
JPH0738548A
JPH0738548A JP5156893A JP15689393A JPH0738548A JP H0738548 A JPH0738548 A JP H0738548A JP 5156893 A JP5156893 A JP 5156893A JP 15689393 A JP15689393 A JP 15689393A JP H0738548 A JPH0738548 A JP H0738548A
Authority
JP
Japan
Prior art keywords
clock signal
reference clock
signal
extracted
abnormality
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP5156893A
Other languages
Japanese (ja)
Other versions
JP2596318B2 (en
Inventor
Yoshihisa Matsumoto
義久 松本
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp filed Critical NEC Corp
Priority to JP5156893A priority Critical patent/JP2596318B2/en
Publication of JPH0738548A publication Critical patent/JPH0738548A/en
Application granted granted Critical
Publication of JP2596318B2 publication Critical patent/JP2596318B2/en
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Landscapes

  • Detection And Prevention Of Errors In Transmission (AREA)
  • Synchronisation In Digital Transmission Systems (AREA)

Abstract

PURPOSE:To provide a transmitter which can be stably provided with a clock signal to be a reference through a transmission line. CONSTITUTION:A clock extraction part 18 prepares an extracting clock signal 19 based on a transmission line signal 13. This signal 19 and a reference clock signal 11 are supplied to a switching part 15 and besides, the presence/absence of abnormality is monitored by respective abnormality detection parts 16 and 21. This monitored result is inputted to a switching control part 24, and the switching part 15 is controlled. When the first abnormality detection part 16 detects no abnormality, the reference clock signal 11 is outputted from the switching part 15 and supplied to a phase locked oscillation part 28, and the various kinds of clock signals 291-29N to be used inside the device are prepared. When the second abnormality detection part 21 detects no abnormality although the reference clock signal 11 gets abnormal, the extracting clock signal 19 is outputted from the switching part 15.

Description

【発明の詳細な説明】Detailed Description of the Invention

【0001】[0001]

【産業上の利用分野】本発明は装置外部から同期用のク
ロック信号を受信してこれに同期して動作する伝送装置
に係わり、特に受信したクロック信号に異常が検出され
た場合にも基準となるクロック信号を確保することので
きる伝送装置に関する。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a transmission apparatus which receives a clock signal for synchronization from the outside of the apparatus and operates in synchronization with the clock signal, and more particularly to a reference even when an abnormality is detected in the received clock signal. The present invention relates to a transmission device that can secure the clock signal.

【0002】[0002]

【従来の技術】相互に同期して動作する複数の伝送装置
から構成される通信システムでは、それぞれの伝送装置
間の信号の同期をとるために共通のクロック信号を使用
している。このような装置では、例えば特開昭60−7
0839号公報あるいは特開平1−259644号公報
にも示されているように装置内部に2系統の受信部を備
えている。そして、一方の受信部で基準クロック信号の
異常を検出すると、もう1つの系としての予備系の受信
部に切り換えて、装置を正常動作に復旧させるようにし
ている。
2. Description of the Related Art In a communication system composed of a plurality of transmission devices operating in synchronization with each other, a common clock signal is used to synchronize signals between the respective transmission devices. In such an apparatus, for example, JP-A-60-7
As disclosed in Japanese Patent Laid-Open No. 0839 or Japanese Patent Laid-Open No. 1-259644, the system is provided with two-system receiving sections. When one of the receiving units detects an abnormality in the reference clock signal, the receiving unit is switched to the receiving unit of the standby system as another system to restore the normal operation of the device.

【0003】[0003]

【発明が解決しようとする課題】このため、装置外部の
クロック信号の供給装置自体が異常状態となったときに
は受信する基準クロック信号が両系共に異常となり、受
信部の切り換えで対処することができない。したがっ
て、伝送装置内における位相同期発振器に同期用の基準
クロック信号が供給されなくなり、位相同期発振器が自
走してしまう。この結果として、対向する伝送装置間で
の信号の位相が狂ってしまい、データのサンプリングの
タイミングがずれてデータ誤りを発生させるという問題
があった。
Therefore, when the clock signal supply device itself outside the device is in an abnormal state, the received reference clock signal is abnormal in both systems, and it is not possible to cope with this by switching the receiving section. . Therefore, the reference clock signal for synchronization is not supplied to the phase locked oscillator in the transmission device, and the phase locked oscillator runs by itself. As a result, there is a problem that the phase of the signal between the opposing transmission devices is deviated, and the data sampling timing is deviated to cause a data error.

【0004】このような問題を解消するには、装置外に
おける基準クロック信号を生成するための供給装置を2
系統以上配置しておけばよい。しかしながら、このよう
に基準クロック信号の供給装置を複数系統配置しておい
ても、これらの共通の電源がダウンしたような場合には
同様に基準クロック信号が存在しなくなり、同様の問題
を発生させた。
In order to solve such a problem, a supply device for generating a reference clock signal outside the device is used.
All you have to do is arrange more than one system. However, even if a plurality of reference clock signal supply devices are arranged in this way, if the common power source of these devices goes down, the reference clock signal will not exist and the same problem will occur. It was

【0005】そこで本発明の目的は、伝送路を通じて基
準となるクロック信号を安定して得ることのできる伝送
装置を提供することにある。
Therefore, an object of the present invention is to provide a transmission device which can stably obtain a reference clock signal through a transmission line.

【0006】[0006]

【課題を解決するための手段】請求項1記載の発明で
は、外部から入力される同期用の基準クロック信号が正
常であるか否かを監視する基準クロック信号監視手段
と、外部から受信する伝送路信号を入力して前記した基
準クロックと同一周波数のクロック信号を抽出するクロ
ック信号抽出手段と、このクロック信号抽出手段によっ
て抽出された抽出クロック信号が正常であるか否かを監
視する抽出クロック信号監視手段と、前記した基準クロ
ック信号と抽出クロック信号を入力して一のクロック信
号の選択を行うクロック信号選択手段と、基準クロック
信号監視手段および抽出クロック信号監視手段の監視結
果を入力し正常なクロック信号が出力されるようにクロ
ック信号選択手段の選択制御を行わせるクロック信号選
択制御手段とを伝送装置に具備させる。
According to a first aspect of the invention, reference clock signal monitoring means for monitoring whether or not a synchronization reference clock signal input from the outside is normal, and transmission received from the outside. Clock signal extracting means for inputting a path signal to extract a clock signal having the same frequency as the reference clock, and an extracted clock signal for monitoring whether or not the extracted clock signal extracted by the clock signal extracting means is normal The monitoring means, the clock signal selecting means for inputting the reference clock signal and the extracted clock signal to select one clock signal, and the monitoring result of the reference clock signal monitoring means and the extracted clock signal monitoring means are input to make normal operation. Clock signal selection control means for controlling the selection of the clock signal selection means so that the clock signal is output. To be provided in.

【0007】すなわち請求項1記載の発明では、外部か
ら入力される同期用の基準クロック信号の他に、伝送路
を通って受信される主信号等の伝送路信号から基準クロ
ック信号と同一周波数の抽出クロック信号を生成し、こ
れらのクロック信号をクロック信号選択手段に入力させ
る。一方、これら基準クロック信号と抽出クロック信号
のそれぞれについてそれらに異常が発生しているかどう
かを異常検出部で検出し、これらの検出結果に応じてク
ロック信号選択手段の選択制御をクロック信号選択制御
手段で行うようにしている。したがって、例えば基準ク
ロック信号に異常が検出された場合には抽出クロック信
号が代って選択されることになり、伝送装置側で基準と
なるクロック信号を安定して得ることのできる。
That is, according to the first aspect of the invention, in addition to the reference clock signal for synchronization input from the outside, a signal of the same frequency as the reference clock signal from the transmission line signal such as the main signal received through the transmission line is received. The extracted clock signals are generated and these clock signals are input to the clock signal selection means. On the other hand, with respect to each of the reference clock signal and the extracted clock signal, the abnormality detection unit detects whether or not an abnormality has occurred in the reference clock signal and the extracted clock signal, and the selection control of the clock signal selection unit is performed according to the detection result. I am going to do it. Therefore, for example, when an abnormality is detected in the reference clock signal, the extracted clock signal is selected instead, and the reference clock signal can be stably obtained on the transmission device side.

【0008】請求項2記載の発明では、外部から入力さ
れる同期用の基準クロック信号が複数系統であり、クロ
ック信号選択制御手段はこれら複数系統の基準クロック
信号と抽出クロック信号の間でクロック信号の選択制御
を行うことを特徴としている。このように外部から入力
される同期用の基準クロック信号が複数系統であれば、
抽出クロック信号の生成と併せてクロック信号を安定し
て得ることができる。
According to the second aspect of the present invention, the reference clock signals for synchronization input from the outside have a plurality of systems, and the clock signal selection control means has the clock signals between the reference clock signals and the extracted clock signals of the plurality of systems. It is characterized by performing selection control of. In this way, if the reference clock signals for synchronization input from the outside are multiple systems,
The clock signal can be stably obtained together with the generation of the extracted clock signal.

【0009】請求項3記載の発明では、抽出クロック信
号が局舎ごとの伝送路信号によって作成される複数系統
のクロック信号であることを特徴としている。すなわ
ち、局舎の異なる伝送路信号を用いることによって基準
となるクロック信号の生成が安定化する。
According to the third aspect of the present invention, the extracted clock signal is a clock signal of a plurality of systems created by the transmission path signals for each station. That is, the generation of the reference clock signal is stabilized by using the transmission path signals of different stations.

【0010】[0010]

【実施例】以下実施例につき本発明を詳細に説明する。EXAMPLES The present invention will be described in detail below with reference to examples.

【0011】図1は本発明の一実施例における伝送装置
の構成の要部を表わしたものである。この装置は、基準
クロック信号11を外部から入力するための基準クロッ
ク信号入力端子12と、伝送路信号13を外部から入力
するための伝送路信号入力端子14の2つの入力端子を
備えている。基準クロック信号11は、切替部15の一
方の入力となる他に、第1の異常検出部16に入力され
てその異常の有無が監視されるようになっている。
FIG. 1 shows the essential parts of the structure of a transmission apparatus according to an embodiment of the present invention. This device has two input terminals, a reference clock signal input terminal 12 for inputting a reference clock signal 11 from the outside and a transmission path signal input terminal 14 for inputting a transmission path signal 13 from the outside. The reference clock signal 11 is input to one side of the switching unit 15, and is also input to the first abnormality detecting unit 16 so that the presence / absence of the abnormality is monitored.

【0012】一方、伝送路信号13はクロック抽出部1
8に入力され、基準クロック信号と同一のクロック信号
(以下抽出クロック信号という。)19の抽出が行われ
るようになっている。抽出クロック信号19は、切替部
15の他方の入力端子に供給される他に、第2の異常検
出部21に供給され、その異常の有無が監視されるよう
になっている。これら第1および第2の異常検出部1
6、21の検出結果を示す検出結果信号22、23は、
切替制御部24に入力されるようになっている。切替制
御部24はこれらの検出結果信号22、23に基づいて
切替部15に対して切替制御信号26を出力し、その切
替制御を行わせるようになっている。
On the other hand, the transmission path signal 13 is supplied to the clock extraction unit 1
A clock signal (hereinafter referred to as an extracted clock signal) 19 that is the same as the reference clock signal is input to the signal source 8 and extracted. The extracted clock signal 19 is supplied to the other input terminal of the switching unit 15 and is also supplied to the second abnormality detecting unit 21 so that the presence / absence of the abnormality is monitored. These first and second abnormality detectors 1
The detection result signals 22 and 23 indicating the detection results of 6 and 21 are
It is adapted to be input to the switching control unit 24. The switching control section 24 outputs a switching control signal 26 to the switching section 15 based on these detection result signals 22 and 23 to perform the switching control.

【0013】切替部15から出力される基準クロック信
号27は位相同期発振部28に同期信号として供給され
る。位相同期発振部28はこれを基にしてこの伝送装置
内の各部の動作用の各種クロック信号291 〜29N
出力することになる。
The reference clock signal 27 output from the switching unit 15 is supplied to the phase locked oscillator 28 as a synchronizing signal. Based on this, the phase-locked oscillating unit 28 outputs various clock signals 29 1 to 29 N for operating the respective units in this transmission device.

【0014】このような構成の伝送装置には、同一局舎
ごとに基準クロック信号が供給されるようになってい
る。切替制御部24は2つ検出結果信号22、23の論
理をとる論理回路で構成されており、その論理は次のよ
うなものとなっている。
A reference clock signal is supplied to each of the same stations in the transmission device having such a configuration. The switching control unit 24 is composed of a logic circuit that takes the logic of the two detection result signals 22 and 23, and the logic is as follows.

【0015】まず、第1の異常検出部16が基準クロ
ック信号11の異常を検出していない場合には、切替制
御部24はこの基準クロック信号11を選択するように
切替部15を制御するようになっている。このとき、基
準クロック信号11は基準クロック信号27として位相
同期発振部28に供給される。位相同期発振部28はこ
の基準クロック信号27を適宜分周する等によって装置
内で使用される各種クロック信号291 〜29N を生成
することになる。
First, when the first abnormality detecting unit 16 does not detect the abnormality of the reference clock signal 11, the switching control unit 24 controls the switching unit 15 to select the reference clock signal 11. It has become. At this time, the reference clock signal 11 is supplied to the phase locked oscillator 28 as the reference clock signal 27. The phase-locked oscillator 28 generates various clock signals 29 1 to 29 N used in the apparatus by appropriately dividing the reference clock signal 27.

【0016】第1の異常検出部16が基準クロック信
号11の異常を検出しており、第2の異常検出部21が
抽出クロック信号19の異常を検出していない場合に
は、切替制御部24は異常時の措置としてクロック抽出
部18によって生成された抽出クロック信号19側を選
択するように切替部15を制御する。このときには、抽
出クロック信号19が基準クロック信号27として位相
同期発振部28に供給され、これを基にして各種クロッ
ク信号291 〜29N が生成される。
When the first abnormality detecting unit 16 detects the abnormality of the reference clock signal 11 and the second abnormality detecting unit 21 does not detect the abnormality of the extracted clock signal 19, the switching control unit 24. Controls the switching unit 15 so as to select the extracted clock signal 19 side generated by the clock extraction unit 18 as a measure in the event of an abnormality. At this time, the extracted clock signal 19 is supplied to the phase-locked oscillator 28 as the reference clock signal 27, and various clock signals 29 1 to 29 N are generated based on this.

【0017】以上説明した実施例では伝送装置外に基準
クロック信号が1系統用意されている場合について説明
したが、複数系統用意されている場合にも本発明を適用
することができる。また、伝送路信号が複数系統入力さ
れている場合にも本発明を適用することができる。
In the embodiment described above, the case where one system of the reference clock signal is prepared outside the transmission device has been described, but the present invention can be applied to the case where a plurality of systems of the reference clock signal are prepared. The present invention can also be applied to the case where a plurality of transmission path signals are input.

【0018】例えば伝送路に基準クロック信号が2系統
用意されている場合には、これらと1種類の伝送路信号
のそれぞれの異常検出部の検出結果の論理をとり、切替
部を切り替え制御すればよい。また、複数の伝送路信号
を受信している場合には、1つの局舎(例えばローカル
な局舎)の伝送路信号に異常が発生していても他の局舎
(例えば遠隔地の局舎)の伝送路信号は正常な場合が多
い。そこで、この正常な伝送路信号を基にしてクロック
信号を抽出すれば、基準クロック信号が正常に受信でき
ない場合にも位相同期発振部を正常に動作させることが
できる。
For example, when two systems of reference clock signals are prepared for the transmission line, the logics of the detection results of the abnormality detection units of these and one type of transmission line signal are taken and the switching unit is switched and controlled. Good. Also, when a plurality of transmission path signals are received, even if an abnormality occurs in the transmission path signal of one station (for example, a local station), another station (for example, a remote station) In many cases, the transmission line signal of) is normal. Therefore, if the clock signal is extracted based on this normal transmission line signal, the phase-locked oscillator can operate normally even when the reference clock signal cannot be received normally.

【0019】[0019]

【発明の効果】以上説明したように本発明によれば、外
部から入力される同期用の基準クロック信号の他に、伝
送路を通って受信される主信号等の伝送路信号から基準
クロック信号と同一周波数の抽出クロック信号を生成す
るようにしたので、基準クロック信号に異常が発生した
ような場合にも各伝送装置の位相がずれて装置間の信号
位相がずれてデータ誤りを発生させるという事態を回避
することができる。また、外部のクロック供給源が1つ
の系統のみであっても、実質的に複数系統とすることが
でき、装置の信頼性を向上させることができる。
As described above, according to the present invention, in addition to the reference clock signal for synchronization input from the outside, the reference clock signal from the transmission path signal such as the main signal received through the transmission path is received. Since an extracted clock signal with the same frequency as the above is generated, even if an abnormality occurs in the reference clock signal, the phase of each transmission device shifts and the signal phase between the devices shifts, causing a data error. The situation can be avoided. Further, even if the external clock supply source is only one system, it is possible to use a plurality of systems, and the reliability of the device can be improved.

【図面の簡単な説明】[Brief description of drawings]

【図1】本発明の一実施例における伝送装置の要部を示
すブロック図である。
FIG. 1 is a block diagram showing a main part of a transmission device according to an embodiment of the present invention.

【符号の説明】[Explanation of symbols]

11 基準クロック信号 12 基準クロック信号入力端子 13 伝送路信号 14 伝送路信号入力端子 15 切替部 16 第1の異常検出部 18 クロック抽出部 21 第2の異常検出部 24 切替制御部 291 〜29N 各種クロック信号11 Reference Clock Signal 12 Reference Clock Signal Input Terminal 13 Transmission Line Signal 14 Transmission Line Signal Input Terminal 15 Switching Section 16 First Abnormality Detection Section 18 Clock Extraction Section 21 Second Abnormality Detection Section 24 Switching Control Section 29 1 to 29 N Various clock signals

Claims (3)

【特許請求の範囲】[Claims] 【請求項1】 外部から入力される同期用の基準クロッ
ク信号が正常であるか否かを監視する基準クロック信号
監視手段と、 外部から受信する伝送路信号を入力して前記基準クロッ
クと同一周波数のクロック信号を抽出するクロック信号
抽出手段と、 このクロック信号抽出手段によって抽出された抽出クロ
ック信号が正常であるか否かを監視する抽出クロック信
号監視手段と、 前記基準クロック信号と抽出クロック信号を入力して一
のクロック信号の選択を行うクロック信号選択手段と、 前記基準クロック信号監視手段および抽出クロック信号
監視手段の監視結果を入力し正常なクロック信号が出力
されるように前記クロック信号選択手段の選択制御を行
わせるクロック信号選択制御手段とを具備することを特
徴とする伝送装置。
1. A reference clock signal monitoring means for monitoring whether or not a synchronization reference clock signal input from the outside is normal, and a transmission line signal received from the outside to input the same frequency as the reference clock. A clock signal extracting means for extracting the clock signal, an extracted clock signal monitoring means for monitoring whether the extracted clock signal extracted by the clock signal extracting means is normal, and the reference clock signal and the extracted clock signal. Clock signal selecting means for inputting and selecting one clock signal, and clock signal selecting means for inputting the monitoring results of the reference clock signal monitoring means and the extracted clock signal monitoring means and outputting a normal clock signal And a clock signal selection control means for controlling the selection of the transmission device.
【請求項2】 外部から入力される同期用の基準クロッ
ク信号が複数系統であり、前記クロック信号選択制御手
段はこれら複数系統の基準クロック信号と前記抽出クロ
ック信号の間でクロック信号の選択制御を行うことを特
徴とする請求項1記載の伝送装置。
2. The reference clock signals for synchronization input from the outside have a plurality of systems, and the clock signal selection control means controls the selection of clock signals between the plurality of systems of reference clock signals and the extracted clock signals. The transmission apparatus according to claim 1, which is performed.
【請求項3】 抽出クロック信号が局舎ごとの伝送路信
号によって作成される複数系統のクロック信号であるこ
とを特徴とする請求項2記載の伝送装置。
3. The transmission device according to claim 2, wherein the extracted clock signal is a clock signal of a plurality of systems created by a transmission line signal for each station.
JP5156893A 1993-06-28 1993-06-28 Transmission equipment Expired - Lifetime JP2596318B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP5156893A JP2596318B2 (en) 1993-06-28 1993-06-28 Transmission equipment

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP5156893A JP2596318B2 (en) 1993-06-28 1993-06-28 Transmission equipment

Publications (2)

Publication Number Publication Date
JPH0738548A true JPH0738548A (en) 1995-02-07
JP2596318B2 JP2596318B2 (en) 1997-04-02

Family

ID=15637703

Family Applications (1)

Application Number Title Priority Date Filing Date
JP5156893A Expired - Lifetime JP2596318B2 (en) 1993-06-28 1993-06-28 Transmission equipment

Country Status (1)

Country Link
JP (1) JP2596318B2 (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6765863B1 (en) 2000-02-28 2004-07-20 Fujitsu Limited Network system

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH01232848A (en) * 1988-03-14 1989-09-18 Nec Eng Ltd Subsequent synchronizing system
JPH0316441A (en) * 1989-06-14 1991-01-24 Fujitsu Ltd Slave synchronizing clock selection system
JPH05145533A (en) * 1991-11-21 1993-06-11 Nec Corp Transmission network subordinate synchronization system

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH01232848A (en) * 1988-03-14 1989-09-18 Nec Eng Ltd Subsequent synchronizing system
JPH0316441A (en) * 1989-06-14 1991-01-24 Fujitsu Ltd Slave synchronizing clock selection system
JPH05145533A (en) * 1991-11-21 1993-06-11 Nec Corp Transmission network subordinate synchronization system

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6765863B1 (en) 2000-02-28 2004-07-20 Fujitsu Limited Network system

Also Published As

Publication number Publication date
JP2596318B2 (en) 1997-04-02

Similar Documents

Publication Publication Date Title
US5357491A (en) Clock selection control device
US6618358B2 (en) Method and apparatus for switching a clock source from among multiple T1/E1 lines with user defined priority
JP2596318B2 (en) Transmission equipment
JPS6348928A (en) Clock control system for network synchronization
JPH03102933A (en) Synchronous clock selection circuit
US6999546B2 (en) System and method for timing references for line interfaces
EP0566586B1 (en) An oscillator unit with improved frequency stability
JPH09116425A (en) Clock supply circuit
JP4592982B2 (en) Clock switching circuit
US7468991B2 (en) Methods and devices for synchronizing the timing of logic cards in a packet switching system without data loss
JPS6226605B2 (en)
JPH05336095A (en) Clock frequency monitoring method for network synchronizing device
JP2000209243A (en) Monitoring system
KR200185362Y1 (en) A device of protecting system clock
KR200248512Y1 (en) Apparatus for clock phase locking between multiple phase-locked loop circuits
JPH11304972A (en) Reference frequency/timing generator
JPH0662481A (en) Synchronizing signal generating circuit for digital exchange
JP2616696B2 (en) Clock selection control method
KR100343929B1 (en) Apparatus for monitoring reference clock
JP2000138658A (en) Clock switching system
JPH10303898A (en) Alarm generator and alarm mask method at time of phase synchronization clock failure
JPH0595305A (en) Signal repeater
JPH03101416A (en) Clock supply switching circuit
JPH0697922A (en) Equipment fault detecting system
JPS61236240A (en) Clock selection system for decentralized type processing unit

Legal Events

Date Code Title Description
R250 Receipt of annual fees

Free format text: JAPANESE INTERMEDIATE CODE: R250

R250 Receipt of annual fees

Free format text: JAPANESE INTERMEDIATE CODE: R250

FPAY Renewal fee payment (prs date is renewal date of database)

Year of fee payment: 11

Free format text: PAYMENT UNTIL: 20071107

FPAY Renewal fee payment (prs date is renewal date of database)

Free format text: PAYMENT UNTIL: 20081107

Year of fee payment: 12

FPAY Renewal fee payment (prs date is renewal date of database)

Year of fee payment: 13

Free format text: PAYMENT UNTIL: 20091107

FPAY Renewal fee payment (prs date is renewal date of database)

Free format text: PAYMENT UNTIL: 20091107

Year of fee payment: 13

FPAY Renewal fee payment (prs date is renewal date of database)

Free format text: PAYMENT UNTIL: 20101107

Year of fee payment: 14

FPAY Renewal fee payment (prs date is renewal date of database)

Free format text: PAYMENT UNTIL: 20101107

Year of fee payment: 14

FPAY Renewal fee payment (prs date is renewal date of database)

Year of fee payment: 15

Free format text: PAYMENT UNTIL: 20111107

FPAY Renewal fee payment (prs date is renewal date of database)

Year of fee payment: 16

Free format text: PAYMENT UNTIL: 20121107

LAPS Cancellation because of no payment of annual fees