JPH0738112A - Semiconductor device, manufacture thereof and diamond thin film forming method - Google Patents

Semiconductor device, manufacture thereof and diamond thin film forming method

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Publication number
JPH0738112A
JPH0738112A JP18292093A JP18292093A JPH0738112A JP H0738112 A JPH0738112 A JP H0738112A JP 18292093 A JP18292093 A JP 18292093A JP 18292093 A JP18292093 A JP 18292093A JP H0738112 A JPH0738112 A JP H0738112A
Authority
JP
Japan
Prior art keywords
film
semiconductor
thin film
semiconductor film
semiconductor device
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP18292093A
Other languages
Japanese (ja)
Other versions
JP3430565B2 (en
Inventor
Mitsutoshi Miyasaka
光敏 宮坂
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Seiko Epson Corp
Original Assignee
Seiko Epson Corp
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Filing date
Publication date
Application filed by Seiko Epson Corp filed Critical Seiko Epson Corp
Priority to JP18292093A priority Critical patent/JP3430565B2/en
Publication of JPH0738112A publication Critical patent/JPH0738112A/en
Application granted granted Critical
Publication of JP3430565B2 publication Critical patent/JP3430565B2/en
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

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Abstract

PURPOSE:To form a thin film semiconductor device by conducting a pressure- reduced chemical vapor phase deposition method by differentiating the chemical composition of the semiconductor film for film thickness direction. CONSTITUTION:After a silicon dioxide film 202 and a source/drain region 203 have been formed on a substrate 201, an intrinsic silicon film is deposited using an LPCVD device, and then a silicon film is formed by implanting phosphoric ions. When the intrinsic silicon film, which becomes a source/drain region, is deposited by an LPCVD device, the intrinsic silicon film is preferentially oriented on a [220] surface perfectly. Then a semiconductor film 204, which becomes a transistor active layer, is deposited by the LPCVD device. Subsequently, when a silicon film is deposited as a first semiconductor film under the same condition as the intrinsic silicon film, the crystal condition of the first semiconductor film is preferentially oriented on the [220] surface. When the second semiconductor film is formed continuously without a break, the crystal condition is substantially oriented to [111] surface. When a channel part 205, which becomes an active layer, is formed by patterning, a semiconductor device of high mobility can be formed at a low temperature.

Description

【発明の詳細な説明】Detailed Description of the Invention

【0001】[0001]

【産業上の利用分野】本発明はアクティブマトリックス
液晶ディスプレイ等に適応される薄膜半導体装置及びダ
イヤモンド薄膜の形成方法に関する。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a thin film semiconductor device and a method for forming a diamond thin film, which are applicable to active matrix liquid crystal displays and the like.

【0002】[0002]

【従来の技術】近年、液晶ディスプレイの大画面化、高
解像度化に伴い、その駆動方式は単純マトリックス方式
からアクティブマトリックス方式へ移行し、大容量の情
報を表示出来るように成りつつ有る。アクティブマトリ
ックス方式は数十万を越える画素を有する液晶ディスプ
レイが可能で有り、各画素毎にスイッチングトランジス
タを形成するもので有る。各種液晶ディスプレイの基板
としては、透過型ディスプレイを可能ならしめる溶融石
英板やガラスなどの透明絶縁基板が使用されている。
2. Description of the Related Art In recent years, with the increase in screen size and resolution of liquid crystal displays, the drive system is shifting from the simple matrix system to the active matrix system, and it is becoming possible to display a large amount of information. The active matrix method enables a liquid crystal display having more than several hundred thousand pixels, and forms a switching transistor for each pixel. As a substrate for various liquid crystal displays, a transparent insulating substrate such as a fused silica plate or glass that enables a transmissive display is used.

【0003】しかしながら、表示画面の拡大化や低価格
化を進める場合には絶縁基板として安価な通常ガラスを
使用するのが必要不可欠で有る。従って、この経済性を
維持して尚、アクティブマトリックス方式の液晶ディス
プレイを動作させる薄膜トランジスタを安価なガラス基
板上に安定した性能で形成する事が可能な技術が望まれ
ていた。
However, in order to expand the display screen and reduce the price, it is essential to use inexpensive ordinary glass as an insulating substrate. Therefore, there has been a demand for a technique capable of forming a thin film transistor for operating an active matrix type liquid crystal display on an inexpensive glass substrate with stable performance while maintaining the economical efficiency.

【0004】薄膜トランジスタの能動層としては、通常
アモルファスシリコンや多結晶シリコンなどの半導体膜
が用いられるが、駆動回路まで一体化して薄膜トランジ
スタで形成しようとする場合には動作速度の速い多結晶
シリコンが有利である。
A semiconductor film such as amorphous silicon or polycrystalline silicon is usually used as an active layer of a thin film transistor. However, when a thin film transistor is to be integrated with a driving circuit, polycrystalline silicon having a high operating speed is advantageous. Is.

【0005】この様に通常のガラス基板上に多結晶シリ
コン膜等の半導体膜を能動層とする薄膜半導体装置を作
成する技術が求められているが、大型の通常ガラス基板
を用いる際には、基板の変形を避けるべく最高プロセス
温度を約570℃程度以下とする大きな制約が有る。即
ち低温プロセスで液晶ディスプレイを動作し得る薄膜ト
ランジスタと、駆動回路を高速作動し得る薄膜トランジ
スタの能動層を形成する技術が望まれている。
As described above, there is a demand for a technique for producing a thin film semiconductor device in which a semiconductor film such as a polycrystalline silicon film is used as an active layer on a normal glass substrate. However, when a large normal glass substrate is used, In order to avoid the deformation of the substrate, there is a big restriction that the maximum process temperature is about 570 ° C. or less. That is, a technique for forming a thin film transistor capable of operating a liquid crystal display in a low temperature process and an active layer of a thin film transistor capable of operating a driving circuit at high speed is desired.

【0006】従来LPCVD法で該半導体膜を堆積する
には、第一に、高真空型LPCVD装置を用いて堆積圧
力を1mtorr程度として、600℃程度の堆積温度にて
シリコン膜等の半導体膜を堆積していた。(Inter
national Electron Devices
Meeting 1991 technicaldi
gest p.559) その他の方法で能動層半導体膜を形成するには、第二の
方法として例えば絶縁基板上に570℃以下の温度で通
常型減圧CVD法によりアモルファスシリコン膜等の半
導体膜を堆積し、しかる後640℃以下の温度で24時
間程度の熱処理を施して結晶化した半導体膜を形成し、
薄膜トランジスタの特性を高めている(特開昭63−3
07776)。第三の方法はRFマグネトロン・スパッ
タリングやプラズマCVD法で300℃程度以下の温度
にてアモルファス・シリコン膜を堆積した後、各種レー
ザー照射を行う事でシリコン膜を形成し、薄膜トランジ
スタの能動層とするものである(Jpn.J.App
l.phys.28.P1871(1989)や電子情
報通信学会技術研究報告EID−88−58など)。
In order to deposit the semiconductor film by the conventional LPCVD method, first, a semiconductor film such as a silicon film is deposited at a deposition temperature of about 600 ° C. with a deposition pressure of about 1 mtorr using a high vacuum type LPCVD apparatus. It was deposited. (Inter
national Electron Devices
Meeting 1991 technicaldi
best p. 559) In order to form an active layer semiconductor film by another method, as a second method, for example, a semiconductor film such as an amorphous silicon film is deposited on an insulating substrate at a temperature of 570 ° C. or less by a normal type low pressure CVD method. Then, heat treatment is performed at a temperature of 640 ° C. or lower for about 24 hours to form a crystallized semiconductor film,
The characteristics of thin film transistors are improved (Japanese Patent Laid-Open No. 63-3 / 1988).
07777). The third method is to deposit an amorphous silicon film at a temperature of about 300 ° C. or lower by RF magnetron sputtering or plasma CVD method, and then irradiate various lasers to form a silicon film, which is used as an active layer of a thin film transistor. (Jpn.J.App
l. phys. 28 . P1871 (1989) and IEICE Technical Report EID-88-58).

【0007】これら従来技術にて堆積された半導体膜は
膜組成や結晶状態は膜厚に対して均一で有った。又、従
来ダイヤモンド薄膜はプラズマCVD法にて作成されて
いた。
The semiconductor film deposited by these conventional techniques had a uniform film composition and crystal state with respect to the film thickness. Further, conventionally, the diamond thin film has been formed by the plasma CVD method.

【0008】[0008]

【発明が解決しようとする課題】しかしながら、前述の
従来技術にはそれぞれ種々の問題が内在している。第二
のアモルファスシリコン膜を堆積した後、熱処理を施す
方法では熱処理温度がガラス基板を使用するには高過
ぎ、又この処理温度を600℃程度以下とした場合、処
理時間に数十時間以上費やし、やはりガラス基板を使用
し得ない。加えて第一の高真空型LPCVD法による製
造方法に比較して、製造工程が冗長と化し、生産性の低
下及び製品価格の上昇を招くと言った問題点が有る。第
三のシリコン膜を堆積した後レーザー照射を行う方法で
は、半導体特性のばらつきが大きく、大面積に均一に沢
山の薄膜半導体装置を作成し得ぬとの問題点が有る。加
えて第一の高真空型LPCVD法に比較すると、第二の
方法同様に製造工程が著しく煩雑冗長と化し、生産性の
低下や高価な加工装置の購入、製品価格の上昇を招くと
言った問題点が有る。
However, various problems are inherent in each of the above-mentioned prior arts. In the method of performing the heat treatment after depositing the second amorphous silicon film, the heat treatment temperature is too high to use the glass substrate, and if the treatment temperature is set to about 600 ° C. or less, the treatment time may take several tens of hours or more. , Again, glass substrates cannot be used. In addition, as compared with the first high vacuum LPCVD method, there is a problem that the manufacturing process becomes redundant, resulting in a decrease in productivity and an increase in product price. In the method of performing laser irradiation after depositing the third silicon film, there is a problem in that there are large variations in semiconductor characteristics, and it is not possible to produce many thin film semiconductor devices uniformly over a large area. In addition, as compared with the first high-vacuum LPCVD method, the manufacturing process is remarkably complicated and redundant as in the second method, resulting in a decrease in productivity, purchase of expensive processing equipment, and an increase in product price. There is a problem.

【0009】一方、従来の高真空型LPCVD法でシリ
コン膜等の半導体膜を形成する方法では、堆積温度を大
型の通常ガラスを問題なく使用し得る570℃程度以下
とした場合、半導体特性が不十分で有り高精細高画質液
晶ディスプレイのスイッチング素子や駆動回路用として
は未だ不適切であるとの問題点が有った。又、原料ガス
の分圧を下げて半導体膜を堆積すると高品質半導体膜が
得られると知られていたが、570℃程度以下の温度で
圧力を下げると膜が全く堆積されず、結局570℃程度
以下では高品質な半導体膜は得られないとの問題点が有
った。
On the other hand, in the conventional method for forming a semiconductor film such as a silicon film by the high vacuum LPCVD method, when the deposition temperature is set to about 570 ° C. or below at which large normal glass can be used without problems, the semiconductor characteristics are unsatisfactory. There is a problem that it is sufficient and still unsuitable for use as a switching element or a driving circuit of a high-definition, high-quality liquid crystal display. Further, it was known that a high quality semiconductor film can be obtained by depositing a semiconductor film by lowering the partial pressure of the source gas, but if the pressure is lowered at a temperature of about 570 ° C. or less, the film is not deposited at all and eventually 570 ° C. There was a problem that a high-quality semiconductor film could not be obtained below a certain level.

【0010】そこで本発明はこの様な諸問題点の解決を
目指し、その目的は良好な薄膜半導体装置の形成を大型
の通常ガラスを使用し得る570℃以下の温度でLPC
VD法のみで行うという簡略な方法を提供する事に有
る。更に従来ダイヤモンド薄膜はプラズマCVD法に依
り作成されており、微粒子(パーティクル)の発生や均
一性に対する問題等の課題が有った。そこで本発明の別
な目的はこれらの問題点の解決を目指し、ダイヤモンド
薄膜をLPCVD法で形成する方法を提供する事に有
る。
Therefore, the present invention aims to solve these problems, and an object thereof is to form a good thin film semiconductor device at a temperature of 570 ° C. or lower at which a large ordinary glass can be used.
The purpose is to provide a simple method in which only the VD method is used. Further, conventionally, the diamond thin film is formed by the plasma CVD method, and there are problems such as the generation of fine particles (particles) and the problem of uniformity. Therefore, another object of the present invention is to provide a method for forming a diamond thin film by LPCVD in order to solve these problems.

【0011】[0011]

【課題を解決するための手段】本発明は少なくとも表面
の一部が絶縁性物質で有る基板の該絶縁性物質上に半導
体膜を形成し、該半導体膜をトランジスタの能動層とし
ている薄膜半導体装置に於いて、該半導体膜の化学組成
が膜厚方向に対して異なっている事を特徴とする。
According to the present invention, a thin film semiconductor device in which a semiconductor film is formed on an insulating material of a substrate having at least a part of the surface made of an insulating material and the semiconductor film is used as an active layer of a transistor. In the above, the chemical composition of the semiconductor film is different in the film thickness direction.

【0012】又、本発明は少なくとも表面の一部が絶縁
性物質で有る基板の該絶縁性物質上に半導体膜を形成
し、該半導体膜をトランジスタの能動層としている薄膜
半導体装置に於いて、該半導体膜の結晶状態が膜厚方向
に対して異なっている事を特徴とする。
The present invention also provides a thin-film semiconductor device in which a semiconductor film is formed on the insulating material of a substrate, at least a part of the surface of which is an insulating material, and the semiconductor film serves as an active layer of a transistor. The crystalline state of the semiconductor film is different in the film thickness direction.

【0013】又、本発明は少なくとも表面の一部が絶縁
性物質で有る基板の該絶縁性物質上に半導体膜を形成
し、該半導体膜をトランジスタの能動層としている薄膜
半導体装置の製造方法に於いて、該半導体膜を減圧化学
気相堆積法(LPCVD法)にて堆積する際、原料物質
の少なくとも一種として該半導体膜を構成する半導体元
素を含有する化合物を使用し、第一半導体膜を堆積した
後連続して第一半導体膜堆積条件と異なった堆積条件に
て第二半導体膜を堆積して該半導体膜を形成する工程を
含む事を特徴とする。
The present invention also relates to a method of manufacturing a thin film semiconductor device in which a semiconductor film is formed on an insulating material of a substrate, at least a part of the surface of which is an insulating material, and the semiconductor film is used as an active layer of a transistor. At this time, when depositing the semiconductor film by a low pressure chemical vapor deposition method (LPCVD method), a compound containing a semiconductor element forming the semiconductor film is used as at least one of source materials, and a first semiconductor film is formed. The method is characterized by including a step of continuously depositing a second semiconductor film under different deposition conditions from the first semiconductor film deposition condition to form the semiconductor film.

【0014】又、本発明は少なくとも表面の一部が絶縁
性物質で有る基板の該絶縁性物質上にシリコンを含有し
た半導体膜を形成し、該半導体膜をトランジスタの能動
層としている薄膜半導体装置の製造方法に於いて、該半
導体膜を減圧化学気相堆積法(LPCVD法)にて堆積
する際、原料物質の少なくとも一種としてモノシラン
(SiH4)を使用し、該半導体膜堆積中にモノシラン
分圧が0.1mtorr以下となる工程を含む事を特徴
とする。
Further, according to the present invention, a thin film semiconductor device in which a semiconductor film containing silicon is formed on a substrate of which at least a part of the surface is made of an insulating material and the semiconductor film is used as an active layer of a transistor. In the method for manufacturing the semiconductor device, monosilane (SiH 4 ) is used as at least one of the raw materials when the semiconductor film is deposited by a low pressure chemical vapor deposition method (LPCVD method). It is characterized in that it includes a step in which the pressure is 0.1 mtorr or less.

【0015】又、本発明はダイヤモンド薄膜の形成方法
に於いて、該ダイヤモンド薄膜を減圧化学気相堆積法に
て堆積する際、原料ガスとしてシランとCH4を用い、
薄膜堆積中のシランに対するCH4の流量比が堆積の進
行と共に増加し、少なくとも堆積終了直前には100%
CH4が反応炉に導入されている事を特徴とする。
In the method for forming a diamond thin film according to the present invention, silane and CH 4 are used as source gases when the diamond thin film is deposited by a low pressure chemical vapor deposition method.
The flow rate ratio of CH 4 to silane during thin film deposition increases with the progress of deposition, and is 100% at least immediately before the end of deposition.
The feature is that CH 4 is introduced into the reactor.

【0016】[0016]

【実施例】(実施例1)図2(a)〜(e)はMIS型
電界効果トランジスタを形成する薄膜半導体装置の製造
工程を断面で示した図で有る。本実施例6ではノン・セ
ルフ・アライン型スタガード構造の薄膜半導体装置を例
として作成したが、これ以外にも本発明は逆スタガード
構造の薄膜半導体装置やセルフ・アライン型薄膜半導体
装置に関しても有効で有る。
(Embodiment 1) FIGS. 2A to 2E are sectional views showing a manufacturing process of a thin film semiconductor device for forming a MIS field effect transistor. In the sixth embodiment, a thin film semiconductor device having a non-self-aligned staggered structure is taken as an example, but other than this, the present invention is also effective for a thin film semiconductor device having an inverted staggered structure and a self-aligned thin film semiconductor device. There is.

【0017】本実施例1では基板201として235m
m□の石英ガラスを用いたが、シリコン膜堆積温度に耐
え得る基板で有るならば、基板の種類や大きさは無論問
われない。まず基板201上に常圧化学気相堆積法(A
PCVD法)やスパッター法などで下地保護膜となる二
酸化珪素膜(SiO2膜)202を形成し、次いでドナ
ー又はアクセプターとなる不純物を含んだシリコン膜を
形成後パターニングを行い、ソース・ドレイン領域20
3を作成する。(図2(a)) 本実施例1では、容積184.5lを有する高真空型L
PCVD装置を用いて、堆積温度555℃で真性シリコ
ン膜を1500Å程度堆積した後、不純物元素として燐
を選び、イオン注入法で燐を打ち込み、不純物を含んだ
シリコン膜を形成した。後にソース及びドレイン領域と
化す真性シリコン膜は高真空型LPCVD装置にて、原
料ガスで有るモノシラン(SiH4)を100SCCM流し
堆積温度555℃で4時間50分間堆積した。原料ガス
のSiH4を555℃の反応室に導入した直後の反応室
内圧力は1.21mtorrで有り、堆積が終了する直前の
原料ガス導入後4時間49分後には1.27mtorrとな
った。こうして得られた真性シリコン膜の膜厚は、15
65Åで有った。こうして得られたシリコン膜はX線回
折法によると、完全に{220}面に優先配向してい
た。引き続いてこの真性シリコン膜にバケット型質量非
分離型のイオン注入装置を用いて燐元素を添加した。原
料ガスとしては水素中に希釈された濃度5%のホスフィ
ンを用い、高周波出力38W、加速電圧80kVで5×
10151/cm2の濃度に打ち込んだ。その後窒素雰囲
気下350℃で1時間熱処理を施した所、こうして得ら
れた不純物を含んだシリコン膜のシート抵抗値は880
Ω/□で有った。この膜をパターニングしてソース・ド
レイン領域203が作成される。
In the first embodiment, the substrate 201 is 235 m.
Although quartz glass of m □ was used, the type and size of the substrate are not limited as long as the substrate can withstand the silicon film deposition temperature. First, the atmospheric pressure chemical vapor deposition method (A
A source / drain region 20 is formed by forming a silicon dioxide film (SiO 2 film) 202 serving as a base protection film by a PCVD method) or a sputtering method, and then forming a silicon film containing an impurity serving as a donor or an acceptor and then patterning it.
Create 3. (FIG. 2A) In the first embodiment, a high vacuum type L having a volume of 184.5 l
After depositing an intrinsic silicon film of about 1500 Å at a deposition temperature of 555 ° C. using a PCVD apparatus, phosphorus was selected as an impurity element and phosphorus was implanted by an ion implantation method to form a silicon film containing impurities. The intrinsic silicon film, which will later become the source and drain regions, was deposited in a high vacuum LPCVD apparatus at a deposition temperature of 555 ° C. for 4 hours and 50 minutes by flowing 100 silane of monosilane (SiH 4 ) as a source gas. The pressure in the reaction chamber immediately after introducing the source gas SiH 4 into the reaction chamber at 555 ° C. was 1.21 mtorr, and it was 1.27 mtorr 4 hours and 49 minutes after the introduction of the source gas immediately before the completion of deposition. The thickness of the intrinsic silicon film thus obtained is 15
It was 65Å. According to the X-ray diffraction method, the silicon film thus obtained was completely preferentially oriented in the {220} plane. Subsequently, phosphorus element was added to the intrinsic silicon film by using a bucket type mass non-separation type ion implanter. As a raw material gas, phosphine having a concentration of 5% diluted in hydrogen was used, and a high frequency output of 38 W and an acceleration voltage of 80 kV gave 5 ×.
Implanted to a density of 10 15 1 / cm 2 . After that, when heat treatment was performed at 350 ° C. for 1 hour in a nitrogen atmosphere, the sheet resistance value of the silicon film containing impurities thus obtained was 880.
It was Ω / □. The source / drain regions 203 are formed by patterning this film.

【0018】次に前述した同じ高真空型LPCVD装置
を用いてトランジスタの能動層となる半導体膜204を
堆積した。(図2(b))本実施例1では原料ガスとし
てSiH4を用い、堆積温度555℃でシリコン膜を堆
積した。基板は表側を下向きとして、400℃に保たれ
た反応室に挿入された。基板挿入後、ターボ分子ポンプ
の運転を開始し、定常回転に達した後、漏洩検査を2分
間施した。この時の脱ガス等の漏洩速度は3.9×10
-5torr/minで有った。その後挿入温度の400℃から堆
積温度の555℃迄一時間費やして昇温した。昇温の最
初の10分間は反応室にガスを全く導入せず、真空中で
昇温した。昇温開始後10分後の反応室到達最低背景圧
力は5.7×10-7torrで有った。又残り50分間の昇
温期間には純度99.9999%以上の窒素ガスを30
0SCCM流し続けた。この時の反応室内平衡圧力は3.0
×10-3torrで有った。
Next, using the same high vacuum type LPCVD apparatus as described above, a semiconductor film 204 to be an active layer of a transistor was deposited. (FIG. 2B) In Example 1, SiH 4 was used as a source gas, and a silicon film was deposited at a deposition temperature of 555 ° C. The substrate was inserted into the reaction chamber kept at 400 ° C. with the front side facing down. After inserting the substrate, the turbo molecular pump was started to operate, and after reaching a steady rotation, a leak test was performed for 2 minutes. The leak rate of degassing at this time is 3.9 × 10.
It was -5 torr / min. After that, the temperature was raised from the insertion temperature of 400 ° C. to the deposition temperature of 555 ° C. for one hour. During the first 10 minutes of heating, no gas was introduced into the reaction chamber and the temperature was raised in vacuum. The minimum background pressure reaching the reaction chamber 10 minutes after the start of temperature increase was 5.7 × 10 −7 torr. During the remaining 50 minutes of heating, nitrogen gas with a purity of 99.9999% or higher is used for 30 minutes.
I continued to flow 0 SCCM. At this time, the equilibrium pressure in the reaction chamber is 3.0.
It was × 10 -3 torr.

【0019】堆積温度到達後、原料ガスで有るSiH4
を100SCCM流し第一の半導体膜としてのシリコン
膜を30分間堆積した。原料SiH4を反応室に導入し
た直後の圧力は1.21mtorrで有り、原料ガスを
導入してから29分後の圧力は1.26mtorrで有
った。この間のモノシラン分圧は1.15mtorrで
有る。これは前述した後にソース及びドレイン領域と化
す真性シリコン膜の堆積と全く同じ条件で堆積してい
る。従ってこの第一の半導体膜としてのシリコン膜の結
晶状態は{220}面に優先配向している。堆積速度の
調査より、シリコン膜は30分間の堆積で70Å程度の
膜厚となっている。30分間に渡る第一の半導体膜を堆
積した後、間断を置かず連続して第二の半導体膜として
のシリコン膜を2時間5分間堆積した。この際、原料ガ
スであるSiH4を5SCCM反応室に導入し、更に希
釈ガスとして純度99.9999%以上の純窒素を29
5SCCM同時に流した。堆積中の全圧は3.02mt
orrで有ったから、ドルトンの分圧則を用いると、堆
積中のモノシラン分圧は50.3μtorr(0.05
03mtorr)と計算される。こうして第一の半導体
膜と第二の半導体膜を異なった条件で連続堆積して得ら
れたシリコン膜の膜厚は309Åで有った。又この膜を
X線回折法で分析した所、第一の半導体膜と第二の半導
体膜を合わせた半導体膜全体として{111}面、{2
20}面、{311}面からの各々の回折強度は927
9、4717、1942となり、{111}面に比較的
多く配向していた。第一の半導体膜は{220}面に完
全優先配向で有るから、第二の半導体膜は{111}面
に優先配向していると言える。即ち、得られたシリコン
膜の下層部70Å程度は{220}面に優先配向した結
晶状態で有り、上層部は{111}面に優先配向した結
晶状態で有る。次にこのシリコン膜をパターニングし、
トランジスタの能動層となるチャンネル部205を作成
した。(図2(c)) その後ECR−PECVD法やAPCVD法などでゲー
ト絶縁膜206を形成する。本実施例1ではゲート絶縁
膜としてSiO2膜を用い、ECR−PECVD法で1
500Åの膜厚に堆積した。(図2(d))引き続いて
ゲート電極207となる薄膜をスパッター法蒸着法或い
はCVD法などで堆積する。本実施例1ではゲート電極
材料としてクロム(Cr)を選択し、スパッター法で1
500Å堆積した。ゲート電極となる薄膜を堆積後パタ
ーニングを行い、更に層間絶縁膜208を5000Å堆
積した後、コンタクトホールを開け、ソース・ドレイン
取り出し電極209をスパッター法などで形成し、薄膜
半導体装置が完成する。(図2(e))この様にして試
作した薄膜半導体装置のトランジスタ特性を測定したと
ころ、ソース・ドレイン電圧Vds=4V,ゲート電圧
Vgs=10Vでトランジスタをオンさせた時のソース
・ドレイン電流Idsをオン電流IONと定義して、95
%の信頼係数でION=(2.62+0.23、−0.2
1)×10-6Aで有った。又、Vds=4V、Vgs=
0Vでトランジスタをオフさせた時のオフ電流はIOFF
=(0.045+0.018、−0.012)×10
-12Aで有った。ここで測定は温度25℃の元で、チャ
ンネル部の長さL=10μm、幅W=10μmのトラン
ジスタに対してなされた。飽和電流領域から求めた有効
電子移動度(J.Levinson et al.J,
Appl,Phys.53,1193’82)は、μ=
12.48±0.70cm2/v.secで有った。こ
の様に本発明に依り、高移動度を有し、ゲート電圧の1
0Vの変調に対してIdsが8桁近くも変動する窮めて
優良な薄膜半導体装置を工程最高温度を555℃以下
で、しかも工程最高温度に維持されている期間を数時間
以内とする低温工程で初めて現実化した。
After reaching the deposition temperature, SiH 4 which is a source gas
At 100 SCCM, and a silicon film as a first semiconductor film was deposited for 30 minutes. The pressure immediately after introducing the raw material SiH 4 into the reaction chamber was 1.21 mtorr, and the pressure 29 minutes after the introduction of the raw material gas was 1.26 mtorr. The monosilane partial pressure during this period is 1.15 mtorr. This is deposited under exactly the same conditions as the deposition of the intrinsic silicon film that will become the source and drain regions after being described above. Therefore, the crystalline state of the silicon film as the first semiconductor film is preferentially oriented to the {220} plane. From the investigation of the deposition rate, the silicon film has a thickness of about 70Å after 30 minutes of deposition. After depositing the first semiconductor film for 30 minutes, a silicon film as a second semiconductor film was continuously deposited for 2 hours and 5 minutes without a break. At this time, SiH 4 as a raw material gas was introduced into the 5SCCM reaction chamber, and pure nitrogen having a purity of 99.9999% or more was used as a diluting gas.
5 SCCM were run at the same time. Total pressure during deposition is 3.02 mt
Therefore, using Dalton's partial pressure law, the partial pressure of monosilane during deposition is 50.3 μtorr (0.05
03 mtorr). Thus, the film thickness of the silicon film obtained by continuously depositing the first semiconductor film and the second semiconductor film under different conditions was 309Å. Also, when this film was analyzed by an X-ray diffraction method, the whole semiconductor film including the first semiconductor film and the second semiconductor film was {111} plane, {2}
The diffraction intensity from each of the 20} plane and the {311} plane is 927.
9, 4717 and 1942, which were relatively oriented in the {111} plane. Since the first semiconductor film has a complete preferential orientation on the {220} plane, it can be said that the second semiconductor film has a preferential orientation on the {111} plane. That is, the lower layer portion 70Å of the obtained silicon film is in a crystalline state in which the {220} plane is preferentially oriented, and the upper layer portion is in a crystalline state in which the {111} plane is preferentially oriented. Next, pattern this silicon film,
A channel portion 205, which will be the active layer of the transistor, was created. (FIG. 2C) After that, the gate insulating film 206 is formed by the ECR-PECVD method or the APCVD method. In the first embodiment, a SiO 2 film is used as the gate insulating film, and the SiO 2 film is formed by ECR-PECVD
It was deposited to a film thickness of 500Å. (FIG. 2D) Subsequently, a thin film to be the gate electrode 207 is deposited by the sputter method vapor deposition method or the CVD method. In the first embodiment, chromium (Cr) is selected as the gate electrode material, and the sputtering method is used.
500Å accumulated. After depositing a thin film to be a gate electrode, patterning is performed, further 5000 Å of an interlayer insulating film 208 is deposited, contact holes are opened, and source / drain extraction electrodes 209 are formed by a sputtering method or the like to complete a thin film semiconductor device. (FIG. 2 (e)) Transistor characteristics of the thin film semiconductor device prototyped as described above were measured. Is defined as ON current ION, and 95
% Confidence coefficient ION = (2.62 + 0.23, -0.2
1) It was × 10 -6 A. Also, Vds = 4V, Vgs =
The off current when the transistor is turned off at 0V is IOFF
= (0.045 + 0.018, -0.012) * 10
-12 A. Here, the measurement was performed at a temperature of 25 ° C. for a transistor having a channel portion length L = 10 μm and a width W = 10 μm. Effective electron mobility (J. Levinson et al. J,
Appl, Phys. 53 , 1193'82) is μ =
12.48 ± 0.70 cm 2 / v. It was sec. Thus, according to the present invention, it has a high mobility and a gate voltage of 1
Ids fluctuate by about 8 digits for 0V modulation. A low temperature process in which a high quality thin film semiconductor device with a process maximum temperature of 555 ° C. or less is maintained for a few hours or less. It became a reality for the first time.

【0020】(実施例2)チャンネル部シリコン膜を堆
積する工程を除いてその他の工程は全て実施例1と同じ
工程で薄膜半導体装置を作成した。本実施例2ではチャ
ンネル部シリコン膜を堆積するのに堆積温度555℃
で、第一の半導体膜としてのシリコン膜は実施例1と同
条件で堆積したが、第二の半導体膜としてのシリコン膜
はシラン流量と希釈純窒素流量を10SCCMと290
SCCM、15SCCMと285SCCM、25SCC
Mと275SCCM、45SCCMと255SCCM、
70SCCMと230SCCMへと変化させて堆積し
た。この時の第二の半導体膜の堆積時間は順に1時間1
8分、1時間8分、55分、47分、40分で有った。
この結果第二の半導体膜としてのシリコン膜堆積中のモ
ノシラン分圧は其々0.100mtorr、0.150
mtorr、0.251mtorr、0.451mto
rr、0.701mtorrとなった。又得られたシリ
コン膜の膜厚は上記の順番で各々263Å、269Å、
264Å、276Å、272Åで有った。こうして堆積
されたシリコン膜を用いて実施例1と同じ工程で薄膜半
導体装置を作成し、トランジスタ特性を測定した。図1
には第二の半導体膜堆積中のモノシラン分圧に対して、
実施例1で定義したオン電流の値を図示して有る。図中
でのエラー・バーは95%の信頼係数に於ける区間推定
値を示している。この図よりモノシラン分圧が0.1m
torr以下になるとトランジスタ特性が明らかに著し
く向上する事が分かる。
Example 2 A thin film semiconductor device was manufactured by the same steps as in Example 1 except for the step of depositing a channel portion silicon film. In the second embodiment, the deposition temperature of 555 ° C. is used for depositing the channel portion silicon film.
The silicon film as the first semiconductor film was deposited under the same conditions as in Example 1, but the silicon film as the second semiconductor film had a silane flow rate and a diluted pure nitrogen flow rate of 10 SCCM and 290.
SCCM, 15SCCM and 285SCCM, 25SCC
M and 275 SCCM, 45 SCCM and 255 SCCM,
Deposition was performed by changing to 70 SCCM and 230 SCCM. At this time, the deposition time of the second semiconductor film is 1 hour 1
It was 8 minutes, 1 hour 8 minutes, 55 minutes, 47 minutes and 40 minutes.
As a result, the partial pressures of monosilane during the deposition of the silicon film as the second semiconductor film were 0.100 mtorr and 0.150, respectively.
mtorr, 0.251mtorr, 0.451mto
rr was 0.701 mtorr. The thickness of the obtained silicon film is 263Å, 269Å,
It was 264Å, 276Å, 272Å. Using the silicon film thus deposited, a thin film semiconductor device was prepared in the same process as in Example 1, and the transistor characteristics were measured. Figure 1
For the monosilane partial pressure during the second semiconductor film deposition,
The value of the on-current defined in Example 1 is illustrated. Error bars in the figure represent the interval estimates with a 95% confidence coefficient. From this figure, the monosilane partial pressure is 0.1 m
It can be seen that the transistor characteristics are significantly improved when the pressure is lower than torr.

【0021】(実施例3)実施例1及び実施例2で詳述
した本発明の優位性を明瞭とする為に従来技術との比較
を行う。本実施例3ではチャンネル部シリコン膜を堆積
する工程を除いてその他の工程は全て実施例1と同じ工
程で薄膜半導体装置を作成した。本実施例3ではチャン
ネル部シリコン膜を実施例1の第一の半導体膜を堆積す
る条件で堆積時間のみを変えて堆積した。即ち堆積温度
555℃で原料ガスで有るSiH4を100SCCM流
し、58分23秒間シリコン膜を堆積した。堆積開始直
後の反応室内圧力は1.21mtorrで、堆積終了直
前の圧力は1.27mtorrで有った。堆積中のモノ
シラン分圧は1.15mtorrで有る。得られたシリ
コン膜厚は199Åで有った。このシリコン膜は{22
0}面に優先配向した結晶状態に有り、膜厚に対してそ
の状態を変える事は無い。このシリコン膜を用いて実施
例1と同じ工程で薄膜半導体装置を作成した所、オン電
流は95%の信頼係数でION=(1.45+0.08、
−0.07)×10-6Aで有った。オン電流の定義及び
測定条件は実施例1と同一で有る。又、有効電子移動度
は、μ=9.30±0.39cm2/v・secで有っ
た。本実施例3と実施例1及び実施例2を比較すると、
チャンネル部シリコン膜を第一の半導体膜と第二の半導
体膜との多層構造にし、シリコン膜堆積過程でモノシラ
ン分圧を0.1mtorr以下とすると、トランジスタ
特性が著しく向上する事が理解される。実施例1及び2
では半導体膜を二層に分けたが、これは三層四層と多層
構造で有っても構わない。
(Embodiment 3) In order to clarify the superiority of the present invention described in Embodiment 1 and Embodiment 2, comparison with the prior art will be made. In the third embodiment, the thin film semiconductor device is manufactured by the same steps as the first embodiment except for the step of depositing the channel portion silicon film. In the third embodiment, the channel portion silicon film was deposited under the conditions for depositing the first semiconductor film of the first embodiment, except for the deposition time. That is, at a deposition temperature of 555 ° C., SiH 4 as a raw material gas was flowed at 100 SCCM to deposit a silicon film for 58 minutes and 23 seconds. The pressure inside the reaction chamber immediately after the start of deposition was 1.21 mtorr, and the pressure immediately before the end of deposition was 1.27 mtorr. The monosilane partial pressure during deposition is 1.15 mtorr. The silicon film thickness obtained was 199Å. This silicon film is {22
The crystalline state is preferentially oriented on the 0} plane, and the state does not change with the film thickness. When a thin film semiconductor device was manufactured using this silicon film in the same process as in Example 1, the on-current was 95% with a reliability coefficient of ION = (1.45 + 0.08,
It was −0.07) × 10 −6 A. The definition of the on-current and the measurement conditions are the same as in Example 1. The effective electron mobility was μ = 9.30 ± 0.39 cm 2 / v · sec. Comparing Example 3 with Example 1 and Example 2,
It is understood that when the channel portion silicon film has a multi-layer structure of the first semiconductor film and the second semiconductor film and the monosilane partial pressure is 0.1 mtorr or less in the silicon film deposition process, the transistor characteristics are remarkably improved. Examples 1 and 2
Then, the semiconductor film is divided into two layers, but this may have a multilayer structure of three layers and four layers.

【0022】次に堆積温度が555℃と比較的低温でし
かも数時間の熱工程で良好な薄膜半導体装置を作成する
には本発明が必要不可欠で有る事を説明する。実施例2
に詳述した様にモノシラン分圧が0.1mtorr以下
としてチャンネル部シリコン膜を堆積して薄膜半導体装
置を作成すると良好な特性を示すが、これは本発明の多
層構造の半導体膜及び多段階堆積に依ってのみ実現化可
能なので有る。実際、実施例1及び2で利用した同じ高
真空型LPCVD装置にて、下地保護膜となる二酸化珪
素膜(SiO2膜)の付いた石英ガラス基板に堆積温度
555℃でモノシラン流量10SCCM、希釈純窒素流
量290SCCM、モノシラン分圧0.100mtor
rにて、2時間堆積を試みたが、シリコン膜は全く何も
堆積されなかった。即ち、モノシラン分圧が非常に低い
と良質なシリコン膜が堆積されて、良好な特性を有する
薄膜半導体装置が作成される可能性は有るものの、従来
の単一堆積方法ではシリコン膜はその実全く堆積されな
いので有る。良質な半導体膜を極低圧に依り堆積形成す
る為には、本発明に依る連続多層堆積が唯一有効な手段
で有り、本発明に依って初めて実現されるので有る。本
実施例では堆積温度を555℃とし、原料ガスとしてモ
ノシランを用いたが、堆積温度や原料ガスに関係なく良
質な半導体膜をLPCVD法で得るには極低圧堆積が好
ましく、その堆積を実現したり、或いは堆積時間を短縮
するには、まず第一の半導体膜を堆積した後、第二の半
導体膜を連続堆積する堆積方法が効果的で有る。これは
一般に極低圧堆積を試みると、いわゆる`インキュベイ
ション・タイム’と呼ばれる堆積の全く生じない時間が
存在するからで有る。このインキュベイション・タイム
は堆積圧力が低くなるにつれて長くなる傾向に有る。前
述した例では555℃、モノシラン分圧0.100mt
orrではインキュベイション・タイムは2時間以上で
有る。従って良質な半導体膜を現実的な堆積時間で堆積
したり、工程生産能力を高める為には第一の半導体膜を
堆積した後、高品質膜を堆積出来る条件で高品質な第二
の半導体膜を堆積する事に依り半導体膜を形成するのが
唯一有効な方法なので有る。従ってこの時、第一の半導
体膜と第二の半導体膜で化学組成が異なっていたり、結
晶状態が違っているのが普通で有る。この件に関して別
な実施例で説明する。
Next, it will be explained that the present invention is indispensable for producing a good thin film semiconductor device with a relatively low deposition temperature of 555 ° C. and a thermal process of several hours. Example 2
As described in detail in 1., good characteristics are obtained when a thin film semiconductor device is manufactured by depositing a channel silicon film with a partial pressure of monosilane of 0.1 mtorr or less. It can be realized only by In fact, in the same high vacuum type LPCVD apparatus used in Examples 1 and 2, a deposition temperature of 555 ° C., a monosilane flow rate of 10 SCCM, and a pure dilution were applied to a quartz glass substrate having a silicon dioxide film (SiO 2 film) as a base protection film. Nitrogen flow rate 290SCCM, monosilane partial pressure 0.100mtor
Attempting to deposit for 2 hours at r, no silicon film was deposited at all. That is, if the monosilane partial pressure is extremely low, a good-quality silicon film may be deposited, and a thin-film semiconductor device having good characteristics may be created. It is not done. The continuous multilayer deposition according to the present invention is the only effective means for depositing and forming a good-quality semiconductor film at an extremely low pressure, and is realized only for the first time by the present invention. In this embodiment, the deposition temperature was set to 555 ° C. and monosilane was used as the source gas. However, ultra-low pressure deposition is preferable to obtain a good quality semiconductor film by the LPCVD method regardless of the deposition temperature and the source gas. Alternatively, in order to shorten the deposition time, a deposition method of first depositing the first semiconductor film and then continuously depositing the second semiconductor film is effective. This is because, generally, when ultra low pressure deposition is attempted, there is a so-called "incubation time" at which no deposition occurs. This incubation time tends to increase as the deposition pressure decreases. In the above example, 555 ° C., monosilane partial pressure 0.100 mt
At orr, the incubation time is more than 2 hours. Therefore, in order to deposit a good-quality semiconductor film in a realistic deposition time, or to enhance the process productivity, after depositing the first semiconductor film, a high-quality second semiconductor film is deposited under the condition that a high-quality film can be deposited. The only effective method is to form a semiconductor film by depositing. Therefore, at this time, it is usual that the first semiconductor film and the second semiconductor film have different chemical compositions or crystal states. This matter will be described in another embodiment.

【0023】(実施例4)チャンネル部シリコン膜を堆
積する工程を除いてその他の工程は全て実施例1と同じ
工程で薄膜半導体装置を作成した。本実施例4では実施
例1で詳述した高真空型LPCVD装置を用いてチャン
ネル部となる半導体膜を堆積した。堆積温度は550℃
で第一の半導体膜としてシリコン・ゲルマニウム膜を堆
積した。原料ガスとしてはSiH4を85SCCM流
し、同時にGeH4を15SCCM流した。堆積時間は
20分間で堆積開始直後の圧力は1.21mtorr、
堆積終了直前の圧力は1.30mtorrで有った。シ
リコン・ゲルマニウム膜はこの第一の堆積で約70Åの
膜厚となる。この第一の半導体膜堆積後、間断を置かず
連続して第二の半導体膜としてのシリコン膜を1時間2
7分堆積した。堆積温度は550℃でSiH4を10S
CCM、純窒素を290SCCM流した。第二の半導体
膜堆積中の全圧とシラン分圧は其々3.01mtorr
と0.100mtorrで有った。得られた半導体膜は
膜厚275Åを有し、下層はシリコン・ゲルマニウム膜
で上層はシリコン膜で有る。この半導体膜は多結晶状態
に有った。こうして得られた二層構造の半導体膜を用い
て実施例1と同じ工程で薄膜半導体装置を作成し、トラ
ンジスタ特性を測定した所、実施例1で定義したオン電
流は95%の信頼係数でION=(2.75+0.31、
−0.30)×10-6Aと実施例3で示した従来の薄膜
半導体装置よりも堆積温度を下げ、かつ高特性を示し
た。尚本実施例4で堆積した下層に位置するシリコン・
ゲルマニウムは化学組成式Si1-xGexで表現した時x
の値はおよそ0.25で有る。本実施例4ではチャンネ
ル部を下層のSi0.75Ge0.25膜と上層のSi膜の二層
としたが、多層にする事も可能で有る。例えばチャンネ
ル部を五層構造とし、最下層をGe膜、下から二番目の
層をSi0.25Ge0.75膜、下から三番目の層をSi0.5
Ge0.5膜、下から四番目をSi0.75Ge0.25膜、最上
層をSi膜としても良い。更には層数や各層に於ける化
学組成は自由に設定し得る。又、層と層との境界は必ず
しも明瞭で有る必要も無く、膜厚方向に対して連続的に
化学組成や結晶状態が変化していても構わない。本実施
例4では550℃程度と比較的低温でも容易に結晶堆積
するシリコン・ゲルマニウム膜を下層に用い上層にオフ
・リーク電流が少なく、トランジスタ特性の安定な多結
晶シリコンを連続で極低圧堆積して従来よりも低温で高
性能な薄膜半導体装置を作成した。チャンネル部の特性
には、本実施例の様に薄膜の場合、膜厚全体が帰与する
為、下層膜も出来る限り高品質で有る事が望ましく、5
50℃でも容易に結晶堆積されるシリコン・ゲルマニウ
ムは550℃で結晶堆積されにくいシリコン膜よりも好
ましい。しかしながら大量生産や安全性、公害等の問題
を考えた時には、下層膜はシリコン膜で有っても構わな
い。この様にその目的に応じて半導体膜の化学組成や結
晶構造は変更し得る。
Example 4 A thin film semiconductor device was manufactured by the same steps as in Example 1 except for the step of depositing a channel portion silicon film. In Example 4, the high vacuum LPCVD apparatus described in Example 1 was used to deposit a semiconductor film to be a channel portion. Deposition temperature is 550 ° C
Then, a silicon-germanium film was deposited as the first semiconductor film. As a source gas, SiH 4 was flowed at 85 SCCM, and GeH 4 was flowed at 15 SCCM at the same time. The deposition time was 20 minutes, and the pressure immediately after the start of deposition was 1.21 mtorr.
The pressure immediately before the end of deposition was 1.30 mtorr. The silicon-germanium film has a thickness of about 70Å in this first deposition. After depositing the first semiconductor film, the silicon film as the second semiconductor film is continuously formed for 2 hours without interruption.
Deposited for 7 minutes. Deposition temperature is 550 ° C and SiH 4 is 10S
CCM and pure nitrogen were flown at 290 SCCM. The total pressure and the silane partial pressure during the deposition of the second semiconductor film are 3.01 mtorr each.
And 0.100 mtorr. The obtained semiconductor film has a film thickness of 275Å, the lower layer is a silicon-germanium film and the upper layer is a silicon film. This semiconductor film was in a polycrystalline state. Using the thus obtained double-layered semiconductor film, a thin-film semiconductor device was manufactured in the same process as in Example 1, and the transistor characteristics were measured. As a result, the on-current defined in Example 1 was ION with a 95% reliability coefficient. = (2.75 + 0.31,
-0.30) × 10 −6 A, which was lower than the conventional thin film semiconductor device shown in Example 3 and showed high characteristics. In addition, the lower layer of silicon deposited in Example 4
Germanium is represented by the chemical composition formula Si 1-x Ge x x
The value of is approximately 0.25. In the fourth embodiment, the channel portion has two layers of the lower layer Si 0.75 Ge 0.25 film and the upper layer Si film, but it is also possible to have a multi-layer structure. For example, the channel part has a five-layer structure, the bottom layer is a Ge film, the second layer from the bottom is a Si 0.25 Ge 0.75 film, and the third layer from the bottom is a Si 0.5 layer.
The Ge 0.5 film, the fourth from the bottom may be the Si 0.75 Ge 0.25 film, and the uppermost layer may be the Si film. Furthermore, the number of layers and the chemical composition in each layer can be freely set. Further, the boundary between layers does not necessarily have to be clear, and the chemical composition and crystal state may continuously change in the film thickness direction. In Example 4, a silicon-germanium film, which is easily crystallized at a relatively low temperature of about 550 ° C., is used as a lower layer, and polycrystalline silicon having stable off-leakage current and low transistor leakage characteristics is continuously deposited at a very low pressure. A high-performance thin-film semiconductor device was created at a lower temperature than before. In the case of a thin film as in the present embodiment, the entire film thickness is attributed to the characteristics of the channel portion, and therefore it is desirable that the lower layer film also has as high quality as possible.
Silicon-germanium, which is easily crystallized even at 50 ° C., is preferable to a silicon film which is hard to crystallize at 550 ° C. However, when considering problems such as mass production, safety, and pollution, the lower layer film may be a silicon film. Thus, the chemical composition and crystal structure of the semiconductor film can be changed according to the purpose.

【0024】その他最下層にシリコン膜を用い、上に行
くに従いシリコン膜からシリコン・カーバイト(Si
1-xx)へと連続的に変化し、最下層ではダイヤモンド
膜とする事も可能で有る。この場合、LPCVD炉には
原料ガスとしてSiH4とCH4等が用いられ、半導体膜
堆積の初期はSiH4のみが反応炉に導入され、少しず
つCH4のSiH4に対する流量比を増やし、最終的には
炉内にCH4のみを導入してダイヤモンド膜を作成す
る。こうした堆積中CH4の流量の増加と共に堆積温度
や圧力を変化させると反応効率や堆積半導体膜の品質を
高める事が出来る。具体的にはCH4の流量の増加と共
に、堆積温度を上げて行く事が好ましい。或いはCH4
流量の増加に伴い、堆積圧力を下げて行く事も好まし
い。無論両者を同時に施しても構わない。こうした堆積
方法に依ると、SP3混成軌道をを有する下層のシリコ
ン膜の状態を上層に堆積される膜が受け継ぎ、容易にダ
イヤモンド薄膜が堆積される訳で有る。実施例1、2等
では堆積条件を突然変更する事で下層と上層とで異なっ
た半導体膜を堆積して良好な薄膜半導体装置を得たが、
ここでは堆積条件を連続的に変える事に依り、ダイヤモ
ンド薄膜を容易に得るので有る。又、本実施例4では絶
縁性基板上へのダイヤモンド薄膜の形成を試みた為、最
下層はSiH4の熱分解に依る多結晶シリコン膜で有っ
たが、基板として単結晶シリコン基板を用いる場合、堆
積の初期よりSiH4とCH4の混合ガスを反応炉に導入
し、徐々にCH4の流量を増加させても良い。これに依
りLPCVD法でパーティクルの発生無く均一なダイヤ
モンド薄膜が得られる。
In addition, a silicon film is used as the lowermost layer, and the silicon film is changed to silicon carbide (Si
It continuously changes to 1-x C x ), and it is possible to use a diamond film as the lowermost layer. In this case, SiH 4 and CH 4 etc. are used as source gases in the LPCVD furnace, and only SiH 4 is introduced into the reaction furnace at the initial stage of semiconductor film deposition, and the flow rate ratio of CH 4 to SiH 4 is gradually increased until the final deposition. Specifically, only CH 4 is introduced into the furnace to form a diamond film. The reaction efficiency and the quality of the deposited semiconductor film can be improved by changing the deposition temperature and pressure as the flow rate of CH 4 increases during the deposition. Specifically, it is preferable to raise the deposition temperature as the flow rate of CH 4 increases. Or CH 4
It is also preferable to lower the deposition pressure as the flow rate increases. Of course, both may be applied at the same time. According to such a deposition method, the film deposited on the upper layer inherits the state of the lower silicon film having the SP3 hybrid orbit, and the diamond thin film is easily deposited. In Examples 1 and 2 and the like, different semiconductor films were deposited in the lower layer and the upper layer by suddenly changing the deposition conditions to obtain a good thin film semiconductor device.
Here, the diamond thin film can be easily obtained by continuously changing the deposition conditions. In addition, since the diamond thin film was formed on the insulating substrate in Example 4, the lowermost layer was a polycrystalline silicon film formed by thermal decomposition of SiH 4 , but a single crystal silicon substrate was used as the substrate. In this case, a mixed gas of SiH 4 and CH 4 may be introduced into the reaction furnace from the initial stage of deposition to gradually increase the flow rate of CH 4 . Due to this, a uniform diamond thin film can be obtained by the LPCVD method without the generation of particles.

【0025】[0025]

【発明の効果】以上述べて来た様に本発明に依れば、多
結晶シリコン膜等からなる高品質半導体膜を570℃程
度以下の低温で容易に形成せしめ、以て薄膜半導体装置
の特性を飛躍的に向上させ、且つ製造時間の短縮・安定
的大量生産を実現した。これに依り、本発明をアクティ
ブ・マトリックス液晶ディスプレイなどに適応した場
合、安価なガラス基板などが使用できる様になり、又他
の電子装置に適応した場合も熱による素子劣化などを低
減する。かくして本発明はアクティブ・マトリックス液
晶ディスプレイ装置や、集積回路等の電子装置の高性能
化や低価格化を実現するという多大な効果を有する。
又、本発明によりダイヤモンド薄膜をLPCVD法に依
り容易に形成し得るとの効果を有する。
As described above, according to the present invention, a high quality semiconductor film made of a polycrystalline silicon film or the like can be easily formed at a low temperature of about 570 ° C. or less, and the characteristics of a thin film semiconductor device can be obtained. Has been dramatically improved, the manufacturing time has been shortened, and stable mass production has been realized. Accordingly, when the present invention is applied to an active matrix liquid crystal display or the like, an inexpensive glass substrate or the like can be used, and also when applied to other electronic devices, element deterioration due to heat is reduced. Thus, the present invention has the great effect of realizing high performance and low cost of electronic devices such as active matrix liquid crystal display devices and integrated circuits.
Further, the present invention has an effect that a diamond thin film can be easily formed by the LPCVD method.

【図面の簡単な説明】[Brief description of drawings]

【図1】 本発明の効果を示す図。FIG. 1 is a diagram showing an effect of the present invention.

【図2】 (a)〜(e)は本発明の一実施例を示す薄
膜半導体装置製造の各工程に於ける素子断面図。
2A to 2E are cross-sectional views of elements in respective steps of manufacturing a thin film semiconductor device showing an embodiment of the present invention.

【符号の説明】 201…基板 202…下地保護膜 203…ソース・ドレイン領域 204…半導体膜 205…チャンネル部 206…ゲート絶縁膜 207…ゲート電極 208…層間絶縁膜 209…ソース・ドレイン取り出し電極[Explanation of reference numerals] 201 ... Substrate 202 ... Underlayer protection film 203 ... Source / drain region 204 ... Semiconductor film 205 ... Channel portion 206 ... Gate insulating film 207 ... Gate electrode 208 ... Interlayer insulating film 209 ... Source / drain extraction electrode

Claims (9)

【特許請求の範囲】[Claims] 【請求項1】 少なくとも表面の一部が絶縁性物質で有
る基板の該絶縁性物質上に半導体膜を形成し、該半導体
膜をトランジスタの能動層としている薄膜半導体装置に
於いて、 該半導体膜の化学組成が膜厚方向に対して異なっている
事を特徴とする薄膜半導体装置。
1. A thin film semiconductor device in which a semiconductor film is formed on an insulating material of a substrate, at least a part of the surface of which is an insulating material, and the semiconductor film serves as an active layer of a transistor. Thin film semiconductor device characterized by having different chemical composition in the film thickness direction.
【請求項2】 少なくとも表面の一部が絶縁性物質で有
る基板の該絶縁性物質上に半導体膜を形成し、該半導体
膜をトランジスタの能動層としている薄膜半導体装置に
於いて、 該半導体膜の結晶状態が膜厚方向に対して異なっている
事を特徴とする薄膜半導体装置。
2. A thin film semiconductor device in which a semiconductor film is formed on an insulating material of a substrate, at least a part of the surface of which is an insulating material, and the semiconductor film serves as an active layer of a transistor. The thin film semiconductor device is characterized in that the crystal state of is different in the film thickness direction.
【請求項3】 少なくとも表面の一部が絶縁性物質で有
る基板の該絶縁性物質上に半導体膜を形成し、該半導体
膜をトランジスタの能動層としている薄膜半導体装置の
製造方法に於いて、 該半導体膜を減圧化学気相堆積法(LPCVD法)にて
堆積する際、原料物質の少なくとも一種として該半導体
膜を構成する半導体元素を含有する化合物を使用し、第
一半導体膜を堆積した後連続して第一半導体膜堆積条件
と異なった堆積条件にて第二半導体膜を堆積して該半導
体膜を形成する工程を含む事を特徴とする薄膜半導体装
置の製造方法。
3. A method of manufacturing a thin film semiconductor device, wherein a semiconductor film is formed on the insulating material of a substrate, at least a part of the surface of which is an insulating material, and the semiconductor film serves as an active layer of a transistor. When the semiconductor film is deposited by the low pressure chemical vapor deposition method (LPCVD method), a compound containing a semiconductor element forming the semiconductor film is used as at least one of the source materials, and after depositing the first semiconductor film. A method of manufacturing a thin film semiconductor device, comprising the step of continuously depositing a second semiconductor film under a deposition condition different from the first semiconductor film deposition condition to form the semiconductor film.
【請求項4】 第二半導体膜を形成する際、半導体元素
を含有する化合物の分圧が第一半導体膜を堆積する時の
該分圧よりも低い事を特徴とする請求項3記載の薄膜半
導体装置の製造方法。
4. The thin film according to claim 3, wherein when forming the second semiconductor film, the partial pressure of the compound containing a semiconductor element is lower than the partial pressure when depositing the first semiconductor film. Manufacturing method of semiconductor device.
【請求項5】 半導体膜を構成する半導体元素の一種と
してシリコンが用いられ、半導体元素を含有する化合物
の一種としてシラン(Sin2n+2:n=1,2,3
…)が用いられている事を特徴とする請求項3記載の薄
膜半導体装置の製造方法。
5. Silicon is used as one of the semiconductor elements constituting the semiconductor film, and silane (Si n H 2n + 2 : n = 1, 2, 3) is used as one of the compounds containing the semiconductor element.
The manufacturing method of the thin film semiconductor device according to claim 3, wherein
【請求項6】 第二半導体膜を堆積する際のシラン分圧
が、第一半導体膜を堆積する時のシラン分圧よりも低い
事を特徴とする請求項5記載の薄膜半導体装置の製造方
法。
6. The method of manufacturing a thin film semiconductor device according to claim 5, wherein the silane partial pressure when depositing the second semiconductor film is lower than the silane partial pressure when depositing the first semiconductor film. .
【請求項7】 少なくとも表面の一部が絶縁性物質で有
る基板の該絶縁性物質上にシリコンを含有した半導体膜
を形成し、該半導体膜をトランジスタの能動層としてい
る薄膜半導体装置の製造方法に於いて、 該半導体膜を減圧化学気相堆積法(LPCVD法)にて
堆積する際、原料物質の少なくとも一種としてモノシラ
ン(SiH4)を使用し、該半導体膜堆積中にモノシラ
ン分圧が0.1mtorr以下となる工程を含む事を特
徴とする薄膜半導体装置の製造方法。
7. A method of manufacturing a thin film semiconductor device, wherein a semiconductor film containing silicon is formed on a substrate of which at least a part of the surface is made of an insulating material, and the semiconductor film is used as an active layer of a transistor. In this case, when the semiconductor film is deposited by the low pressure chemical vapor deposition method (LPCVD method), monosilane (SiH 4 ) is used as at least one kind of the raw material, and the monosilane partial pressure is 0 during the semiconductor film deposition. A method of manufacturing a thin film semiconductor device, which comprises a step of 1 mtorr or less.
【請求項8】 第二半導体膜を堆積する際のモノシラン
分圧が0.1mtorr以下である事を特徴とする請求
項6記載の薄膜半導体装置の製造方法。
8. The method of manufacturing a thin film semiconductor device according to claim 6, wherein the partial pressure of monosilane at the time of depositing the second semiconductor film is 0.1 mtorr or less.
【請求項9】 ダイヤモンド薄膜の形成方法に於いて、
該ダイヤモンド薄膜を減圧化学気相堆積法にて堆積する
際、原料ガスとしてシランとCH4を用い、薄膜堆積中
のシランに対するCH4の流量比が堆積の進行と共に増
加し、少なくとも堆積終了直前には100%CH4が反
応炉に導入されている事を特徴とするダイヤモンド薄膜
の形成方法。
9. A method for forming a diamond thin film, comprising:
When depositing the diamond thin film by low pressure chemical vapor deposition, silane and CH 4 are used as source gases, and the flow rate ratio of CH 4 to silane during the thin film deposition increases with the progress of deposition, and at least immediately before the end of deposition. Is a method for forming a diamond thin film, wherein 100% CH 4 is introduced into the reaction furnace.
JP18292093A 1993-07-23 1993-07-23 Thin film semiconductor device and method of manufacturing the same Expired - Lifetime JP3430565B2 (en)

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Country Link
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Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2002033738A1 (en) * 2000-10-16 2002-04-25 Hitachi, Ltd. Semiconductor device and method of manufacture thereof
CN100401529C (en) * 2003-12-12 2008-07-09 株式会社神户制钢所 Diamond semiconductor device and method for manufacturing the same

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2002033738A1 (en) * 2000-10-16 2002-04-25 Hitachi, Ltd. Semiconductor device and method of manufacture thereof
CN100401529C (en) * 2003-12-12 2008-07-09 株式会社神户制钢所 Diamond semiconductor device and method for manufacturing the same

Also Published As

Publication number Publication date
JP3430565B2 (en) 2003-07-28

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