JPH0737146B2 - Thin film thermal head - Google Patents

Thin film thermal head

Info

Publication number
JPH0737146B2
JPH0737146B2 JP61047458A JP4745886A JPH0737146B2 JP H0737146 B2 JPH0737146 B2 JP H0737146B2 JP 61047458 A JP61047458 A JP 61047458A JP 4745886 A JP4745886 A JP 4745886A JP H0737146 B2 JPH0737146 B2 JP H0737146B2
Authority
JP
Japan
Prior art keywords
thin film
thermal head
heating resistor
polycrystalline silicon
drive circuit
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
JP61047458A
Other languages
Japanese (ja)
Other versions
JPS62204964A (en
Inventor
正典 八木野
久雄 林
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Sony Corp
Original Assignee
Sony Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sony Corp filed Critical Sony Corp
Priority to JP61047458A priority Critical patent/JPH0737146B2/en
Priority to CA000531211A priority patent/CA1283693C/en
Priority to KR870001956A priority patent/KR870008706A/en
Priority to EP87103260A priority patent/EP0235827B1/en
Priority to DE87103260T priority patent/DE3786935T2/en
Publication of JPS62204964A publication Critical patent/JPS62204964A/en
Publication of JPH0737146B2 publication Critical patent/JPH0737146B2/en
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • BPERFORMING OPERATIONS; TRANSPORTING
    • B41PRINTING; LINING MACHINES; TYPEWRITERS; STAMPS
    • B41JTYPEWRITERS; SELECTIVE PRINTING MECHANISMS, i.e. MECHANISMS PRINTING OTHERWISE THAN FROM A FORME; CORRECTION OF TYPOGRAPHICAL ERRORS
    • B41J2/00Typewriters or selective printing mechanisms characterised by the printing or marking process for which they are designed
    • B41J2/315Typewriters or selective printing mechanisms characterised by the printing or marking process for which they are designed characterised by selective application of heat to a heat sensitive printing or impression-transfer material
    • B41J2/32Typewriters or selective printing mechanisms characterised by the printing or marking process for which they are designed characterised by selective application of heat to a heat sensitive printing or impression-transfer material using thermal heads
    • B41J2/335Structure of thermal heads
    • B41J2/33505Constructional details
    • B41J2/33515Heater layers
    • BPERFORMING OPERATIONS; TRANSPORTING
    • B41PRINTING; LINING MACHINES; TYPEWRITERS; STAMPS
    • B41JTYPEWRITERS; SELECTIVE PRINTING MECHANISMS, i.e. MECHANISMS PRINTING OTHERWISE THAN FROM A FORME; CORRECTION OF TYPOGRAPHICAL ERRORS
    • B41J2/00Typewriters or selective printing mechanisms characterised by the printing or marking process for which they are designed
    • B41J2/315Typewriters or selective printing mechanisms characterised by the printing or marking process for which they are designed characterised by selective application of heat to a heat sensitive printing or impression-transfer material
    • B41J2/32Typewriters or selective printing mechanisms characterised by the printing or marking process for which they are designed characterised by selective application of heat to a heat sensitive printing or impression-transfer material using thermal heads
    • B41J2/335Structure of thermal heads
    • B41J2/33545Structure of thermal heads characterised by dimensions
    • BPERFORMING OPERATIONS; TRANSPORTING
    • B41PRINTING; LINING MACHINES; TYPEWRITERS; STAMPS
    • B41JTYPEWRITERS; SELECTIVE PRINTING MECHANISMS, i.e. MECHANISMS PRINTING OTHERWISE THAN FROM A FORME; CORRECTION OF TYPOGRAPHICAL ERRORS
    • B41J2/00Typewriters or selective printing mechanisms characterised by the printing or marking process for which they are designed
    • B41J2/315Typewriters or selective printing mechanisms characterised by the printing or marking process for which they are designed characterised by selective application of heat to a heat sensitive printing or impression-transfer material
    • B41J2/32Typewriters or selective printing mechanisms characterised by the printing or marking process for which they are designed characterised by selective application of heat to a heat sensitive printing or impression-transfer material using thermal heads
    • B41J2/335Structure of thermal heads
    • B41J2/3355Structure of thermal heads characterised by materials
    • BPERFORMING OPERATIONS; TRANSPORTING
    • B41PRINTING; LINING MACHINES; TYPEWRITERS; STAMPS
    • B41JTYPEWRITERS; SELECTIVE PRINTING MECHANISMS, i.e. MECHANISMS PRINTING OTHERWISE THAN FROM A FORME; CORRECTION OF TYPOGRAPHICAL ERRORS
    • B41J2/00Typewriters or selective printing mechanisms characterised by the printing or marking process for which they are designed
    • B41J2/315Typewriters or selective printing mechanisms characterised by the printing or marking process for which they are designed characterised by selective application of heat to a heat sensitive printing or impression-transfer material
    • B41J2/32Typewriters or selective printing mechanisms characterised by the printing or marking process for which they are designed characterised by selective application of heat to a heat sensitive printing or impression-transfer material using thermal heads
    • B41J2/335Structure of thermal heads
    • B41J2/33555Structure of thermal heads characterised by type
    • B41J2/3357Surface type resistors

Description

【発明の詳細な説明】 〔産業上の利用分野〕 本発明は、感熱記録紙に対して発熱抵抗体の選択的発熱
により感熱記録を行うサーマルヘッドに関するものであ
り、特に発熱抵抗体とその駆動回路部を薄膜技術により
形成した薄膜サーマルヘッドに関するものである。
Description: TECHNICAL FIELD The present invention relates to a thermal head for performing heat-sensitive recording on heat-sensitive recording paper by selective heat generation of heat-generating resistors, and particularly to heat-generating resistors and their driving. The present invention relates to a thin film thermal head having a circuit portion formed by thin film technology.

〔発明の概要〕[Outline of Invention]

本発明は、絶縁基板上に多結晶シリコンよりなる薄膜層
を設け該多結晶シリコン薄膜を利用して発熱抵抗体及び
駆動回路部を同一基板上に形成するとともに、 上記駆動回路部を活性層の薄い薄膜トランジスタにより
構成し、 小型化が可能で寸法制約の少ないサーマルヘッドを提供
し、且つ高速記録,高階調記録が可能なサーマルヘッド
を提供しようとするものである。
According to the present invention, a thin film layer made of polycrystalline silicon is provided on an insulating substrate to form a heating resistor and a driving circuit section on the same substrate by using the polycrystalline silicon thin film, and the driving circuit section is formed as an active layer. It is an object of the present invention to provide a thermal head that is composed of thin thin film transistors, can be downsized, has less size restrictions, and can perform high-speed recording and high-gradation recording.

〔従来の技術〕[Conventional technology]

従来、ライン型あるいはシリアル型等のサーマルヘッド
では、発熱抵抗体の駆動方法としてダイレクトドライブ
方式やダイオードマトリックス方式の何れかが主に採用
されている。そして、このような方式のサーマルヘッド
においては、駆動回路部等を構成するIC,ダイオード等
の半導体素子ペレットをサーマルヘッド基板に直接実装
して小型化を図っている。
Conventionally, in a line-type or serial-type thermal head, either a direct drive method or a diode matrix method has been mainly adopted as a method for driving a heating resistor. In such a type of thermal head, semiconductor device pellets such as ICs and diodes that constitute the drive circuit section and the like are directly mounted on the thermal head substrate to reduce the size.

しかしながら、上述のように半導体素子ペレットを基板
に実装する方法では、サーマルヘッドの小型化や生産性
等の点で制約が多く、その改善が望まれている。
However, in the method of mounting the semiconductor element pellets on the substrate as described above, there are many restrictions in terms of downsizing of the thermal head and productivity, and improvement thereof is desired.

例えば、第6図に示すように、サーマルヘッド基板(10
1)上に半導体素子(102)を実装して封止剤(103)で
封止した場合には、これら半導体素子(102)や封止剤
(103)による突部やカバー(104)の突部をプラテン
(105)を外径寸法に対応するペーパーパスから逃げる
必要があり、発熱抵抗体から上記半導体素子(102)に
よる突部までの距離W1に制約が生じて小型化の妨げとな
っている。
For example, as shown in FIG. 6, the thermal head substrate (10
1) When the semiconductor element (102) is mounted on and is sealed with the sealant (103), the protrusions or the protrusions of the cover (104) due to the semiconductor element (102) and the sealant (103). It is necessary to allow the platen (105) to escape from the paper path corresponding to the outer diameter, and the distance W 1 from the heating resistor to the protrusion of the semiconductor element (102) is restricted, which hinders miniaturization. ing.

一方、基板寸法W2は、半導体素子(102)の長さやワイ
ヤボンディングピッチで決まる。この場合、半導体素子
(102)はLSI化を図ればある程度小さくすることができ
るが、高価なものとなる。また、ワイヤボンディングピ
ッチも150〜200μm程度の限界であり、例えば半導体素
子(102)が32ビットドライバであると約3mm,64ビット
ドライバであると約7mm必要となる等、寸法上の制約が
大きい。
On the other hand, the substrate dimension W 2 is determined by the length of the semiconductor element (102) and the wire bonding pitch. In this case, the semiconductor element (102) can be made small to some extent if it is made into an LSI, but it becomes expensive. In addition, the wire bonding pitch is also a limit of about 150 to 200 μm. For example, if the semiconductor element (102) is a 32-bit driver, about 3 mm is required, and if it is a 64-bit driver, about 7 mm is required. .

またその他、 1)ワイヤボンディング,半田付け,熱圧着等の接続箇
所が多く、信頼性が低いこと、 2)半導体素子実装工程が必要で、ワイヤボンダ,樹脂
硬化用オーブン等の高価な装置が必要となるとともに、
熟練を要する作業であるため作業者が限定されること、 3)例えばICペレット,封止シリコーン,封止部カバ
ー,Auワイヤ,ダイボンディングペースト等の副資材が
多く、部品点数も多いことから、組み立て工程が多くな
り製造コストも増大すること、 4)例えばカウンター回路,温度センサ回路,メモリ回
路等をサーマルヘッド基板(101)上に設けようとする
と、半導体素子(102)とは別のICペレットが必要にな
り、実装費を含め高価なものとなること、 等、多くの問題を抱えている。
In addition, 1) there are many connection points such as wire bonding, soldering, and thermocompression bonding, and the reliability is low. 2) Semiconductor element mounting process is required, and expensive equipment such as wire bonder and resin curing oven is required. As well as
Since it is a work that requires skill, the number of workers is limited. 3) For example, there are many auxiliary materials such as IC pellets, silicone encapsulation, encapsulation cover, Au wire, die bonding paste, etc. 4) For example, when an attempt is made to provide a counter circuit, a temperature sensor circuit, a memory circuit, etc. on the thermal head substrate (101), an IC pellet different from the semiconductor element (102) will be added. There are many problems, such as the fact that it becomes necessary and expensive, including implementation costs.

そこでさらに従来、例えば特開昭58−153672号公報に記
載されるように、発熱抵抗体よりなる記録素子を駆動す
る駆動アンプや記録制御回路を薄膜トランジスタにより
構成した、いわゆる薄膜サーマルヘッドが提案されてい
る。
Therefore, a so-called thin film thermal head has been proposed in which a drive amplifier and a recording control circuit for driving a recording element composed of a heating resistor are composed of thin film transistors, as described in JP-A-58-153672, for example. There is.

しかしながら、このような通常の薄膜トランジスタによ
り駆動回路部を構成したサーマルヘッドでは、上記薄膜
トランジスタにおける電子移動度μが低いため、大電流
スイッチに用いようとするとゲートの周辺長が非常に大
きく必要となり、デバイス寸法の大型化を惹起し、やは
り小型化に制約が生ずるとともに、ドライバ・オン抵抗
が大きく、パワーロスが大となり効率が悪くなること、
電界効果型トランジスタの周波数特性が悪く4〜6MHz程
度の高周波に対応することが困難で高速記録や高階調記
録が難しいこと等の問題があり、これらの点で不満を残
していた。
However, in a thermal head having a drive circuit section composed of such a normal thin film transistor, the electron mobility μ in the thin film transistor is low, and therefore when it is used for a large current switch, the peripheral length of the gate is required to be very large. In addition to causing size increase and restriction on size reduction, large driver ON resistance, large power loss and poor efficiency,
The frequency characteristics of the field-effect transistor are poor, and it is difficult to cope with high frequencies of about 4 to 6 MHz, and high-speed recording and high-gradation recording are difficult.

〔発明が解決しようとする問題点〕[Problems to be solved by the invention]

このように、従来のサーマルヘッドでは、小型化に対す
る制約が多く、生産性や製造コスト等の点で不利であっ
た。また、通常の薄膜トランジスタを駆動回路部に用い
たサーマルヘッドも提案されているが、その特性上、高
速記録や高階調記録等に対処することは難しかった。
As described above, the conventional thermal head has many restrictions on miniaturization, which is disadvantageous in terms of productivity and manufacturing cost. Further, a thermal head using an ordinary thin film transistor in a drive circuit section has been proposed, but it is difficult to cope with high speed recording, high gradation recording, etc. due to its characteristics.

そこで本発明は、上述の従来の実情に鑑みて提案された
ものであって、基板寸法に対する制約が少なく小型化が
可能であるとともに量産性,製造コスト等の点でも有利
な薄膜サーマルヘッドを提供することを目的とし、さら
には高速記録や高階調記録に充分対処可能な薄膜サーマ
ルヘッドを提供することを目的とする。
Therefore, the present invention has been proposed in view of the above-mentioned conventional circumstances, and provides a thin film thermal head which has less restrictions on the substrate size, can be downsized, and is advantageous in terms of mass productivity, manufacturing cost, and the like. It is also an object of the present invention to provide a thin film thermal head capable of coping with high speed recording and high gradation recording.

〔問題点を解決するための手段〕[Means for solving problems]

上述の目的を達成するために、本発明の薄膜サーマルヘ
ッドは、絶縁基板上に多結晶シリコンよりなる薄膜層を
設け該多結晶シリコン薄膜を利用して発熱抵抗体及び駆
動回路部を同一基板上に形成してなり、上記駆動回路部
を多結晶シリコンよりなる活性層を有しこの活性層が80
0Å以下である薄膜トランジスタにより構成したことを
特徴としている。
In order to achieve the above-mentioned object, the thin film thermal head of the present invention provides a thin film layer made of polycrystalline silicon on an insulating substrate and uses the polycrystalline silicon thin film to form a heating resistor and a drive circuit unit on the same substrate. And the drive circuit section has an active layer made of polycrystalline silicon.
It is characterized in that it is composed of a thin film transistor having a thickness of 0 Å or less.

〔作用〕[Action]

絶縁基板上の多結晶シリコン薄膜層により駆動回路部を
形成しているので、この駆動回路部による突起を数μm
以下に抑えることができ、基板寸法に対する制約が解消
される。同時にワイヤボンディング等の繁雑な工程も不
要となり、信頼性も増す。
Since the drive circuit portion is formed by the polycrystalline silicon thin film layer on the insulating substrate, the protrusion by this drive circuit portion is several μm.
It can be suppressed to the following, and the restriction on the substrate size is solved. At the same time, complicated processes such as wire bonding are not required and reliability is increased.

また、特に駆動回路部において、駆動回路を構成するト
ランジスタの活性層となる多結晶シリコン薄膜層の膜厚
を800Å以下とし、空乏層とほぼ同等の厚さに設定する
ことにより、電子移動度μが高くなり、数mA〜数十mAの
ドライバ素子が微小面積で作製される。さらに、ロジッ
ク回路の動作周波数が比較的高くなり、高速記録,高階
調記録が達せられる。
Also, especially in the drive circuit part, the electron mobility μ is set by setting the thickness of the polycrystalline silicon thin film layer, which is the active layer of the transistor forming the drive circuit, to 800 Å or less and setting it to a thickness almost equal to the depletion layer. Is increased, and a driver element of several mA to several tens of mA is manufactured in a minute area. Further, the operating frequency of the logic circuit becomes relatively high, and high speed recording and high gradation recording can be achieved.

〔実施例〕〔Example〕

以下、本発明の具体的な実施例について図面を参照しな
がら説明する。
Hereinafter, specific embodiments of the present invention will be described with reference to the drawings.

先ず、本発明が適用される薄膜サーマルヘッドの回路構
成例を第5図に示す。
First, FIG. 5 shows a circuit configuration example of a thin film thermal head to which the present invention is applied.

この回路構成例においては、画信号はデータ信号として
信号端子(51)よりシフトレジスタ回路(52)に入力さ
れる。信号端子(53)より入力されるクロック信号に従
ってシフトレジスタ回路(52)に1ライン分のデータが
入力されると、信号端子(54)よりラッチパルスとして
入力されるストローブ信号により全データはラッチ回路
(55)に並列転送され保持される。ラッチ回路(55)に
保持されたデータは、信号端子(56)より入力され印字
タイミング等を決定するイネーブル信号の指示に従って
ゲート回路(57)を介してドライバ素子(58)を駆動
し、発熱抵抗体(59)に選択的に通電し発熱させる。
In this circuit configuration example, the image signal is input as a data signal from the signal terminal (51) to the shift register circuit (52). When one line of data is input to the shift register circuit (52) according to the clock signal input from the signal terminal (53), all data is latched by the strobe signal input as a latch pulse from the signal terminal (54). It is transferred in parallel to (55) and held. The data held in the latch circuit (55) is input from the signal terminal (56) and drives the driver element (58) through the gate circuit (57) in accordance with the instruction of the enable signal that determines the printing timing and the like, and the heating resistor is generated. The body (59) is selectively energized to generate heat.

本発明では、例えば上記ドライバ素子(58)をMOS FET
で、他の回路をCMOSで構成し、これらのソース,ドレイ
ン活性層の多結晶シリコンの膜厚を800Å以下とする。
In the present invention, for example, the driver element (58) is replaced by a MOS FET.
Then, other circuits are configured with CMOS, and the film thickness of polycrystalline silicon of these source and drain active layers is set to 800 Å or less.

第1図は、本発明を適用した薄膜サーマルヘッドの一例
を示すもので、ドライバ部を構成するMOS FETの活性層
を発熱抵抗体に用い、ソース,ドレイン電極を発熱抵抗
体の電極に用いたものである。
FIG. 1 shows an example of a thin film thermal head to which the present invention is applied. The active layer of the MOS FET constituting the driver part is used as a heating resistor, and the source and drain electrodes are used as electrodes of the heating resistor. It is a thing.

この例では、サーマルヘッドの基板(1)上には、SiO2
等の絶縁膜(2)が全面に形成され、この上に多結晶シ
リコン薄膜(3)が形成されている。なお、上記基板
(1)の材質としては、石英,ガラス,グレーズドセラ
ミック等が使用でき、また発熱抵抗体が形成される部分
を若干盛り上げた凸状基板(例えば部分グレーズ基板
等。)を用いても良い。また、上記絶縁膜(2)は必ず
必要というわけではなく、場合によっては無くともよ
い。
In this example, on the substrate (1) of the thermal head, SiO 2
An insulating film (2) such as is formed on the entire surface, and a polycrystalline silicon thin film (3) is formed on the insulating film (2). As the material of the substrate (1), quartz, glass, glaze ceramic, etc. can be used, and a convex substrate (for example, a partial glaze substrate etc.) in which a portion where a heating resistor is formed is slightly raised. Is also good. Further, the insulating film (2) is not always necessary, and may be omitted in some cases.

そして、上記多結晶シリコン薄膜(3)は、発熱抵抗体
及び駆動回路部の薄膜トランジスタを構成する活性層と
して利用されている。
The polycrystalline silicon thin film (3) is used as an active layer that constitutes a heating resistor and a thin film transistor of a drive circuit section.

すなわち、上記多結晶シリコン薄膜(3)のうち駆動回
路部の多結晶シリコン薄膜(3A)の両端部には所定のn
型不純物がドープされた抵抗の低いn型領域(3a),
(3b)が形成されていて、これら抵抗の低いn型領域
(3a),(3b)がそれぞれソース領域(4)、ドレイン
領域(5)を構成している。なお、MOS FETの動作時に
おいては、多結晶シリコン薄膜(3A)中のソース領域
(4)とドレイン領域(5)との間の部分にチャンネル
が形成されるようになっているので、この多結晶シリコ
ン薄膜の中間部分が活性層(3c)を構成している。
That is, a predetermined n is provided at both ends of the polycrystalline silicon thin film (3A) of the drive circuit portion of the polycrystalline silicon thin film (3).
Low-resistance n-type region (3a) doped with type impurities,
(3b) is formed, and these n-type regions (3a) and (3b) having a low resistance respectively form a source region (4) and a drain region (5). During operation of the MOS FET, a channel is formed in the polycrystalline silicon thin film (3A) between the source region (4) and the drain region (5). The intermediate portion of the crystalline silicon thin film constitutes the active layer (3c).

また上記多結晶シリコン薄膜(3A)上には、SiO2からな
るゲート絶縁層(6)が形成され、このゲート絶縁膜
(6)上には不純物がドープされた多結晶シリコン(DO
POS)からなるゲート電極(7)が形成されている。な
お、このゲート電極(7)の材質としては、多結晶シリ
コンに限られず、Ta−SiO2,Ta−Si,TaN,NiCr等が使用さ
れる。
A gate insulating layer (6) made of SiO 2 is formed on the polycrystalline silicon thin film (3A), and impurity-doped polycrystalline silicon (DO) is formed on the gate insulating film (6).
A gate electrode (7) made of POS) is formed. As the material of the gate electrode (7) is not limited to polycrystalline silicon, Ta-SiO 2, Ta- Si, TaN, NiCr or the like is used.

さらに、上記多結晶シリコン薄膜(3A)及びゲート電極
(7)上には、SiO2からなる絶縁層(8)が形成されて
いる。この絶縁層(8)には開口(8a),(8b)が形成
されていて、これらの開口(8a),(8b)を通じてソー
ス領域(4)及びドレイン領域(5)のためのAl,W,Ti,
Mo等からなる取り出し電極(9),(10)がそれぞれ形
成されている。
Further, an insulating layer (8) made of SiO 2 is formed on the polycrystalline silicon thin film (3A) and the gate electrode (7). Openings (8a) and (8b) are formed in the insulating layer (8), and Al and W for the source region (4) and the drain region (5) are formed through these openings (8a) and (8b). , Ti,
Extraction electrodes (9) and (10) made of Mo or the like are formed, respectively.

ところで、上述の構成のFETにおいて、チャンネルが形
成される活性層(3c)を構成している多結晶シリコン薄
膜(3A)の膜厚は、通常の1500Å程度であるのに対し
て、本発明では800Å以下と極めて薄く設定している。
したがって、実効電子移動度μを極めて大きい値にする
ことができる。これは、活性層(3c)の膜厚が、ゲート
電極(7)に通常の大きさのゲート電圧を印加した場合
にこの活性層(3c)に誘起されるチャンネルの厚さより
も小さくなっているためであると考えられる。なお、上
記多結晶シリコン薄膜(3A)の膜厚としては、20〜800
Åの範囲とすればよいが、実用的には200Å程度に設定
するのが好適である。
By the way, in the FET having the above-described structure, the film thickness of the polycrystalline silicon thin film (3A) forming the active layer (3c) in which the channel is formed is about 1500 Å, which is the usual thickness in the present invention. The thickness is set to 800 Å or less, which is extremely thin.
Therefore, the effective electron mobility μ can be made extremely large. This is because the film thickness of the active layer (3c) is smaller than the channel thickness induced in the active layer (3c) when a gate voltage of a normal magnitude is applied to the gate electrode (7). It is thought to be because of this. The thickness of the polycrystalline silicon thin film (3A) is 20 to 800.
It may be set in the range of Å, but practically, it is preferable to set it to about 200 Å.

一方、上記活性層(3c)の構成材料である多結晶シリコ
ン薄膜は、上記駆動回路部のみならず、発熱抵抗体(3
B)としても利用される。
On the other hand, the polycrystalline silicon thin film, which is a constituent material of the active layer (3c), is used not only in the drive circuit section but also in the heating resistor (3c).
Also used as B).

また、発熱抵抗体(3B)となる多結晶シリコン薄膜に
は、取り出し電極(9),(10)形成と同時に作成され
るリード電極(11)が接続される。この例では、ソース
領域(4)の取り出し電極(9)と一方のリード電極
(11a)とが一体的に形成され、駆動回路部と発熱抵抗
体間の電気的接続を図っている。なお、駆動回路部の各
能動素子間の配線は、例えばイネーブル,ラッチ,デー
タ,クロック等の配線を比較的配線抵抗の高いゲート電
極材で行い、VH,GH,VD,GD等の配線をソース電極,ドレ
イン電極の電極材で行うというように、2層配線とする
こともできる。
Further, a lead electrode (11) formed at the same time when the extraction electrodes (9) and (10) are formed is connected to the polycrystalline silicon thin film which becomes the heating resistor (3B). In this example, the extraction electrode (9) of the source region (4) and one lead electrode (11a) are integrally formed to electrically connect the drive circuit section and the heating resistor. Wiring between the active elements of the drive circuit section is performed by, for example, wiring for enable, latch, data, clock, etc. using a gate electrode material having a relatively high wiring resistance, and V H , G H , V D , G D, etc. It is also possible to use a two-layer wiring such that the wiring is performed with the electrode material of the source electrode and the drain electrode.

以上の構成の発熱抵抗体及び駆動回路部上には、全面に
亘って耐酸化層(12)及び耐摩耗層(13)が形成されて
いる。これら耐酸化層(12),耐摩耗層(13)は、上記
発熱抵抗体(3B)の保護膜となると同時に、上記駆動回
路部のFETの表面保護膜(パッシベーション膜)として
も作用する。
An oxidation resistant layer (12) and a wear resistant layer (13) are formed on the entire surface of the heating resistor and the drive circuit section having the above-mentioned configuration. The oxidation resistant layer (12) and the abrasion resistant layer (13) serve as a protective film for the heating resistor (3B) and at the same time act as a surface protective film (passivation film) for the FET in the drive circuit section.

このように構成される薄膜サーマルヘッドにおいては、
駆動回路部のドライバを薄膜トランジスタ回路で構成し
ているので、第6図における突部の寸法tをほとんど零
(数μm以下)に抑えることができ、したがってペーパ
ーパスに対する寸法制約を無くすことができる。また、
駆動回路部はどこにでも設置できるようになるので、こ
の点でも小型化に有利である。
In the thin film thermal head configured in this way,
Since the driver of the drive circuit unit is composed of the thin film transistor circuit, the dimension t of the protrusion in FIG. 6 can be suppressed to almost zero (several μm or less), and therefore, the dimension restriction on the paper path can be eliminated. Also,
The drive circuit unit can be installed anywhere, which is also advantageous for downsizing.

また、駆動回路部と発熱抵抗体とは薄膜パターンで結線
されているので、ワイヤボンディングを必要とせず、そ
のピッチの制約による寸法制約も解消することができ、
同時に繁雑な工程や高価な装置,ボンディングに付帯す
る副資材等が不要となる。特に、ICチップを使用せず、
接続箇所が存在しないので、信頼性の高いものとなる。
Further, since the drive circuit unit and the heating resistor are connected by a thin film pattern, wire bonding is not required, and the dimensional constraint due to the pitch constraint can be eliminated,
At the same time, complicated processes, expensive equipment, and auxiliary materials attached to bonding become unnecessary. In particular, without using the IC chip,
Since there are no connection points, the reliability is high.

さらに、発熱抵抗体と駆動回路部の能動素子とは同一基
板上に同一工程で形成するので、如何なる回路を形成し
ても製造コストはほとんど変わらず、実用性が高い。
Furthermore, since the heating resistor and the active element of the drive circuit section are formed in the same step on the same substrate, the manufacturing cost is almost the same regardless of which circuit is formed, and the practicality is high.

以上、ドライバ部を構成するMOS FETの活性層を発熱抵
抗体に用いた一実施例について説明したが、本発明がこ
の実施例に限定されるものではなく、種々の構成を取り
得ることは言うまでもない。以下、本発明の他の実施例
について説明する。
Although the embodiment in which the active layer of the MOS FET forming the driver section is used as the heating resistor has been described above, the present invention is not limited to this embodiment, and it goes without saying that various configurations can be adopted. Yes. Another embodiment of the present invention will be described below.

第2図は、FETのゲート電極を発熱抵抗体に用いた例を
示すものである。なお、以下の各例においても同様であ
るが、先の実施例と同一の部材には同一の符号を付して
その説明は省略する。
FIG. 2 shows an example in which the gate electrode of the FET is used as a heating resistor. The same applies to each of the following examples, but the same members as those in the previous embodiment are designated by the same reference numerals, and the description thereof will be omitted.

この実施例では、ゲート電極(7)形成時に同時にゲー
ト材で発熱抵抗体(21)を形成している。また、上記発
熱抵抗体(21)のリード線は、ソース領域(4)やドレ
イン領域(5)の取り出し電極(9),(10)の形成と
同時にこれら電極材料で形成されていることは、先の実
施例と同様である。
In this embodiment, the heating resistor (21) is formed of the gate material at the same time when the gate electrode (7) is formed. Further, the lead wire of the heating resistor (21) is formed of these electrode materials at the same time when the extraction electrodes (9) and (10) of the source region (4) and the drain region (5) are formed. It is similar to the previous embodiment.

第3図は、前述の第1図に示す実施例と同様にFETの活
性層(3c)形成のための多結晶シリコン薄膜(3)を発
熱抵抗体(3B)として利用するとともに、絶縁層(8)
を上記発熱抵抗体(3B)の耐酸化層として用いた例を示
すものである。この場合には耐酸化層が発熱抵抗体(3
B)上に形成された構造となるので、第1図あるいは第
2図に示す実施例とは異なり、特別な耐酸化層(12)は
不要となり、耐摩耗層(13)のみを形成すればよい。
FIG. 3 shows that the polycrystalline silicon thin film (3) for forming the active layer (3c) of the FET is used as the heating resistor (3B) as well as the insulating layer (as in the embodiment shown in FIG. 8)
Is used as the oxidation resistant layer of the heating resistor (3B). In this case, the oxidation-resistant layer is
Since the structure is formed on B), unlike the embodiment shown in FIG. 1 or FIG. 2, a special oxidation resistant layer (12) is not required and only the wear resistant layer (13) is formed. Good.

第4図は、前述の第2図に示す実施例と同様にFETのゲ
ート電極(7)の形成のためのゲート材を発熱抵抗体
(21)として利用するとともに、絶縁層(8)を上記発
熱抵抗体(21)の耐酸化層として用いた例を示すもので
ある。この例においても、第3図に示す実施例と同様
に、耐酸化層(12)は不要となる。
FIG. 4 shows that the gate material for forming the gate electrode (7) of the FET is used as the heating resistor (21) as in the embodiment shown in FIG. The example shown is used as an oxidation resistant layer of a heating resistor (21). Also in this example, as in the embodiment shown in FIG. 3, the oxidation resistant layer (12) is unnecessary.

また、発熱抵抗体を従来のサーマルヘッドと同様にTa−
SiO2,Ta−Si,TaN,NiCr等の材料で構成し、これら発熱抵
抗体と薄膜トランジスタ間が薄膜トランジスタの電極材
料で各々結線された構成としてもよい。
In addition, the heating resistor is Ta-
It is also possible to use a material such as SiO 2 , Ta-Si, TaN, or NiCr, and connect the heating resistor and the thin film transistor with the electrode material of the thin film transistor.

〔発明の効果〕〔The invention's effect〕

以上の説明からも明らかなように、本発明の薄膜サーマ
ルヘッドにおいては、発熱抵抗体と駆動回路部とを薄膜
技術により同一基板上に形成し、またこれら発熱抵抗体
と駆動回路部間をゲート材,電極材等の薄膜パターンで
結線しているので、ワイヤボンディングによる接続が不
要になり、生産性や信頼性に優れたものとなる。
As is clear from the above description, in the thin film thermal head of the present invention, the heating resistor and the drive circuit section are formed on the same substrate by the thin film technique, and the heating resistor and the drive circuit section are gated. Since the wires are connected by a thin film pattern of material, electrode material, etc., connection by wire bonding becomes unnecessary, and the productivity and reliability are excellent.

また、駆動回路部が薄膜トランジスタにより構成され、
この部分の基板からの突出量が極めて微小(全部で数μ
m以下程度)なものであるので、プラテン外径等による
実装位置の制約が無くなり、小型化の点で極めて有利で
ある。
Further, the drive circuit unit is composed of thin film transistors,
The amount of protrusion of this part from the substrate is extremely small (total of several μ
Since it is about m or less), there is no restriction on the mounting position due to the outer diameter of the platen and the like, which is extremely advantageous in terms of downsizing.

さらに、駆動回路部を構成する薄膜トランジスタの活性
層の厚さが800Å以下と薄く設定されているので、電子
移動度μが極めて高くなり、ドライバ素子であるトラン
ジスタを微小面積で作成することができ、この点でも小
型化に有利である。
Furthermore, since the thickness of the active layer of the thin film transistor that constitutes the drive circuit portion is set as thin as 800 Å or less, the electron mobility μ becomes extremely high, and the transistor that is the driver element can be formed in a small area. This point is also advantageous for downsizing.

さらにまた、上記活性層の薄膜化は、サーマルヘッドの
小型化のみならず、記録特性向上の点でも実用性が高
い。例えば、ドライバ素子のオン抵抗を小さくできるの
で、パワーロスが少なくなり、効率が大幅に向上され
る。また、FETの周波数特性の向上が可能で、したがっ
て高速記録や高階調記録が可能となる。
Furthermore, the thinning of the active layer is highly practical not only for downsizing the thermal head but also for improving recording characteristics. For example, since the on resistance of the driver element can be reduced, power loss is reduced and efficiency is greatly improved. Further, the frequency characteristics of the FET can be improved, and thus high speed recording and high gradation recording can be performed.

【図面の簡単な説明】[Brief description of drawings]

第1図は本発明を適用した薄膜サーマルヘッドの一実施
例を示す要部拡大断面図である。 第2図ないし第4図はそれぞれ本発明の他の実施例を示
す要部拡大断面図である。 第5図はサーマルヘッドの回路構成例を示す回路図であ
る。 第6図は従来のサーマルヘッドを模式的に示す側面図で
ある。 1……基板 3……多結晶シリコン薄膜 3c……活性層 3B,21……発熱抵抗体
FIG. 1 is an enlarged sectional view of an essential part showing an embodiment of a thin film thermal head to which the present invention is applied. 2 to 4 are enlarged cross-sectional views of essential parts showing other embodiments of the present invention. FIG. 5 is a circuit diagram showing a circuit configuration example of the thermal head. FIG. 6 is a side view schematically showing a conventional thermal head. 1 ... Substrate 3 ... Polycrystalline silicon thin film 3c ... Active layer 3B, 21 ... Heating resistor

───────────────────────────────────────────────────── フロントページの続き (51)Int.Cl.6 識別記号 庁内整理番号 FI 技術表示箇所 113 K ─────────────────────────────────────────────────── ─── Continuation of the front page (51) Int.Cl. 6 Identification code Internal reference number FI technical display part 113 K

Claims (1)

【特許請求の範囲】[Claims] 【請求項1】絶縁基板上に多結晶シリコンよりなる薄膜
層を設け該多結晶シリコン薄膜を利用して発熱抵抗体及
び駆動回路部を同一基板上に形成してなり、 上記駆動回路部を多結晶シリコンよりなる活性層を有し
この活性層が800Å以下である薄膜トランジスタにより
構成したことを特徴とする薄膜サーマルヘッド。
1. A thin film layer made of polycrystalline silicon is provided on an insulating substrate, and a heating resistor and a driving circuit portion are formed on the same substrate by using the polycrystalline silicon thin film. A thin-film thermal head characterized by comprising a thin film transistor having an active layer made of crystalline silicon and having an active layer of 800 Å or less.
JP61047458A 1986-03-06 1986-03-06 Thin film thermal head Expired - Lifetime JPH0737146B2 (en)

Priority Applications (5)

Application Number Priority Date Filing Date Title
JP61047458A JPH0737146B2 (en) 1986-03-06 1986-03-06 Thin film thermal head
CA000531211A CA1283693C (en) 1986-03-06 1987-03-05 Thermal print head containing super-thin polycrystalline silicon film transistor
KR870001956A KR870008706A (en) 1986-03-06 1987-03-05 Thermal print head
EP87103260A EP0235827B1 (en) 1986-03-06 1987-03-06 Thermal print head containing super-thin polycrystalline silicon film transistor
DE87103260T DE3786935T2 (en) 1986-03-06 1987-03-06 Thermal print head with a super thin polycrystalline silicon film transistor.

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP61047458A JPH0737146B2 (en) 1986-03-06 1986-03-06 Thin film thermal head

Publications (2)

Publication Number Publication Date
JPS62204964A JPS62204964A (en) 1987-09-09
JPH0737146B2 true JPH0737146B2 (en) 1995-04-26

Family

ID=12775712

Family Applications (1)

Application Number Title Priority Date Filing Date
JP61047458A Expired - Lifetime JPH0737146B2 (en) 1986-03-06 1986-03-06 Thin film thermal head

Country Status (1)

Country Link
JP (1) JPH0737146B2 (en)

Families Citing this family (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2775779B2 (en) * 1988-11-18 1998-07-16 カシオ計算機株式会社 Thermal head and method of manufacturing the same
JP2625989B2 (en) * 1988-11-21 1997-07-02 カシオ計算機株式会社 Thermal head
US6758552B1 (en) * 1995-12-06 2004-07-06 Hewlett-Packard Development Company Integrated thin-film drive head for thermal ink-jet printer
US6132032A (en) * 1999-08-13 2000-10-17 Hewlett-Packard Company Thin-film print head for thermal ink-jet printers

Family Cites Families (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS54161344A (en) * 1978-06-09 1979-12-20 Canon Inc Thermal recorder

Also Published As

Publication number Publication date
JPS62204964A (en) 1987-09-09

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