JPH0736153B2 - Data transmission system - Google Patents

Description

The present invention relates to a data transmission system having a transmission line for transmitting information and a plurality of data transmission devices connected to the transmission line for exchanging the information. The present invention relates to replacement of firmware by a command, and more particularly, to a data transmission method capable of changing firmware processing from another data transmission device without changing the contents of firmware stored in advance.

[Conventional technology]

Conventionally, when replacing firmware of this type, generally, each data transmission device loads the firmware into a writable storage device using a floppy disk device, cassette magnetic tape, magnetic tape, etc. connected to itself. The method of doing is adopted.

[Problems to be solved by the invention]

In the above-mentioned method, firmware is loaded in the writable storage device directly. Therefore, in order to change firmware, it is necessary to completely modify the original firmware. There was a problem that it was difficult to manage the device due to the “deviation” of the address before and after the change and during the system operation.

Further, in recent systems, there are many data transmission devices in which firmware is directly stored in a read-only storage device (PROM) for cost reduction. Therefore, in order to change the firmware, the PROM must be changed, which has the disadvantage of requiring a large number of man-hours.

[Means for Solving Problems] In view of the above points, the present invention has been made to solve such problems and eliminate such defects, and the purpose thereof is to change the firmware stored in advance. It is an object of the present invention to provide a data transmission system capable of changing the processing of the firmware by the same method as the normal data transfer even during the operation of the system.

In order to achieve such an object, in the data transmission system according to the present invention, each of the data transmission devices stores a first storage unit that holds a microinstruction and a microinstruction sent from another data transmission device. Second storage means,
Address generating means for holding one bit for selecting a micro instruction output from the first and second storage means and an address commonly supplied to the first and second storage means as a continuous bit string And an address storing means for storing a specific address among the addresses assigned to the first storage means sent from another data transmission device, and set / reset according to information sent from another data transmission device. The binary element and the 1 bit held by the address generating means are set to a value for selecting the micro instruction output from the second storing means, and the address held by the address generating means is set to the second value. Constant holding means for holding a constant corresponding to a microinstruction set at a specific one of the addresses assigned to the storage means; If the address held by the address generation means and the address stored by the address storage means match and the binary element is set, the content of the constant holding means is selected; According to the contents of the 1 bit in the address generating means, the first
Alternatively, the selecting means for selecting the microinstruction output from the second storage means and the microinstruction corresponding to the constant selected by the selecting means or the microinstruction output from the first or second storage means A micro-command control circuit for executing and updating the contents of the address generating means, transmitting information from one of the data transmission devices to another data transmission device via the transmission path, and transmitting the other data. The second storage means, the address storage means, and the binary element in the device are set.

[Work]

The function to branch to a specific address when the value set by the means for setting an arbitrary value and the address for accessing firmware is changed by a command from another data transmission device. Change the firmware processing in exactly the same way as a normal data transfer.

〔Example〕

 Hereinafter, embodiments of the present invention will be described in detail with reference to the drawings.

FIG. 1 is an explanatory diagram showing an example of a data transmission system to which the present invention is applied.

In order to facilitate understanding of the present invention, this will be described first.

In the figure, 1, 2, ... 4 are data transmission devices, 1 respectively.
Reference numerals 1, 12 ... 14 denote loop system transmission lines between the respective data transmission devices 1 to 4, and the data transmission system is composed of a plurality of data transmission devices 1 to 4 and loop system transmission lines 11 to 14. .

FIG. 2 is a block diagram showing an embodiment of the present invention.

In FIG. 2, the same reference numerals as those in FIG. 1 indicate corresponding parts, and the data transmission devices 1 to 4 respectively control a transmission line control circuit 21 and a processor which controls the transmission line control circuit 21 to exchange various information. 22, a data bus 23, a signal line group 24 for transmitting a control signal for controlling the transmission path control circuit 21,
It is composed of an interrupt line 25 for sending an interrupt signal to the processor 22.

FIG. 3 is a block diagram showing a structural example in which a portion related to the processor 22 in the embodiment of FIG. 2 is extracted.

In FIG. 3, the same reference numerals as those in FIG. 2 indicate corresponding parts, and 31 indicates a micro instruction address register (hereinafter, MA).
R is referred to as R), 32 is a match address register (hereinafter referred to as CAR) for storing contents to be matched with this MAR 31, and 33 is a comparison circuit for comparing the output of MAR 31 with the output of CAR 32. Is configured to generate a match signal cs when the output of MAR31 and the output of CAR32 match.

34 is an activation flip-flop for validating this coincidence signal cs, 35 is an AND circuit which inputs the output of this activation flip-flop 34 and the coincidence signal cs from the comparison circuit 33, and ANDs these two inputs, and 36 is a write A readable storage device (hereinafter referred to as RAM), 37 is a read-only storage device (hereinafter referred to as ROM), 38 is a value indicating the content of the branch micro instruction (hereinafter referred to as a constant), Reference numeral 39 is a selector, 40 is a micro instruction register (hereinafter referred to as MIR) which receives the output of the selector 39, and 41 is a micro program control circuit.

The remaining bits except for the upper 1 bit of MAR31 is supplied in common to the two memory RAM36 and ROM 37, a micro instruction stored in the address is supplied to the selector 39 as OD _1, OD _2. On the other hand, ss ₂ is supplied to the selector 39 from the upper 1 bit of MAR31, and is sent to the two storage devices RA.
Microinstruction OD output from M36 and ROM37 respectively
Indicates a select signal indicating which of ₁ and OD ₂ is selected.

FIG. 4 is an explanatory diagram showing a general frame format applied to the present invention.

A general frame flowing through the transmission lines 11 to 14 (see FIG. 1) is a flag pattern F indicating “01111110”, a destination address DA indicating a destination address, a source address SA indicating a source address, It is composed of control information C, data information I, and a check bit FCS for performing a cyclic redundancy check with a frame check sequence.

The data information I may be omitted as part of the frame configuration.

Next, the operation of the embodiment shown in FIG. 2 will be described with reference to FIGS. 1, 3, and 4.

It is now assumed that the data transmission device 4 shown in FIG. 1 has to be changed for the data transmission device 1 with respect to a specific processing routine.

First, the data transmission device 4 sends a command A to the data transmission device 1 in accordance with the format of the frame shown in FIG. 4 in order to change the contents. Then, the transmission path control circuit 21 of the data transmission device 1
When (see FIG. 2) receives the frame of command A,
A frame is written in a buffer (not shown) in the transmission path control circuit 21, an interrupt signal of the interrupt line 25 is generated, and the processor 22
Let us know.

Next, the micro program control circuit 41 shown in FIG. 3 in the processor 22 uses the interrupt signal to set the buffer in the transmission line control circuit 21 shown in FIG. 2 to the signal line group 24 and the data bus 23.
The control information C in the frame shown in FIG. 4 is read as a command A, and the data information I in the frame is further transmitted to the RA through the signal line group 24 and the data bus 23.
Write to M36 and end the operation of command A. here,
The firmware written in the RAM 36 is hereinafter referred to as firmware F in this embodiment.

In this way, the data transmission device 4 becomes the data transmission device 1
After writing the firmware F into the RAM 36, the information to be set to the CAR 32 and the activation flip-flop 34 in the data transmission apparatus 1 is sent to the data transmission apparatus 1 by the same method as when the command A is transmitted. When the transmission path control circuit 21 (see FIG. 2) of the data transmission device 1 receives the frame of the command B, it generates an interrupt signal on the interrupt line 25 and notifies the processor 22 of it.

The micro program control circuit 41 in the processor 22 accesses the buffer of the transmission path control circuit 21 by an interrupt signal,
Command B by reading control information C in the frame
And interpret the data information I in the frame as signal line group 24
And a value designated by the data transmission device 4 (hereinafter, referred to as “X” in this embodiment) to the CAR 32 through the data bus 23.
The CAR 32 is set, the logical value "1" is set in the activation flip-flop 34, and the operation of the command B is completed.

Then, when the data transmission device 1 is set in the start-up flip-flop 34, the MAR 31 during the original micro-instruction execution processing is executed.
Becomes the value of "X". Then, the match signal cs obtained on the output signal line of the comparison circuit 33 is turned on, and further, the select signal ss ₁ obtained on the output signal line of the AND circuit 35 is turned on, so that the selector 39 forcibly sets the constant 38. Select and set in MIR40.

Further, when the micro program control circuit 41 executes the micro instruction (constant 38), the MAR 31 receives a command A
The head address of firmware F written in AM36 is set, and firmware F is executed thereafter. Then, when a series of firmware is executed, it branches to firmware to be executed among firmware stored in advance. It should be noted that this branching micro instruction may be placed at the end of firmware F. Further, if there is no need to restore the firmware stored in advance, it is not necessary to place the branching micro instruction at the end of firmware.

That is, the firmware F written in the data transmission device 1 is executed by the data transmission device 4 as a substitute for firmware that has to be changed. Therefore, the firmware stored in the data transmission device 1 in advance is executed. No need to change.

Next, when it becomes unnecessary to change the firmware of the data transmission device 1, it can be achieved by sending the command D from the data transmission device 4 to the data transmission device 1. When the transmission path control circuit 21 (see FIG. 2) in the data transmission device 1 receives this command D,
An interrupt signal on the interrupt line 25 is generated to notify the processor 22. Then, the micro program control circuit 41 in the processor 22 reads the contents of the frame via the data bus 23 in response to the interrupt signal, interprets the control information C in the frame as the command D, and starts the startup flip-flop 34. Reset and end the processing of command D. Therefore, even if the values of MAR31 and CAR32 match thereafter, the select signal (match signal) ss of the signal output line of the AND circuit 35
₁ does not occur, and the value of constant 38 is no longer set in MIR40.

Thus, for example, when a specific command is sent from the data transmission device 4 to the data transmission device 1, the address at which the data transmission device 1 accesses the firmware matches the value set by the means for setting an arbitrary value. If you do, don't branch.

In the above example, the case of the data transmission device via the loop-shaped transmission line is described as an example, but the present invention is not limited to this, and as shown in FIG. 5, for example,
A method in which the data transmission device 51 transmits information to the data transmission device 52 via the transmission line 511, and as shown in FIG. 6, the data transmission device 61 transmits information to the data transmission device 62 via the transmission line 611. A method of performing transmission, a method of transmitting information to the data transmitting apparatus 712 by the data transmitting apparatus 711, and a method of transmitting information to the data transmitting apparatus 721 by the data transmitting apparatus 711 as shown in FIG. The process of the data transmission device in the middle is only the process of converting the command,
All others are the same as the above example), but these are all included in the present invention.

Incidentally, 63 and 64 in FIG. 6 indicate data transmission devices, respectively, and 71 to 78 and 713 and 722 to 723 in FIG. 7 indicate data transmission devices, respectively.

Although the present invention has been described above by taking the method of frame transfer on the transmission line as an example, the present invention is not limited to this and can be applied to any interface including the internal bus in the device. There is no end.

〔The invention's effect〕

As described above, according to the present invention, the function of branching to a specific address when the firmware matches the accessed address is stored in advance by a command from another data transmission device without stopping the system even during system operation. Since the processing of firmware can be changed without changing the content of firmware that is used, the practical effect is extremely large.

[Brief description of drawings]

FIG. 1 is an explanatory diagram showing an example of a data transmission system to which the present invention is applied, FIG. 2 is a block diagram showing an embodiment of the present invention, and FIG. 3 is an extracted portion relating to the processor of FIG. Block diagrams showing configuration examples, FIG. 4 is an explanatory diagram showing a general frame format applied to the present invention, and FIGS. 5, 6, and 7 are data transmission systems to which the present invention is applied. It is explanatory drawing which shows another example. 1 to 4 ... data transmission device, 11 to 14 ... transmission line, 21 ...
Transmission line control circuit, 22 ... Processor, 31 ... Micro instruction address register, 32 ... Match address register, 33
…… Comparison circuit, 34 …… Start-up flip-flop, 35 …… AND circuit, 36,37 …… Storage device, 38 …… Constant, 39 …… Selector, 40 …… Micro instruction register, 41 …… Micro program control circuit, 51,52,61 to 64,71 to 78 …… Data transmission equipment, 511,611 …… Transmission path, 711 to 713,721 to 723 ……
Data transmission equipment.

Claims (1)

[Claims] 1. A data transmission system having a transmission line for transmitting information and a plurality of data transmission devices connected to the transmission line for exchanging the information, wherein each of the data transmission devices includes a micro command. First storage means for holding, second storage means for storing microinstructions sent from another data transmission device, and for selecting microinstructions output from the first and second storage means Address generating means for holding one bit and an address commonly supplied to the first and second storage means as a continuous bit string, and allocation to the first storage means sent from another data transmission device Address storing means for storing a specific address among the stored addresses, and setting / setting according to information sent from another data transmission device.
A binary element to be reset and the 1 bit held by the address generating means are set to a value for selecting a microinstruction output from the second storage means, and the address held by the address generating means is set to the second Constant holding means for holding a constant corresponding to a microinstruction set to a specific one of the addresses assigned to the storage means, an address held by the address generating means, and an address stored by the address storing means. Match and the above 2
When the value element is set, the content of the constant holding means is selected, and in other cases, it is output from the first or second storage means according to the content of the 1-bit in the address generating means. Selecting means for selecting a microinstruction, and executing the microinstruction corresponding to the constant selected by the selecting means or the microinstruction output from the first or second storage means to change the contents of the address generating means. A micro command control circuit for updating, transmitting information from one of the data transmission devices to another data transmission device via the transmission line, and the second storage means in the other data transmission device, A data transmission system characterized in that the address storage means and the binary element are set.