JPH0735414Y2 - Multilayer circuit board for mounting electronic components - Google Patents

Multilayer circuit board for mounting electronic components

Info

Publication number
JPH0735414Y2
JPH0735414Y2 JP1989100948U JP10094889U JPH0735414Y2 JP H0735414 Y2 JPH0735414 Y2 JP H0735414Y2 JP 1989100948 U JP1989100948 U JP 1989100948U JP 10094889 U JP10094889 U JP 10094889U JP H0735414 Y2 JPH0735414 Y2 JP H0735414Y2
Authority
JP
Japan
Prior art keywords
circuit board
prepreg
annular spacer
layer
hole
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
JP1989100948U
Other languages
Japanese (ja)
Other versions
JPH0339878U (en
Inventor
修三 土井
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Risho Kogyo Co Ltd
Original Assignee
Risho Kogyo Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Risho Kogyo Co Ltd filed Critical Risho Kogyo Co Ltd
Priority to JP1989100948U priority Critical patent/JPH0735414Y2/en
Publication of JPH0339878U publication Critical patent/JPH0339878U/ja
Application granted granted Critical
Publication of JPH0735414Y2 publication Critical patent/JPH0735414Y2/en
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Description

【考案の詳細な説明】 [産業上の利用分野] この考案は半導体素子等の電子部品を収納するためのキ
ャビティーを備えた2層以上の回路基板に関するもので
ある。
DETAILED DESCRIPTION OF THE INVENTION [Industrial field of application] The present invention relates to a circuit board having two or more layers with cavities for housing electronic components such as semiconductor elements.

[従来技術およびその問題点] 従来、半導体素子等の電子部品を収納するためのキャビ
ティーを設けた電子部品搭載用の回路基板として、第3
図に示す如きの構造のものが用いられていた。即ち、半
導体素子等の電子部品を搭載する位置の周囲に適数個の
導体パターンa1,a2,…,ai(iは任意の整数)を整列
形成してなるボンディングパッドaを設けた回路基板A
の上に、貫通孔を形成し貫通孔の周りに適数個の導体パ
ターンb1,b2,…,bn(nは任意の整数)を整列形成し
てなるボンディングパッドbを設けた環状の回路基板B
を積層一体化した構造のものが用いられていた。
[Prior Art and its Problems] Conventionally, as a circuit board for mounting electronic parts, which is provided with a cavity for housing electronic parts such as semiconductor elements,
The structure shown in the figure was used. That is, a bonding pad a formed by aligning and forming an appropriate number of conductor patterns a 1 , a 2 , ..., A i (i is an arbitrary integer) around the position where an electronic component such as a semiconductor element is mounted is provided. Circuit board A
A ring having a bonding pad b on which a through hole is formed and an appropriate number of conductor patterns b 1 , b 2 , ..., B n (n is an arbitrary integer) are formed around the through hole. Circuit board B
Those having a structure in which the above are laminated and integrated have been used.

近年、高密度化の要求により、回路パターンを多段に積
層して中心部に電子部品を収容するためのキャビティー
を階段状に形成し、各段の階段部にボンディングパッド
を配置した構造のものも用いられるようになりつつあ
る。
In recent years, due to the demand for higher densities, a structure in which circuit patterns are stacked in multiple stages to form cavities for accommodating electronic components in a staircase at the center and bonding pads are arranged at the stairs of each stage Is also being used.

このような多層構造の電子部品搭載用回路基板において
は高密度化のために高寸法精度の加工が必要になる。例
えば、キビティー側壁の段部に幅が約0.15mm〜0.40mmで
厚みが約0.03mm〜0.05mm程度の導体箔パターンを約0.15
mm〜0.40mm程度の間隔に整列させ端部を約1.0mm〜2.0mm
程度に露出させたボンディングパッドを形成すると云う
高寸法精度の加工が必要になる。
In such a multilayer-structured electronic component mounting circuit board, high dimensional precision processing is required for high density. For example, a conductor foil pattern having a width of about 0.15 mm to 0.40 mm and a thickness of about 0.03 mm to 0.05 mm is formed on the step portion of the side wall of the kibity in an amount of about 0.15 mm.
Aligned at intervals of about mm to 0.40 mm, the ends are about 1.0 mm to 2.0 mm
It is necessary to perform processing with high dimensional accuracy, that is, forming bonding pads that are exposed to some extent.

ところで、多層構造の電子部品搭載用回路基板を、所定
の回路パターンに形成した回路基板の適数枚を間にプリ
プレグを介して多層構造の回路基板に形成した後にこの
多層構造の回路基板の所定位置に半導体素子等の電子部
品を収納するためのキャビティーをザグリ等の機械加工
により階段状に穿孔する方法が考えられるが、この方法
は高寸法精度の電子部品塔採用の多層回路板を得る事が
できるが、1個毎に高精度の切削加工技術を駆使して階
段状キャビティーに仕上げることになるので量産品には
不向きである。
By the way, a circuit board for mounting electronic parts having a multilayer structure is formed on a circuit board having a multilayer structure with a suitable number of circuit boards formed in a predetermined circuit pattern via a prepreg, and then a predetermined circuit board having a multilayer structure is formed. A method of punching a cavity for accommodating electronic components such as semiconductor elements in a stepwise manner by machining such as counterbores can be considered, but this method obtains a multilayer circuit board adopting an electronic component tower with high dimensional accuracy Although it can be done, it is not suitable for mass-produced products because it will be finished into stepped cavities by making use of high-precision cutting processing technology for each piece.

また、量産品に向く方法として、各層を構成する回路基
板をプリプレグを用いて一体に積層成形する際に、回路
基板の上に予め大きさの異なる貫通孔を穿設した適数枚
の回路基板を準備して貫通孔の小さい順に間にプリプレ
グを挟んで積み重ねこれを加圧・加熱して多層構造に一
体成形することによりキャビティーも同時に形成する方
法が提案されている。この方法は一度に多数個を加工で
き量産向きの方法であるが、多層構造に一体化する際
に、第4図に示すように、プリプレグの樹脂がキャビテ
ィーのボンディングパッドa部に流れ出しEが生じ易
く、高寸法精度のものが得難いと云う問題点がある。
Further, as a method suitable for mass-produced products, when the circuit boards constituting each layer are integrally laminated using a prepreg, a suitable number of circuit boards having through holes of different sizes are preliminarily formed on the circuit boards. A method has been proposed in which a cavity is simultaneously formed by preparing a prepreg and stacking prepregs in the ascending order of the through holes, pressurizing and heating the prepreg, and integrally molding the prepreg into a multilayer structure. This method is suitable for mass production because a large number of pieces can be processed at one time, but when integrated into a multilayer structure, the resin of the prepreg flows out to the bonding pad a of the cavity as shown in FIG. There is a problem that it is easy to occur and it is difficult to obtain high dimensional accuracy.

この考案は叙上の点に鑑みてなされたものであり、この
考案の目的とするところは、回路基板を2段以上に積み
重ねてこれを加熱・加圧して一体に積層成形する際に、
電子部品を収容するためのキャビティーも同時に形成す
る製法を用いても、プリプレグの樹脂がキャビティーの
ボンディングパッド部に流れ出さない電子部品塔採用の
多層回路基板を提供するものである。
This invention has been made in view of the above points, and the purpose of this invention is to stack circuit boards in two or more steps and heat / pressurize them to integrally laminate them.
Provided is a multilayer circuit board adopting an electronic parts tower in which a resin of a prepreg does not flow out to a bonding pad portion of a cavity even when a manufacturing method of simultaneously forming a cavity for housing an electronic part is used.

[問題点を解決するための手段] この考案は、上記問題点を解決するために、回路基板の
上に貫通孔を形成した回路基板をプリプレグを介してN
(Nは2以上の整数)段に積み重ね、これを加熱・加圧
して回路基板間にプリプレグによる接着層を形成して一
体化することにより、中心部にキャビティーを形成した
電子部品搭載用多層回路基板において、回路基板と回路
基板の間であってプリプレグによる接着層の内側に、厚
み方向に低弾性体層と高弾性体層を有する積層体で形成
した環状のスペーサーを接着一体化させて設けたのであ
る。
[Means for Solving the Problems] In order to solve the above problems, the present invention provides a circuit board having a through hole formed on the circuit board through a prepreg through an N
(N is an integer of 2 or more) Multilayers for mounting electronic parts with a cavity formed in the center by stacking them in layers and heating / pressurizing them to form an adhesive layer with prepreg between circuit boards for integration. In the circuit board, an annular spacer formed of a laminated body having a low elastic body layer and a high elastic body layer in the thickness direction is bonded and integrated between the circuit boards and inside the adhesive layer by the prepreg. It was provided.

[作用] 回路基板の上に貫通孔を形成した回路基板をプリプレグ
を介してN(Nは2以上の整数)段に積み重ねたプリプ
レグは、加熱・加圧の際の初期の段階では熱の伝達速度
が遅いので加圧力のみが加わって圧縮変形され、環状の
スペーサーの厚みの近くまで押さえ込まれる。熱が次第
に伝達して所定の温度に昇温すると、プリプレグの樹脂
分は、一旦、軟化して液状になり、その後、硬化反応が
進むにつれて接着層を形成するが、プリプレグの樹脂分
が液状に成った際の加圧力によりプリプレグのまわりの
空所に樹脂液を流れ込ませ環状スペーサーの厚みと同じ
厚みまで押え込まれ、環状スペーサーの上面は上側の回
路基板に当接し、下面は下側の回路基板のボンディング
パッド部の導体パターンの上面に当接するようになる。
そして、環状スペーサーの下面には隣接り合う導体パタ
ーンによつて囲まれる細孔が多数形成され、これら導体
パターン間の細孔にプリプレグの樹脂液が流れ込むが、
プリプレグ樹脂液の粘度と導体パターン間の細孔の断面
積、導体パターン間の細孔の表面粗さ、等により定まる
粘性抵抗は、プリプレグ樹脂液の粘度が一番小さいとき
でも数百cpsと比較的高く導体パターン間の細孔の断面
積が数拾μm×数百μmと小さいために粘性抵抗が極め
て大となって、プリプレグ樹脂液は細孔の途中まで流れ
込んで止まり、実質的に細孔を通じて環状スペーサーで
囲まれる内側まで流出することはなくなる。
[Operation] The prepreg in which the circuit boards having through holes formed on the circuit board are stacked in N (N is an integer of 2 or more) stages through the prepreg is used to transfer heat at the initial stage of heating / pressurizing. Since the speed is slow, only the applied pressure is applied and it is compressed and deformed, and it is pressed close to the thickness of the annular spacer. When the heat is gradually transferred to raise the temperature to a predetermined temperature, the resin content of the prepreg is once softened and becomes liquid, and then the adhesive layer is formed as the curing reaction proceeds, but the resin content of the prepreg becomes liquid. The resin liquid is caused to flow into the space around the prepreg by the applied pressure when it is formed, and is pressed down to the same thickness as the annular spacer, the upper surface of the annular spacer abuts the upper circuit board, and the lower surface of the lower circuit It comes into contact with the upper surface of the conductor pattern of the bonding pad portion of the substrate.
Then, a large number of pores surrounded by adjacent conductor patterns are formed on the lower surface of the annular spacer, and the resin liquid of the prepreg flows into the pores between the conductor patterns,
The viscosity resistance determined by the viscosity of the prepreg resin liquid, the cross-sectional area of the pores between the conductor patterns, the surface roughness of the pores between the conductor patterns, etc. is compared with several hundred cps even when the viscosity of the prepreg resin liquid is the smallest. Since the cross-sectional area of the pores between the conductor patterns is extremely small and is as small as several μm × several hundred μm, the viscous resistance becomes extremely large, and the prepreg resin liquid flows into the middle of the pores and stops. It does not flow to the inside surrounded by the annular spacer.

低弾性体層と高弾性体層を有する積層体で形成した環状
スペーサーの低弾性体層側を下側にして用いることによ
り、加圧力が環状スペーサーの低弾性体層を導体パター
ン間の空所の一部に占領させる弾性変形をもたらして導
体パターン間に形成される細孔の断面を狭くでき、従っ
て必要充分な粘性抵抗の値に上げることができてキャビ
ティーへの液状樹脂の流れ込みを阻止できる。
By using the annular spacer formed by the laminate having the low elastic layer and the high elastic layer with the low elastic layer side facing down, the pressure is applied to the space between the conductor patterns in the low elastic layer of the annular spacer. The elastic cross section that occupies a part of the conductor pattern can be caused to narrow the cross section of the pores formed between the conductor patterns, and therefore the necessary and sufficient viscous resistance value can be raised to prevent the liquid resin from flowing into the cavity. it can.

プリプレグの樹脂液は、環状スペーサーの内側面に接触
し、環状スペーサーの上面の接触面の隙間に僅かに進入
し、環状スペーサーの下面の導体パターン間に挟まれる
面の一部と接するので、硬化後において環状スペーサー
を回路基板と回路基板の間のプリプレグによる接着層の
内側に接着一体化させることができる。
The resin liquid of the prepreg contacts the inner surface of the annular spacer, slightly enters the gap between the contact surfaces on the upper surface of the annular spacer, and contacts a part of the surface sandwiched between the conductor patterns on the lower surface of the annular spacer, Later, the annular spacer can be bonded and integrated inside the adhesive layer of the prepreg between the circuit boards.

環状スペーサーの上・下の面を粗面化すると、上下の回
路基板と当接する際に接触面の摩擦係数が大となり、プ
リプレグの樹脂分の液状化に伴う滑り易さを押さえて上
下の回路基板間の位置ずれを防止することができる。ま
た、環状スペーサーの上・下の面の粗面化による接着面
積の増大により、環状スペーサーの接着強度を増すこと
ができる。
If the upper and lower surfaces of the annular spacer are roughened, the friction coefficient of the contact surface becomes large when they come into contact with the upper and lower circuit boards, and the slipperiness associated with the liquefaction of the resin component of the prepreg is suppressed to prevent the upper and lower circuits. It is possible to prevent positional displacement between the substrates. Further, the adhesive strength of the annular spacer can be increased by increasing the adhesive area by roughening the upper and lower surfaces of the annular spacer.

[実施例] 以下、実施例を第1図、第2図を用いて説明する。第1
図は二層回路基板の例で電子部品収容用のキャビティー
が略正四角柱状に一段に形成してある。第2図は三層回
路基板の例で電子部品収容用のキャビティーが略正四角
柱状部を二段に重ねた形状に形成してある。尚、各段に
用いられる回路基板に両面回路基板、或いは二層以上の
多層回路基板を用いることにより回路層数を増やすこと
もできる。
Example An example will be described below with reference to FIGS. 1 and 2. First
The figure shows an example of a two-layer circuit board in which cavities for accommodating electronic components are formed in one step in a substantially square prism shape. FIG. 2 shows an example of a three-layer circuit board in which a cavity for accommodating an electronic component is formed in a shape in which two substantially square columnar portions are stacked. The number of circuit layers can be increased by using a double-sided circuit board or a multi-layer circuit board having two or more layers for the circuit board used in each stage.

第1図の電子部品搭採用二層回路基板は、半導体素子等
の電子部品を搭載する位置の周囲に適数個の導体パター
ンを整列形成してなるボンディングパッドaを設けた回
路基板Aの上に、ボンディングパッドaの外径と同寸の
貫通孔φを形成しこの貫通孔φの周りに適数個の導体パ
ターンを整列形成してなるボンディングパッドbを設け
た環状の回路基板Bを、間に回路基板Bの断面正方形の
貫通孔φより大径の断面正方形の貫通孔ψを形成したプ
リプレグシートC及びこのプリプレグシートCの内側に
外径が上記貫通孔ψより若干小さい外径で内径が回路基
板Bの上記貫通孔φと同寸の四角状の環状スペーサーD
を介して二段に積み重ね、これを加熱・加圧して回路基
板A,B間にプリプレグによる接着層C′を形成して一体
化させた構造のものである。
The two-layer circuit board using electronic components shown in FIG. 1 is a circuit board A provided with bonding pads a formed by aligning and forming an appropriate number of conductor patterns around the position where electronic components such as semiconductor elements are mounted. And a ring-shaped circuit board B provided with a bonding pad b formed by forming a through hole φ having the same size as the outer diameter of the bonding pad a and forming an appropriate number of conductor patterns in an array around the through hole φ. A prepreg sheet C in which a through-hole ψ having a square cross-section having a diameter larger than that of the through-hole φ having a square cross-section of the circuit board B is formed, and an outer diameter inside the prepreg sheet C is slightly smaller than the through-hole ψ. Is a square annular spacer D having the same size as the through hole φ of the circuit board B.
It has a structure in which it is stacked in two stages via a sheet and is heated and pressed to form an adhesive layer C'by prepreg between the circuit boards A and B to be integrated.

第2図の電子部品搭採用三層回路基板は、半導体素子等
の電子部品を搭載する位置の周囲に適数個の導体パター
ンを整列形成してなるボンディングパッドaを設けた回
路基板Aの上に、ボンディングパッドaの外径と同寸の
貫通孔φを形成しこの貫通孔φの周りの適数個の導
体パターンを整列形成してなるボンディングパッドb1
設けた環状の回路基板B1を、間に回路基板B1の断面正方
形の貫通孔φより大径の断面正方形の貫通孔ψを形
成したプリプレグシートC1及びこのプリプレグシートC1
の内側に外径が上記貫通孔ψより若干小さい外径で内
径が回路基板B1の上記貫通孔φと同寸の四角状の環状
スペーサーD1を介して積み重ね、更にこの上にボンディ
ングパッド2の外径と同寸の貫通孔φを形成しこの貫
通孔φの周りに適数個の導体パターンを整列形成して
なるボンディングパッドb2を設けた環状の回路基板B
2を、間に回路基板B2の断面正方形の貫通孔φより大
径の断面正方形の貫通孔ψを形成したプリプレグシー
トC2及びこのプリプレグシートC2の内側に外径が上記貫
通孔ψより若干小さい外径で内径が回路基板B2の上記
貫通孔φと同寸の四角状の環状スペーサーD2を介して
三段に積み重ねこれを加熱・加圧して回路基板AとB1
の間に、回路基板B1とB2との間にプリプレグによる接着
層C′,C″を形成して一体化させた構造のものである。
The three-layer circuit board employing electronic components shown in FIG. 2 is a circuit board A provided with a bonding pad a formed by arranging an appropriate number of conductor patterns in an array around a position where an electronic component such as a semiconductor element is mounted. , An annular circuit board provided with a bonding pad b 1 formed by forming a through hole φ 1 having the same size as the outer diameter of the bonding pad a and forming an appropriate number of conductor patterns around the through hole φ 1 in an aligned manner. the B 1, prepreg sheet C 1 and prepreg sheet C 1 was formed a through-hole [psi 1 of the large diameter of the cross section square than the through-hole phi 1 of a square cross section of the circuit board B 1 between
The outer diameter is slightly smaller than that of the through hole ψ 1 , and the inner diameter is stacked via a square annular spacer D 1 of the same size as the through hole φ 1 of the circuit board B 1 and further bonded onto this. An annular circuit board B provided with a bonding pad b 2 formed by forming a through hole φ 2 having the same size as the outer diameter of the pad 2 and forming an appropriate number of conductor patterns around the through hole φ 2.
2 , a prepreg sheet C 2 in which a through hole ψ 2 having a square cross section larger than the through hole φ 2 having a square cross section of the circuit board B 2 is formed, and the through hole having an outer diameter inside the prepreg sheet C 2 slightly smaller outside diameter inside diameter of the circuit board B 2 the through hole phi 2 and the circuit board a heated and pressed so stacked three stages through a rectangular annular spacer D 2 of the same size B than [psi 2 between 1, it is of the adhesive layer C ', were integrated to form a C "structure according to the prepreg between the circuit board B 1 and B 2.

環状スペーサーは回路基板の絶縁樹脂と同種の材質で形
成しても良く、回路基板の絶縁樹脂とほぼ同一の特性を
有するものであればよい。
The annular spacer may be formed of the same material as the insulating resin of the circuit board, and may be any material as long as it has substantially the same characteristics as the insulating resin of the circuit board.

環状スペーサーの上下面の片面または両面を粗面化、例
えばエンボス加工すると上下の回路基板間の位置ずれが
極めて少なくなり、また環状スペーサーの上下の面の接
着が良好であった。尚、環状スペーサーの粗面化が大き
くなり過ぎると、環状スペーサーの粗面の隙間を伝わっ
てプリフレグの樹脂液が流れ出るようになるので粗面化
の程度に限界が生じる。
When one or both surfaces of the upper and lower surfaces of the annular spacer were roughened, for example, embossed, the positional displacement between the upper and lower circuit boards was extremely reduced, and the upper and lower surfaces of the annular spacer were bonded well. When the roughening of the annular spacer becomes excessively large, the resin liquid of the prepreg comes to flow out through the gap of the rough surface of the annular spacer, so that the degree of roughening is limited.

また、環状スペーサーの材質は絶縁性のものであればよ
いが、回路基板の硬度より大きい硬度のものを選べばワ
イヤーボンディングを良好に行うことができる。
Further, the material of the annular spacer may be an insulating material, but if a material having a hardness higher than the hardness of the circuit board is selected, the wire bonding can be favorably performed.

上記実施例は電子部品を収容するためのキャビティーの
形状が断面正方形のものを例に説明したが、キャビティ
ーの形状は電子部品の種類や形状により適宜に設定され
るものであって環状スペーサーの形状もそのキャビティ
ーの形状に合わせて適宜に決まることになる。
In the above embodiment, the shape of the cavity for accommodating the electronic component is described as an example having a square cross section, but the shape of the cavity is appropriately set according to the type and shape of the electronic component, and the annular spacer The shape of will also be appropriately determined according to the shape of the cavity.

[考案の効果] 本願考案の電子部品搭採用多層回路基板は、 プリプレグ樹脂による接着層の厚みが環状のスペー
サーの厚みによって一定になり、こりことにより全体の
厚みを所望の値にすることが容易になる。
[Effects of the Invention] In the multilayer circuit board employing the electronic component of the present invention, the thickness of the adhesive layer made of the prepreg resin becomes constant depending on the thickness of the annular spacer, and it is easy to make the entire thickness to a desired value due to the dust. become.

環状のスペーサーにより上下の回路基板を支えるの
で、上下の回路基板間の位置ずれが少なくなる。
Since the upper and lower circuit boards are supported by the annular spacer, the positional displacement between the upper and lower circuit boards is reduced.

環状のスペーサーにより、プリプレグの樹脂液のボ
ンディングパッド部への流れ出を阻止することができ
る。
The annular spacer can prevent the resin liquid of the prepreg from flowing out to the bonding pad portion.

環状のスペーサーを厚み方向に低弾性体層と高弾性
体層を有する積層体で形成すると、導体パターン間の細
孔の断面積を狭めることができてプリプレグの樹脂液の
ボンディングパッド部への流れ出を阻止することができ
る。
If the annular spacer is formed of a laminate that has a low-elasticity layer and a high-elasticity layer in the thickness direction, the cross-sectional area of the pores between the conductor patterns can be narrowed, and the resin liquid of the prepreg flows out to the bonding pad section. Can be blocked.

環状スペーサーの上・下の面を粗面化すると、環状
スペーサーの上・下の面の接着状態が良好になり、接着
強度も増す。また、 環状スペーサーの上・下の面を粗面化すると、上下
の回路基板との摩擦係数が大となって回路基板間の位置
ずれ防止に寄与する。
When the upper and lower surfaces of the annular spacer are roughened, the adhesive condition of the upper and lower surfaces of the annular spacer is improved and the adhesive strength is also increased. Further, when the upper and lower surfaces of the annular spacer are roughened, the coefficient of friction with the upper and lower circuit boards becomes large, which contributes to the prevention of displacement between the circuit boards.

環状スペーサーの硬度を回路基板のそれより大にす
るすることにより、ワイヤーボンディングを良好に行う
ことができる。
By making the hardness of the annular spacer larger than that of the circuit board, good wire bonding can be performed.

等々の効果がある。And so on.

【図面の簡単な説明】[Brief description of drawings]

第1図,第2図は本願考案の実施例を説明する破断面
図、第3図(イ)は従来例を説明する正面図、第3図
(ロ)は第3図(イ)のIII−III′断面図、第4図は従
来例を説明する要部の拡大断面図であることを示す。 A…回路基板、a…回路基板Aのボンディングパッド、
B,B1,B2…それぞれ環状の回路基板、b,b1,b2…それぞ
れ環状の回路基板のボンディングパッド、C,C1,C2…そ
れぞれプリプレグシート、C′,C″…それぞれ接着層、
D,D1,D2それぞれ環状スペーサー。
1 and 2 are sectional views for explaining an embodiment of the present invention, FIG. 3 (a) is a front view for explaining a conventional example, and FIG. 3 (b) is III of FIG. 3 (a). -III 'sectional view, FIG. 4 shows that it is an enlarged sectional view of the principal part for explaining the conventional example. A ... Circuit board, a ... Bonding pad of circuit board A,
B, B 1 , B 2 ... Each ring circuit board, b, b 1 , B 2 ... Each ring circuit board bonding pad, C, C 1 , C 2 ... Each prepreg sheet, C ', C "... Each Adhesive layer,
Ring spacers for D, D 1 and D 2 respectively.

Claims (1)

【実用新案登録請求の範囲】[Scope of utility model registration request] 【請求項1】回路基板の貫通孔を形成した回路基板をプ
リプレグを介してN(但し、Nは2以上の整数を示す)
段に積み重ね、これを加熱・加圧して回路基板間にプリ
プレグによる接着層を形成して一体化することにより、
中心部に電子部品を収容するするためのキャビティーを
形成した電子部品搭載用多層回路基板において、回路基
板と回路基板の間であってプリプレグによる接着層の内
側に、厚み方向に低弾性体層と高弾性体層を有する積層
体で形成した環状のスペーサーを接着一体化させて設け
たことを特徴とする電子部品搭載用多層回路基板。
1. A circuit board having a through hole formed in the circuit board through a prepreg through N (where N represents an integer of 2 or more).
By stacking them in stages, heating and pressing them to form an adhesive layer of prepreg between the circuit boards and integrating them,
In a multilayer circuit board for mounting electronic parts, which has a cavity for accommodating electronic parts in a central portion, in a thickness direction, a low elastic body layer is provided between circuit boards and inside an adhesive layer by a prepreg. A multi-layer circuit board for mounting electronic parts, characterized in that an annular spacer formed of a laminated body having a high-elasticity layer is integrally bonded and provided.
JP1989100948U 1989-08-29 1989-08-29 Multilayer circuit board for mounting electronic components Expired - Lifetime JPH0735414Y2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP1989100948U JPH0735414Y2 (en) 1989-08-29 1989-08-29 Multilayer circuit board for mounting electronic components

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP1989100948U JPH0735414Y2 (en) 1989-08-29 1989-08-29 Multilayer circuit board for mounting electronic components

Publications (2)

Publication Number Publication Date
JPH0339878U JPH0339878U (en) 1991-04-17
JPH0735414Y2 true JPH0735414Y2 (en) 1995-08-09

Family

ID=31649925

Family Applications (1)

Application Number Title Priority Date Filing Date
JP1989100948U Expired - Lifetime JPH0735414Y2 (en) 1989-08-29 1989-08-29 Multilayer circuit board for mounting electronic components

Country Status (1)

Country Link
JP (1) JPH0735414Y2 (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2014125894A1 (en) * 2013-02-15 2014-08-21 株式会社村田製作所 Laminated circuit substrate

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2006179733A (en) * 2004-12-24 2006-07-06 Casio Comput Co Ltd Multilayer wiring board and its manufacturing method
KR101297482B1 (en) * 2013-05-08 2013-08-16 이흥재 Laundry drying rack stick on ceiling

Family Cites Families (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0722224B2 (en) * 1986-09-26 1995-03-08 三菱瓦斯化学株式会社 Method for manufacturing multi-layer board for mounting IC chip
JPH0722225B2 (en) * 1986-09-26 1995-03-08 三菱瓦斯化学株式会社 Method for manufacturing multi-layer board for mounting IC chip

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2014125894A1 (en) * 2013-02-15 2014-08-21 株式会社村田製作所 Laminated circuit substrate

Also Published As

Publication number Publication date
JPH0339878U (en) 1991-04-17

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