JPH07335702A - Probe card - Google Patents

Probe card

Info

Publication number
JPH07335702A
JPH07335702A JP6156698A JP15669894A JPH07335702A JP H07335702 A JPH07335702 A JP H07335702A JP 6156698 A JP6156698 A JP 6156698A JP 15669894 A JP15669894 A JP 15669894A JP H07335702 A JPH07335702 A JP H07335702A
Authority
JP
Japan
Prior art keywords
probe card
wafer state
tested
wiring pattern
pad
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Withdrawn
Application number
JP6156698A
Other languages
Japanese (ja)
Inventor
Koji Asami
幸司 浅見
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Advantest Corp
Original Assignee
Advantest Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Advantest Corp filed Critical Advantest Corp
Priority to JP6156698A priority Critical patent/JPH07335702A/en
Publication of JPH07335702A publication Critical patent/JPH07335702A/en
Withdrawn legal-status Critical Current

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  • Testing Or Measuring Of Semiconductors Or The Like (AREA)
  • Measuring Leads Or Probes (AREA)

Abstract

PURPOSE:To make it possible to detect directly voltage shape of a wiring pattern inside a test IC to be tested at the same time while transmitting a signal and receiving it during the testing time of ICs in a wafer state by constituting a probe card with a combination between a membrane method and an EP probing method. CONSTITUTION:There exists a conductor projection 11, which comes in contact with a pad of an IC to be tested in a wafer state, on the bottom of a probe card and wired by way of an outside terminal 13 and a membrane 10 and a printed board 12, thereby constituting a membrane method. An electrooptic crystal whose bottom is treated with a reflective film 21 is used for an upper part of the tested IC where a laser beam is irradiated from above, thereby constituting an EO probing method. This construction makes it possible to embody a probe card capable of directly detecting voltage shape of a wiring pattern inside the IC at the same time while transmitting a signal to and receiving it from a pad of the tested IC in the wafer state.

Description

【発明の詳細な説明】Detailed Description of the Invention

【0001】[0001]

【産業上の利用分野】本発明は、ウェハー状態でのIC
試験において、被試験ICのパッドに導体突起を接触さ
せて信号を授受しながら、被試験IC内部の回路配線パ
ターンの電圧波形を検出するためのプローブカードに関
するものである。
BACKGROUND OF THE INVENTION The present invention relates to an IC in a wafer state.
In a test, the present invention relates to a probe card for detecting a voltage waveform of a circuit wiring pattern inside an IC under test while transmitting and receiving a signal by bringing a conductor protrusion into contact with a pad of the IC under test.

【0002】[0002]

【従来の技術】最近の半導体技術の進歩はめざましく、
ICやLSIの高集積化の進展には目をみはるものがあ
る。これに伴って、回路パターンは微細化し、欠陥の箇
所は飛躍的に多くなるので、歩留まり確保が重要な課題
となっている。歩留まりを改善するため、ICの研究・
開発あるいは検査・故障解析における試験・評価が非常
に重要になってきた。特にウェハー状態でのICの試験
・評価においては被試験ICのパッドに機械式プローバ
を接触し、ICテスタによる端子からの動作試験をする
方法では不十分であり、IC内部の配線パターンを直接
的に波形観測する要求が強くなってきた。
2. Description of the Related Art Recent advances in semiconductor technology are remarkable.
The progress of high integration of ICs and LSIs is remarkable. Along with this, the circuit pattern becomes finer, and the number of defective spots dramatically increases. Therefore, securing yield is an important issue. IC research to improve yield
Testing and evaluation in development, inspection and failure analysis have become very important. In particular, in the IC test / evaluation in the wafer state, the method of contacting the pad of the IC under test with the mechanical prober and performing the operation test from the terminal by the IC tester is not sufficient, and the wiring pattern inside the IC is The demand for waveform observation has become stronger.

【0003】図3に外部端子13と導体突起11を弾力
性のある薄い板状のメンブレン10と、プリント基板1
2を通して導体で配線接続したメンブレン方式のプロー
ブカードを示す。この場合、導体突起11は、最短で約
100μmピッチのパッドに接触することができ、プロ
ーブ針でパッドに接触させるより短いピッチのパッドに
安定して接触できる。しかし、上記のように、ウェハー
状態で被試験ICのパッドに導体を接触し、ICテスタ
により端子から動作試験をする方法では不十分であり、
同時にIC内部の配線パターンの電圧波形を直接検出す
ることが要求されている。
In FIG. 3, the external terminals 13 and the conductor projections 11 are elastic thin plate-like membranes 10 and the printed circuit board 1.
2 shows a membrane type probe card in which wiring is connected by a conductor through 2. In this case, the conductor protrusion 11 can contact a pad with a pitch of about 100 μm at the shortest, and can stably contact a pad with a shorter pitch than that with which the probe needle contacts the pad. However, as described above, the method of bringing the conductor into contact with the pad of the IC under test in the wafer state and performing the operation test from the terminal by the IC tester is not sufficient,
At the same time, it is required to directly detect the voltage waveform of the wiring pattern inside the IC.

【0004】[0004]

【発明が解決しようとする課題】以上のように、ウェハ
ー状態で被試験ICのパッドからICテスタを使って信
号の授受をしながら、同時にIC内部の配線パターンの
電圧波形を直接検出することが要求されている。これを
解決する方法として、電子ビームをIC表面に照射した
ときに発生する2次電子を利用する電子ビームテスタが
ある。電子ビームテスタは、高い空間分解能を有する非
接触の計測法であり有効なツールである。しかし、この
方法は被試験ICを真空環境におく必要がり、一つの欠
点となっている。被試験ICを真空環境におく必要があ
るという、電子ビームテスタにおける欠点を補った計測
法として、電気光学結晶とレーザ光を用いたEOプロー
ビング方式がある。本発明は、ウェハー状態でのIC試
験において、被試験ICのパッドから信号を授受しなが
ら、同時に被試験IC内部の配線パターンの電圧波形を
直接検出するためのプローブカードを実現することを目
的としている。
As described above, it is possible to directly detect the voltage waveform of the wiring pattern inside the IC while transmitting and receiving the signal from the pad of the IC under test using the IC tester in the wafer state. Is required. As a method for solving this, there is an electron beam tester that uses secondary electrons generated when the IC surface is irradiated with an electron beam. The electron beam tester is a non-contact measurement method with high spatial resolution and is an effective tool. However, this method has one drawback because it requires that the IC under test be placed in a vacuum environment. There is an EO probing method using an electro-optic crystal and a laser beam as a measurement method that compensates for the defect in the electron beam tester that the IC under test needs to be placed in a vacuum environment. It is an object of the present invention to realize a probe card for directly detecting a voltage waveform of a wiring pattern inside an IC under test while transmitting / receiving a signal from a pad of the IC under test in an IC test in a wafer state. There is.

【0005】[0005]

【課題を解決するための手段】上記目的を達成するため
に、本発明のプローブカードにおいては、ウェハー状態
で被試験ICのパッドから信号を授受するために上記メ
ンブレン方式を、IC内部の配線パターンの電圧波形を
直接検出するために上記EOプロービング方式を取り入
れている。メンブレン方式においては、ウェハー状態で
被試験ICのパッドに接触させるための複数の導体突起
を底面に形成している。複数の導体突起は、それぞれを
接続する外部端子まで、弾力性のある薄い板状のメンブ
レン、及びプリント基板を通して配線接続されている。
EOプロービング方式においては、被試験IC上部にあ
たる部分に電気光学結晶を構成している。電気光学結晶
の底面には反射膜が施され、上部から照射するレーザ光
を反射する。
In order to achieve the above object, in the probe card of the present invention, the above-mentioned membrane method is used for transferring signals from the pads of the IC under test in a wafer state, and the wiring pattern inside the IC is used. The above EO probing method is adopted to directly detect the voltage waveform of. In the membrane method, a plurality of conductor protrusions for contacting the pads of the IC under test in a wafer state are formed on the bottom surface. The plurality of conductor protrusions are connected to the external terminals connecting the conductor protrusions through an elastic thin plate-shaped membrane and a printed circuit board.
In the EO probing system, an electro-optic crystal is formed in the portion above the IC to be tested. A reflective film is provided on the bottom surface of the electro-optic crystal, and reflects the laser light emitted from above.

【0006】[0006]

【作用】以上の二つの方式を組み合わせて構成すること
で、ウェハー状態で、被試験ICのパッドから信号の授
受をしながら、同時にIC内部の配線パターンの電圧波
形を直接検出することができる。
By combining the above two methods, it is possible to directly detect the voltage waveform of the wiring pattern inside the IC while transferring signals from the pads of the IC under test in the wafer state.

【0007】[0007]

【実施例】図2にEOプロービングの測定原理を示す。
IC上の配線パターン34の周囲には信号の電圧に依存
した電気力線が分布している。この配線パターン34に
電気光学効果を有する電気光学結晶30を近づけると、
電気力線がこの結晶を横切り、電気光学効果によって、
結晶の屈折率が変化する。この結晶中に対物レンズ31
を通してレーザ光を入射すると、屈折率の変化によって
レーザ光の偏光面が回転する。電気光学結晶30の底面
には反射膜を施してあるため、入射されたレーザ光は結
晶の底面で反射され、偏光ビームスプリッタ32に達す
る。偏光ビームスプリッタ32によって、レーザ光の偏
光面の変化は光の強度変化に変換される。これを光検出
器33で受光すると、入力信号波形に応じた出力波形を
得ることができる。EOプロービングは、高速性、非接
触性を特徴としており、IC内部の配線パターンの電圧
波形を計測するためのすぐれた特徴をもっている。
EXAMPLE FIG. 2 shows the measurement principle of EO probing.
The lines of electric force depending on the voltage of the signal are distributed around the wiring pattern 34 on the IC. When the electro-optic crystal 30 having the electro-optic effect is brought close to the wiring pattern 34,
Electric lines of force cross this crystal, and due to the electro-optic effect,
The refractive index of the crystal changes. Objective lens 31 in this crystal
When laser light is incident through the laser light, the polarization plane of the laser light rotates due to the change in the refractive index. Since the reflection film is provided on the bottom surface of the electro-optic crystal 30, the incident laser light is reflected by the bottom surface of the crystal and reaches the polarization beam splitter 32. The polarization beam splitter 32 converts a change in the polarization plane of the laser light into a change in the light intensity. When this is received by the photodetector 33, an output waveform corresponding to the input signal waveform can be obtained. The EO probing is characterized by high speed and non-contact, and has an excellent feature for measuring the voltage waveform of the wiring pattern inside the IC.

【0008】図1に本発明のプローブカードの断面を示
す。底面にはウェハー状態で被試験ICのパッドに接触
する導体突起11があり、外部端子13と、メンブレン
10及びプリント基板12を通して配線接続されてお
り、メンブレン方式を構成している。また、被試験IC
の上部にあたる部分には、底面に反射膜21を施した電
気光学結晶20が使用され、上部からレーザ光を照射す
ることで、EOプロービング方式を構成している。以上
の二つの方式を組み合わせて構成することで、ウェハー
状態で被試験ICのパッドから信号の授受をしながら、
同時にIC内部の配線パターンの電圧波形を直接検出す
るためのプローブカードを実現できる。
FIG. 1 shows a cross section of the probe card of the present invention. On the bottom surface, there is a conductor protrusion 11 that comes into contact with the pad of the IC under test in a wafer state, and the wiring is connected to the external terminal 13 through the membrane 10 and the printed board 12 to form a membrane system. Also, the IC under test
An electro-optic crystal 20 having a reflective film 21 on the bottom surface is used for the upper part of the, and an EO probing system is constituted by irradiating a laser beam from the upper part. By configuring the above two methods in combination, while transferring signals from the pads of the IC under test in the wafer state,
At the same time, it is possible to realize a probe card for directly detecting the voltage waveform of the wiring pattern inside the IC.

【0009】[0009]

【発明の効果】本発明は、以上説明したように構成され
ているので、ウェハー状態で被試験ICのパッドから信
号の授受をしながら、同時にIC内部の配線パターンの
電圧波形を直接検出するためのプローブカードを実現し
ており、ICの研究・開発あるいは検査・故障解析にお
けるウェハー状態でのICの試験・評価に有効に活用で
きる。
Since the present invention is constructed as described above, it is possible to directly detect the voltage waveform of the wiring pattern inside the IC while transmitting and receiving the signal from the pad of the IC under test in the wafer state. , Which can be effectively used for IC testing / evaluation in the wafer state in IC research / development or inspection / fault analysis.

【図面の簡単な説明】[Brief description of drawings]

【図1】本発明のプローブカードの断面図である。FIG. 1 is a cross-sectional view of a probe card of the present invention.

【図2】EOプロービングの測定原理を示す説明図であ
る。
FIG. 2 is an explanatory diagram showing the measurement principle of EO probing.

【図3】従来のメンブレン方式のプローブカードの断面
図である。
FIG. 3 is a cross-sectional view of a conventional membrane type probe card.

【符号の説明】[Explanation of symbols]

10 メンブレン 11 導体突起 12 プリント基板 13 外部端子 20、30 電気光学結晶 21 反射膜 31 対物レンズ 32 偏光ビームスプリッタ 33 光検出器 34 配線パターン 10 Membrane 11 Conductor Protrusion 12 Printed Circuit Board 13 External Terminals 20, 30 Electro-Optical Crystal 21 Reflective Film 31 Objective Lens 32 Polarizing Beam Splitter 33 Photodetector 34 Wiring Pattern

Claims (1)

【特許請求の範囲】[Claims] 【請求項1】 弾力性のある薄い板状のメンブレン(1
0)と、プリント基板(12)とを通して、外部端子
(13)と配線接続された複数の導体突起(11)と、 上記導体突起(11)の上部に構成した、底面に反射膜
(21)を施した電気光学結晶(20)と、 を具備することを特徴とするプローブカード。
1. A thin plate-shaped membrane (1) having elasticity.
0) and the printed circuit board (12), and a plurality of conductor protrusions (11) wired and connected to the external terminals (13), and a reflective film (21) formed on the conductor protrusions (11) on the bottom surface. A probe card comprising: an electro-optic crystal (20) that has been subjected to.
JP6156698A 1994-06-15 1994-06-15 Probe card Withdrawn JPH07335702A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP6156698A JPH07335702A (en) 1994-06-15 1994-06-15 Probe card

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP6156698A JPH07335702A (en) 1994-06-15 1994-06-15 Probe card

Publications (1)

Publication Number Publication Date
JPH07335702A true JPH07335702A (en) 1995-12-22

Family

ID=15633389

Family Applications (1)

Application Number Title Priority Date Filing Date
JP6156698A Withdrawn JPH07335702A (en) 1994-06-15 1994-06-15 Probe card

Country Status (1)

Country Link
JP (1) JPH07335702A (en)

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Legal Events

Date Code Title Description
A300 Withdrawal of application because of no request for examination

Free format text: JAPANESE INTERMEDIATE CODE: A300

Effective date: 20010904