JPH0731692B2 - Circuit wiring resistance calculation method - Google Patents

Description

The present invention relates to a circuit wiring resistance calculation method for calculating a circuit wiring resistance from layout data of a large-scale semiconductor integrated circuit.

[Conventional technology]

When the layout data used for manufacturing the semiconductor device is created, wiring parasitic parameters of the circuit are extracted to check whether the electrical characteristics of the manufactured semiconductor device satisfy predetermined specifications from the layout data.
In this case, the designer manually calculates the wiring length and the wiring area from the drawing in which the layout data is drawn, and manually calculates the wiring length and the wiring area.

Conventionally, as a technique for calculating a wiring parasitic resistance, which is one of such parasitic parameters, by an electronic computer, the input layout data is divided into trapezoids, the parameters are calculated for each trapezoidal element, and the trapezoidal elements are combined. Starting from the starting point graphic element called Lee's algorithm, the adjacent graphic elements are numbered 1, 2, 3, ... in order, and when the final point graphic element is reached, the numbers are reversed. In some cases, the current value was obtained by tracing, and the resistances of the elements on this path were summed to obtain the resistance value.

[Problems to be solved by the invention]

The above-mentioned method of calculating the wiring resistance by the electronic calculator uses a simple trapezoidal division, which has a drawback that the accuracy of the obtained resistance is not reflected because the current direction and the potential distribution are not reflected. Since there are many trapezoids and it takes time and effort to trace the current path, there are drawbacks such as not being suitable for processing large-scale layout data at high speed.

An object of the present invention is to solve these drawbacks, and to provide a resistance calculation method for circuit wiring in which the resistance value can be calculated easily and at high speed by dividing the wiring pattern into predetermined fixed elements. is there.

[Means for solving problems]

According to the configuration of the circuit wiring resistance calculation method of the present invention, layout data of a wiring pattern consisting of rectangular and polygonal figure data is divided into basic figures in the current direction, and these figures are drawn as straight lines, corners, branches and contacts. Is divided into simple graphic elements, the wiring resistance is calculated for each of these graphic elements, and then the total resistance value of the wiring pattern is calculated.

〔Example〕

 Next, the present invention will be described in detail with reference to the drawings.

FIG. 1 (a) is a flow chart for explaining an embodiment of the present invention,
1 (b) and 1 (c) are detailed flow charts of the second and third steps of FIG.

In this embodiment, the wiring pattern is input in step 1. When various wiring patterns are examined, the state of potential distribution is different in the straight line portion, the bend (corner) portion, the vicinity of the contact, and the branch portion. Most of the wiring is classified into a straight line portion and a corner portion, but the resistance value of these portions can be calculated by a simple calculation without relying on numerical calculation. Therefore, in step 2, the reference figure is divided according to the current direction of the wiring. Further, in step 3, these reference figures are classified into linear wiring elements, corner wiring elements, branch wiring elements, contact elements, etc., and recognized, and in step 4 the resistance value is calculated for each element, and in step 5, each of these is calculated. The resistance values of the entire wiring pattern are calculated by integrating the resistance values of the elements.

The figure dividing method of step 2 of this embodiment is shown in FIG.
Shown in. First, cut lines are drawn in the horizontal and vertical directions from the vertices of the wiring pattern input in step 11, and if the cut lines intersect each other in step 12, select the shorter cut line and delete the longer one so that they do not intersect each other. The wiring pattern is divided by. Further, in step 13, among the parallel line segments adjacent to each other among the cutting lines, those having a length of "1" or more in the vertical direction of the line segment among the line segment lengths are erased and divided into respective reference patterns.

Further, in the contact element recognition method of step 3, as shown in FIG. 1C, it is judged in step 21 whether or not the data of the contact hole is included in each divided figure after the figure division, and the contact is included. With respect to the divided figure, the vicinity of the contact is recognized by dividing the divided figure perpendicularly to the current direction at a certain distance along the current direction recognized from the positional relationship between the contact and the cut line. Among the divided figure elements after the figure division and contact element recognition as described above, those including a contact are set as contact elements in step 22.

Next, in step 23, it is determined that the divided figure element that does not include contacts has only one cutting line, it is determined as a dead end element in step 24, and it is determined in step 25 whether there are three or more cutting lines. In step 26, those with 3 or more cutting lines are used as branch elements, in step 27, those with 2 cutting lines that are not adjacent are linear wiring elements, and those with 2 cutting lines and those that are adjacent are corners. Classify as a wiring element. Of these, it is not necessary to obtain the resistance value for the dead-end element, so the process ends.

Next, as in steps 22, 26, and 27, the resistance value is calculated for each element, and the resistance value may be integrated in step 28. However, for the straight line wiring element and the corner wiring element, the resistance value is calculated by a simple calculation. be able to. Although it takes a little time for the contact element and the branch element, even if they are obtained by using a numerical solution or the like, the number of contact elements and branch elements is smaller than that of the straight line wiring element and the corner wiring element, so that the overall high speed is not deteriorated. If a high-speed simple calculation method is applied to the contact element and the branch element, the calculation speed can be further increased.

FIGS. 2A, 2B, and 2C are layout diagrams showing an example of a wiring pattern for extracting wiring parasitic resistance by applying this embodiment. This wiring pattern consists of a wiring pattern W1 made of the same material and three contact
It consists of hall patterns C1, C2, and C3. This wiring pattern W1 is in contact with wirings of other materials at the portions indicated by contacts (patterns) C1, C2, C3, and is electrically connected.
Here, it is assumed that the value of the wiring resistance from the contact C1 to the contact C2 is obtained.

In this embodiment, first, the wiring pattern is divided into figures. Second
FIG. 2B is a layout diagram for explaining this graphic division. S1 to S18 are horizontal from each vertex of the wiring pattern.
It is a cutting line of a figure drawn in the vertical direction. With these cutting lines S6
If line segments intersect each other like S5, S7 and S9, cut line S5
Select the shorter one such as or S9, and delete the longer one such as the cut lines S6 and S9. If line segments are adjacent and parallel to each other, such as cutting lines S1 and S2, S11 and S12, or S17 and S18, the line segment length and the size of the wiring pattern in the direction perpendicular to the line segment The line segment is deleted when the ratio exceeds a certain value (eg 1: 1). In FIG. 2 (b), l2: 1 = 1: 1
Therefore, the cut lines S1 and S2 are deleted. By thus selecting the line segments that become candidates for the cutting lines of the figure, as shown in FIG. 2C, the cutting lines S3, S4, S5, S8, S9, S10, S13, S14, S1
5, S16 is selected and remains. FIG. 2C shows a state after the wiring pattern shown in FIG. 2A is divided into figures.

After the figure division, the contact element is recognized. Third
FIG. 4 and FIG. 4 are plan views of patterns for explaining the recognition of contact elements. First, it is determined whether each divided figure includes a contact hole. The current direction of the divided figure including the contact hole is recognized from the positional relationship between the contact hole and the cutting line. Next, the figure is divided by a line segment perpendicular to the current direction at a position separated from the contact hole by a certain value along the current direction.

In FIG. 3, the current direction is parallel to the straight line connecting the centers of the contact holes C4 and C5. The cut lines S19 and S20 are cut lines that are perpendicular to the current direction at a distance m from the contact holes C4 and C5.

In FIG. 4, contact holes C6 and C7 and divided figures F1 to F3 by figure division are shown. The divided figure E1 includes the contact hole C6, and the current direction is parallel to the straight line connecting the midpoint of the cutting line S21 and the center of the contact hole C6. Distance m from contact hole C6 along the current direction
Figure E1 is not divided because E1 is included in the expanded range.

FIG. 5 is a layout diagram showing a state after the recognition of contact elements of the data of FIG. 2 (a) is completed. From this figure, it is understood that the cutting lines caused by the figure division and the contact element division in this embodiment are substantially parallel to the potential distribution, and that the straight line portion of the wiring is extracted without undergoing redundant division. .

Next, divide the graphic element into a straight line wiring element, a corner wiring element,
Classify into branch elements and contact elements. The divided figures E5, E7, E9, E11, E13 in FIG. 5 are straight line wiring elements, the figures E8, E12 are corner wiring elements, the figure E6 is a branch element, and the figures E4, E10, E14 are contact elements.

Next, the resistance value of each element is calculated.

The straight line wiring element is the resistance value calculation formula of the rectangular resistor (Ρ: sheet resistivity, L: rectangle length, W: rectangle width). Further, since the resistance value of the rectangular pattern in which the adjacent sides serve as the current inlet / outlet is given as a function of the ratio of the lengths of the current inlet / outlet sides, the resistance value of the corner wiring element can be obtained by this function. further,
For branching elements and contact elements, apply the numerical method or a simple calculation method instead. In this way, the resistance value of the divided figure elements of figures E4 to E10 is obtained,
The resistance values between the contact holes C1 and C2 in FIG. 2 (a) can be obtained by integrating and summing these.

〔The invention's effect〕

As described above, the present invention introduces a simple figure dividing method and a contact element recognizing method capable of dividing a wiring pattern into a linear wiring element, a corner wiring element, a branch element, and a contact branch element at high speed. There is an effect that wiring parasitic resistance can be extracted from large-scale layout data at high speed with sufficient accuracy.

[Brief description of drawings]

FIG. 1 (a) is a flow chart for explaining an embodiment of the present invention,
1 (b) and 1 (c) are detailed flow charts of steps 2 and 3 in FIG. 1 (a), and FIGS. 2 (a), 2 (b) and 2 (c) are layout diagrams of an example of wiring patterns, A plan view during the graphic division and a plan view after the graphic division, FIGS. 3 and 4 are plan views for explaining contact element recognition, and FIG. 5 is a graphic division of the wiring pattern in FIG. 2 (a). FIG. 3 is a plan view after further recognition of contact elements. 1-5, 11-13, 21-28 ... Processing steps, C1-C7 ... Contact holes, E1-E14 ... Divided graphic elements, S1-S18
...... Segment division line segment, S19 to S22 …… Figure division line, W1 ……
Wiring pattern.

Claims (1)

[Claims] 1. A wiring pattern layout data consisting of rectangular and polygonal figure data is divided into basic figures in the current direction, and each figure is divided into simple figure elements such as straight lines, corners, branches and contacts. Then, after calculating the wiring resistance for each of these graphic elements, the total resistance value of the wiring pattern is calculated.