JPH09128433A - Method for deciding diffusion resistance calculating expression for impurity diffusion layer in lsi circuit design - Google Patents

Abstract

PROBLEM TO BE SOLVED: To decide an optimum diffusion resistance calculation expression for impurity diffusion layer at the time of designing an LSI circuit. SOLUTION: A graphic constituting a layout L is extracted by a graphic extraction part 11. In a calculation expression storing table T, plural calculation expressions for calculating the diffusion resistance of impurity diffusion layer are prepared and each calculation expression is successively selected by a calculation expression selection part 13 to be given to a parameter extraction part 12. The parameter extraction part 12 applies the respective calculation expressions to a graphic constituting the impurity diffusion layer to obtain a diffusion resistance value as a parameter. A net list N is prepared through the use of this parameter and circuit simulation is executed by a circuit simulator 20 to obtain a delay time as a characteristic value V. On the other hand, an actual device is produced based on the layout L to obtain the device measurement value M of the delay time to select the characteristic value V closest to this measured value M by a comparator 30 and the calculation expression used to obtain the selected characteristic value V is decided to be the optimum calculation value.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for determining a diffusion resistance calculation formula for an impurity diffusion layer in an LSI circuit design, and more particularly, an optimum formula for calculating a diffusion resistance for an impurity diffusion layer in an LSI circuit design. On how to do.

[0002]

2. Description of the Related Art The degree of integration of LSIs has been dramatically improved, and at present, in the circuit design of LSIs, it is general to perform layout design, netlist creation, operation simulation, etc. using a computer. . That is,
Layout design is performed by combining individual layout components prepared as a library
Using a parameter extraction device called E (Layout Parameter Extraction) tool, various parameters are extracted from the designed layout, these parameters are applied to the created netlist, and simulation is performed using a circuit simulator. The procedure of making necessary corrections to the original layout based on this simulation result is repeated. With the LPE tool, various parameters are extracted from individual figures forming the layout by various methods. For example, the diffusion resistance value is extracted from the figure forming the impurity diffusion layer, and the subsequent simulation is performed using the extracted diffusion resistance value. Therefore, accurate parameter extraction must be performed in the LPE tool in order to obtain a highly accurate simulation result.

[0003]

When the diffusion resistance value is extracted as a parameter from the figure forming the impurity diffusion layer in the layout, the conventional LPE tool uses a predetermined single calculation formula for diffusion. The resistance value was calculated. However, it is not always possible to obtain an accurate diffusion resistance value with this single calculation formula. The shapes of the figures forming the impurity diffusion layer are various, and the number and positions of contacts for connecting the wiring layer to the impurity diffusion layer are different, so the same calculation formula is always applied to calculate. In that case, it is not possible to obtain a highly accurate resistance value. It is expected that the LSI will be further integrated in the future, and as the elements are further miniaturized, it becomes necessary to increase the accuracy of parameters such as the diffusion resistance value and perform highly accurate simulation.

However, a number of theoretical methods are known as methods for calculating the diffusion resistance value of an impurity diffusion layer, and there are a plurality of applicable calculation formulas even for the same impurity diffusion layer. . Then, a rigorous theoretical analysis is required to determine the optimum calculation formula from the plurality of calculation formulas. Therefore, in practice, it is very difficult to determine the optimum calculation formula, and as described above, the single calculation formula is approximately applied to all cases.

Therefore, an object of the present invention is to provide a method capable of efficiently determining an optimum calculation formula for calculating the diffusion resistance of an impurity diffusion layer in LSI circuit design.

[0006]

[Means for Solving the Problems]

(1) A first aspect of the present invention is a method of determining an optimum formula for calculating a diffusion resistance of an impurity diffusion layer at the time of designing an LSI circuit, in which a diffusion resistance of an impurity diffusion layer having a predetermined graphic shape is calculated. To prepare a plurality of calculation formulas for calculating the impurity diffusion layer from a predetermined LSI layout pattern, and to apply the plurality of prepared calculation formulas to the extracted graphic, respectively. A step of performing a calculation for calculating a value and a netlist corresponding to the LSI layout pattern are created, and the plurality of diffusion resistance values calculated in the previous step are applied to this netlist, and a simulation using a circuit simulator is performed. The step of obtaining the characteristic value indicating the delay time for each case where a plurality of diffusion resistance values are applied, and the actual data design based on the LSI layout pattern are used. Select the characteristic value that is closest to the characteristic value measured in the previous step from the steps of creating the device and actually measuring the characteristic value of this device, and from the multiple characteristic values obtained by simulation. And a step of determining the calculation formula used for calculating the diffusion resistance value corresponding to the characteristic value as an optimum formula for calculating the diffusion resistance of the impurity diffusion layer.

(2) The second aspect of the present invention is the above-mentioned first aspect.
In the determination method according to the above aspect, a graphic forming the impurity diffusion layer is approximated by a plurality of rectangular regions, and a calculation formula for calculating diffusion resistance based on the vertical and horizontal dimensions of each rectangular region is prepared.

(3) A third aspect of the present invention relates to the above-mentioned first aspect.
In the determination method according to the aspect (1), the figure forming the impurity diffusion layer is divided into a plurality of closed regions, and a calculation formula for calculating the diffusion resistance based on the area and the perimeter of each closed region is prepared. is there.

[0009]

BEST MODE FOR CARRYING OUT THE INVENTION Hereinafter, the present invention will be described based on illustrated embodiments. First, conventional general LS
The procedure of I circuit design work will be described with reference to the block diagram of FIG. First, the layout L is created using the LSI circuit design system using a computer. This layout L will be prepared as digital data. Then, the parameter extraction device 10 extracts parameters based on the individual figures forming the layout L. The parameter extraction device 10 is generally an LPE (Layo
ut Parameter Extraction) device, which is functionally a device having a figure extracting unit 11 and a parameter extracting unit 12. The figure extraction unit 11
Recognize each figure included in layout L,
The parameter extracting unit 12 has a function of extracting as an independent figure, and has a function of extracting various parameters from the extracted individual figures. The parameters extracted here indicate the electrical characteristics of the closed region formed by individual figures. For example, the diffusion resistance value is extracted as a parameter from the figures forming the impurity diffusion layer.

In this way, when the electrical parameters for each figure are extracted, the netlist N is created. The netlist N shows the connection relationship of the individual circuit elements included in the layout L, and the extracted parameters are applied to each part of the netlist N. That is, the netlist N not only indicates the connection relationship of individual circuit elements, but also indicates the electrical parameter of each circuit element. Then, the circuit simulator 20 performs a simulation based on the netlist N. As described above, the netlist N corresponds to a specific circuit showing the circuit elements to which electrical parameters have been given and the connection relationship between them, so that a predetermined input signal is given to the input terminal of this circuit. The output signal obtained at the output terminal,
Simulation can be performed by the circuit simulator 20. As the circuit simulator 20, a device such as "SPICE" is generally used.

Normally, the process of modifying the layout L is performed with reference to the result of the simulation by the circuit simulator 20, and the process of re-executing the simulation on the modified layout L in the same procedure is repeated. Be done.

As described above, since the simulation in the circuit simulator 20 is carried out based on the parameters extracted by the parameter extracting device 10, the accuracy of the parameters can be improved if the parameter extracting unit 12 does not perform the highly accurate parameter extracting operation. It is also impossible to obtain high simulation results. However, in the conventional parameter extraction device 10, when the value of the diffusion resistance of the impurity diffusion layer is extracted as the parameter, a single calculation formula is used, and therefore the parameter extraction with high accuracy is not always performed. Is the current situation.

FIG. 2 is a plan view showing each layer constituting a general MOSFET. This MOSFET has a gate region G, a source region S, and a drain region D. The gate region G is a conductive layer of metal or the like, while the source region S and the drain region D are impurity diffusion layers formed on the semiconductor substrate. The gate region G and the source region S
An insulating layer is formed between the drain region D and the drain region D, but it does not appear in this plan view. Further, a contact C is formed in each of the source region S and the drain region D, and a wiring layer (not shown) is connected to the contact C. Such MOS
The parameter to be extracted for the impurity diffusion layer (source region S and drain region D) forming the FET is the value of diffusion resistance. More specifically, it is the electric resistance value of the path from the boundary portion of the gate region G to the contact C. By the circuit simulator 20, this MOSF
Such an electric resistance value is necessary for performing a simulation of ET.

In the conventional parameter extraction device 10, a single calculation formula has been used to calculate such diffusion resistance. Specifically, the diffusion resistance R for the drain region D has been obtained by the calculation formula R = RSH × (L / W). Here, RSH is the sheet resistance value of this drain region D (determined by the layer thickness and impurity concentration), L is the distance of the route from the boundary of the gate region G to the contact C, and W is the width of this route. Is. The conventional parameter extracting unit 12 unconditionally applies the above-described calculation formula to the figure forming the impurity diffusion layer, and extracts the calculated diffusion resistance R as a parameter. However, in order to further increase the degree of integration of the LSI, it is necessary to miniaturize each element, and the impurity diffusion layer has to have a more complicated figure. For the impurity diffusion layer having a simple pattern as shown in FIG. 2, the diffusion resistance R can be calculated almost accurately by applying the above calculation formula. However, for the impurity diffusion layer having a more complicated pattern, However, it is not always possible to obtain an accurate diffusion resistance R with the above calculation formula.

In order to always calculate the accurate diffusion resistance R, the optimum calculation formula may be applied to each figure. However, in order to determine the optimum calculation formula, a strict theoretical analysis is performed. Therefore, it has been very difficult in practice to determine an optimum calculation formula. The present invention
It is intended to provide a method capable of efficiently determining an optimum calculation formula for each figure.

FIG. 3 is a block diagram showing a work procedure of the calculation formula determining method according to the present invention. First, a layout L is created by using an LSI circuit design system using a computer.
Is prepared as digital data. Subsequently, the parameter extraction device 15 extracts parameters based on the individual figures forming the layout L. This parameter extraction device 15 is the same device as the parameter extraction device 10 shown in FIG. 1, except that a calculation formula selection unit 13 is newly added. The graphic extracted by the graphic extraction unit 11 is given to the parameter extraction unit 12 and also to the calculation formula selection unit 13.

The calculation formula selection unit 13 operates only when the graphic given from the graphic extraction unit 11 is an impurity diffusion layer. That is, when the figure given from the figure extracting unit 11 is the impurity diffusion layer, the calculation formula storage table T
A plurality of diffusion resistance calculation formulas stored in the formula are sequentially selected one by one, and the formulas are given to the parameter extraction unit 12. When a specific calculation formula is given from the calculation formula selection unit 13, the parameter extraction unit 12 uses the given specific calculation formula to perform the parameter extraction work for the graphic given from the graphic extraction unit 11. However, if no calculation formula is given from the calculation formula selection unit 13, the parameter extraction process for the graphic given from the graphic extraction unit 11 is performed using a predetermined calculation formula. In other words, when the figure given from the figure extracting unit 11 is a figure other than the impurity diffusion layer, the parameter extraction process using the predetermined calculation formula is performed as usual. If the figure given by the figure extraction unit 11 is the figure of the impurity diffusion layer, the parameter extraction process using the specific calculation formula given by the calculation formula selection unit 13 is performed. Note that the calculation formula selection unit 13 performs a work of sequentially selecting a plurality of calculation formulas stored in the calculation formula storage table T and giving the selected calculation formulas to the parameter extraction unit 12. The parameter extraction process is performed by applying each calculation formula, and different parameters (that is, diffusion resistance values) are obtained for each applied calculation formula.

A netlist N is created using the parameters extracted by the parameter extracting device 15. The diffusion resistance value in the netlist N must take a plurality of types of values corresponding to the applied calculation formula. become. Further, although the circuit simulator 20 performs a simulation on the netlist N, a plurality of simulation results are obtained for each of a plurality of diffusion resistance values. Therefore, of the results of this simulation, the characteristic value V indicating the delay time is extracted as data. Of course, this characteristic value V also has a plurality of values corresponding to the applied calculation formula.

On the other hand, a device is actually produced based on the layout pattern corresponding to the original layout L. This device may be a prototype or an actual product. Then, the delay time is measured using this actual device, and the device actual measurement value M is obtained. Finally, the comparison device 30 is used to compare a plurality of characteristic values V obtained by the simulation with the device actual measurement value M, and the characteristic value V closest to the device actual measurement value M is selected. Then, the calculation formula used for calculating the diffusion resistance value corresponding to the selected characteristic value is determined as the optimum formula for calculating the diffusion resistance of the impurity diffusion layer.

[0020]

EXAMPLES The present invention will be described below based on more specific examples. For example, consider the case where the diffusion resistance for the drain region D as shown in FIG. 4 is calculated. The drain region D is a part of the MOSFET, and the diffusion resistance value which is a parameter necessary for performing the simulation is the electric resistance value of the path from the boundary portion of the gate region G to the contact C. However, unlike the drain region D shown in FIG. 2, the drain region D shown in FIG.
It is composed of portions D1, D2 and D3 and is not a simple rectangular area. Therefore, if the uniform formula of R = RSH × (L / W) described above is applied, an accurate diffusion resistance value cannot be obtained. As a calculation formula for calculating the diffusion resistance value for the drain region D having such a complicated shape, several formulas can be considered. Here, five specific calculation formulas are listed.

<Calculation Formula 1> First, as shown in FIG. 5, the drain region D is approximated by an aggregate of a plurality of rectangular regions F1, F2, F3. In this example, the right end of the rectangular area F1 is the center position of the portion D2, the upper end of the rectangular area F2 is the center position of the portion D1, the lower end of the rectangular area F2 is the center position of the portion D3, and the left end of the rectangular area F3 is the center of the portion D2. The position, the right end of the rectangular area F3, is the center position of the contact C. Then, the vertical and horizontal dimensions of these rectangular regions F1, F2, F3 are
As shown, W1, L1, W2, L2, W
3, L3. And

[0022]

(Equation 1) The diffusion resistance value R1 is calculated by the following equation. Here, RSH is the sheet resistance of the drain region D.

<Calculation Formula 2> Also, approximation is performed using rectangular areas as shown in FIG. 5, and vertical and horizontal dimensions W1 and L of each rectangular area are calculated.
Based on 1, W2, L2, W3, L3,

[0024]

(Equation 2) The diffusion resistance value R2 is calculated by the following equation.

<Calculation Formula 3> As shown in FIG. 6, the drain region D is divided into a plurality of closed regions F1, F2 and F3 (the right end of the closed region F3 is the center position of the contact C). And
Areas S1, S2, S3 and perimeters P1, P of each closed region
2, based on P3,

[0026]

(Equation 3) The diffusion resistance value R3 is calculated by the following equation.

<Calculation formula 4> Again, as shown in FIG.
The drain region D is divided into a plurality of closed regions F1, F2, F3, and the areas S1, S2, S3 and the perimeter P of each closed region are divided.
Based on 1, P2, P3,

[0028]

(Equation 4) The diffusion resistance value R4 is calculated by the following equation.

<Calculation formula 5> Again, as shown in FIG.
The drain region D is divided into a plurality of closed regions F1, F2, F3, and the areas S1, S2, S3 and the perimeter P of each closed region are divided.
Based on 1, P2, P3,

[0030]

(Equation 5) The diffusion resistance value R5 is calculated by the following equation.

From among these five types of calculation formulas, FIG.
In order to determine only one optimum calculation formula for the drain region D shown in FIG. First, these five types of calculation formulas are stored in the calculation formula storage table T shown in FIG. Then, the layout L including the drain region D shown in FIG. 4 is prepared, and the parameter extracting device 15 performs the parameter extracting process. That is, the figure extracting unit 11 extracts figures such as the gate region G and the drain region D, and supplies them to the parameter extracting unit 12 to perform parameter extraction. At this time, the gate region G
For, the parameters (resistance value and capacitance value) are extracted by applying the uniform calculation formula in the parameter extraction unit 12. However, for the drain region D which is the impurity diffusion layer, the calculation formula selection unit 13 is used. According to the calculation formula storage table T
One of the five calculation formulas is selected one by one in order, and the parameter extraction unit 12 applies each of these five calculation formulas to obtain the diffusion resistance value of the drain region D as a parameter.

In this way, the netlist N is created using the parameters extracted by the parameter extracting device 15. The diffusion resistance value of the drain region D in the netlist N is prepared in five kinds of values. It will be. Then, the circuit simulator 20 separately executes simulations using these five types of values,
The characteristic value V of the type is obtained. On the other hand, an actual device is manufactured based on the layout L, and the actual measurement value M using this device is measured, and the characteristic value closest to the actual measurement value M is selected from the five types of characteristic values V in the comparison device 30. V is selected. Here, for example, among the five types of characteristic values V, the characteristic value V obtained by the simulation using the diffusion resistance value corresponding to the above-described <calculation formula 2>
If is selected, <Calculation formula 2> can be determined to be the optimum formula for the drain region D having the shape shown in FIG.

Since a large number of circuits are interconnected in the actual layout L, these are divided into partial sub-circuits, and the simulation in the circuit simulator 20 is performed for each sub-circuit. Is preferred. Similarly, if the device actual measurement value M is also performed for each individual sub-circuit, the comparison device 30 can perform comparison for each corresponding sub-circuit.

By thus determining the optimum calculation formula for the specific impurity diffusion layer, the same calculation formula can be used for the impurity diffusion layers having similar patterns. For example, a crank-shaped drain region D as shown in FIG. 4, a rectangular drain region D as shown in FIG. 7A, and an L-shaped drain region D as shown in FIG. 7B. For each typical figure pattern, if you have decided the optimum calculation formula, after that,
It is possible to determine which figure pattern each drain region D belongs to and use the optimum calculation formula for the calculation.

The optimum calculation formula is considered to depend not only on the figure shape of the impurity diffusion layer but also on the number and position of contacts. For example, the drain regions D shown in FIGS. 8A to 8D are all rectangular regions, but only one contact C is provided in FIG. Two contacts C1 and C2 are provided in (b) and (c), and four contacts C1 to C4 are provided in FIG. Also, the same figure
In (b) and (c), the two contacts C1 and C2 are arranged differently from each other. In this way, the optimal calculation formula may differ if the number and arrangement of contacts differ,
It is desirable to determine the optimum calculation formula for each case.

[0036]

As described above, according to the present invention, the LSI
In circuit design, it becomes possible to efficiently determine the optimum calculation formula for calculating the diffusion resistance of the impurity diffusion layer.

[Brief description of the drawings]

FIG. 1 is a block diagram illustrating a procedure of a conventional general LSI circuit design work.

FIG. 2 is a plan view showing layers constituting a general MOSFET.

FIG. 3 is a block diagram showing a work procedure of a calculation formula determining method according to the present invention.

FIG. 4 is a plan view of a drain region D for which an optimum diffusion resistance calculation formula is obtained by the method according to the present invention.

5 is a diagram showing one method of calculating diffusion resistance for the drain region D shown in FIG.

6 is a diagram showing another method for calculating diffusion resistance for the drain region D shown in FIG.

FIG. 7 is a plan view showing various graphic shapes of a drain region D.

8 is a plan view showing various contacts formed in the same drain region D. FIG.

[Explanation of symbols]

 DESCRIPTION OF SYMBOLS 10 ... Parameter extraction device 11 ... Graphic extraction part 12 ... Parameter extraction part 13 ... Calculation formula selection part 15 ... Parameter extraction device 20 ... Circuit simulator 30 ... Comparison device C ... Contact D ... Drain area F1-F3 ... Rectangular area, closed area G ... Gate area L ... Layout, diffusion layer length M ... Device actual measurement value N ... Netlist S ... Source area T ... Calculation formula storage table V ... Characteristic value (delay time) W ... Diffusion layer width

Claims (3)

[Claims] 1. A method for determining an optimum formula for calculating diffusion resistance of an impurity diffusion layer in LSI circuit design, comprising a plurality of methods for calculating diffusion resistance of an impurity diffusion layer having a predetermined figure shape. A step of preparing a calculation formula, a step of extracting a figure forming an impurity diffusion layer from a predetermined LSI layout pattern, and a calculation for calculating a diffusion resistance value by applying each of a plurality of prepared formulas to the extracted figure And a netlist corresponding to the LSI layout pattern is created, a plurality of diffusion resistance values calculated in the previous step are applied to each of the netlists, and a simulation using a circuit simulator is performed to show the delay time. A step of obtaining a characteristic value for each case where a plurality of diffusion resistance values are applied, and an actual step based on the LSI layout pattern The step of producing a device and measuring the characteristic value of this device, and selecting the characteristic value closest to the characteristic value measured in the previous step from among the plurality of characteristic values obtained by the simulation, and selecting this In the LSI circuit design, which comprises: determining the calculation formula used for calculating the diffusion resistance value corresponding to the specified characteristic value as an optimum formula for calculating the diffusion resistance of the impurity diffusion layer. A method for determining the formula for calculating the diffusion resistance of the impurity diffusion layer. 2. The determination method according to claim 1, wherein a graphic forming the impurity diffusion layer is approximated by a plurality of rectangular areas, and a calculation formula for calculating diffusion resistance based on vertical and horizontal dimensions of each rectangular area is prepared. A method for determining a diffusion resistance calculation formula for an impurity diffusion layer in an LSI circuit design, comprising: 3. The determination method according to claim 1, wherein the figure forming the impurity diffusion layer is divided into a plurality of closed regions,
A method for determining a diffusion resistance calculation formula for an impurity diffusion layer in an LSI circuit design, which comprises preparing a calculation formula for calculating a diffusion resistance based on the area and perimeter of each closed region.