JPH07307666A - High frequency processor and pll synthesizer device - Google Patents

Abstract

PURPOSE:To eliminate the need of a metallic case to miniaturize a device by arranging a high frequency circuit on one face of a multilayered substrate having earth layers as inner layers and arranging a digital circuit on the other face to prevent a bad influence between both circuits. CONSTITUTION:A voltage controlled oscillator 4 is arranged on a face 7a of a multilayered substrate 7, and a digital circuit 6 is arranged on the other face 7b. The substrate 7 has pattern layers 8a to 8d, and layers 8a and 8d are pattern layers for signal, and layers 8b and 8c are earth layers provided throughout. The substrate 7 is provided with through holes 9, and they are used to provide terminals 10a and 10b which connect the faces 7a and 7b, and terminals of the oscillator 4 and the circuit 6 are connected to them, and the signal is transmitted between them. Thus, the oscillator 4 and the circuit 6 can re arranged closely to each other to miniaturize the device. The high frequency from the oscillator 4 is intercepted by earth layers 8b and 8c to prevent not only the high frequency from jumping into or passing round to the circuit 6 but also the digital noise from entering to the oscillator 4 from the circuit 6.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a high frequency processing device and a PLL (phase locked loop) synthesizer device in which a high frequency circuit and a digital circuit are mixed.

[0002]

2. Description of the Related Art For example, a PLL synthesizer device, which is a high frequency processing device, forms a PLL loop with a reference oscillator, a phase comparator, a loop filter, a voltage controlled oscillator and a frequency divider, and the frequency division ratio of the frequency divider is variable. By doing so, the local oscillation frequency signal of the desired frequency is obtained from the voltage controlled oscillator. In such a conventional PLL synthesizer device, each circuit is generally arranged on the same surface of the same substrate, but the voltage controlled oscillator and the digital circuit such as the reference oscillator, the phase comparator, and the frequency divider are located as far apart as possible. However, the voltage controlled oscillator and the digital circuit are shielded by separate metal cases.

That is, with such a configuration, the high frequency jump and sneak from the voltage controlled oscillator to the digital circuit are prevented, and the digital noise is prevented from entering the voltage controlled oscillator from the digital circuit to spurious characteristics. Was being improved.

[0004]

However, according to the above-mentioned conventional example, since the voltage controlled oscillator and the digital circuit must be arranged as far apart as possible, the device becomes large in size, and the voltage controlled oscillator and the digital circuit are separated from each other. There is a drawback that it must be covered with a separate metal case or the like.

Therefore, it is an object of the present invention to provide a high frequency processing device and a PLL synthesizer device that maintain spurious characteristics and do not require a metal case or the like, and that contributes to downsizing of the device.

[0006]

According to a first aspect of the present invention, there is provided a high frequency processing apparatus, wherein a multilayer substrate having an inner layer as a ground layer is provided, and a high frequency circuit is provided on one surface of the multilayer substrate. , Digital circuits are arranged on the other surface.

According to a second aspect of the present invention, there is provided a PLL synthesizer device in which a multilayer substrate having an inner layer as an earth layer is provided, a voltage controlled oscillator is arranged on one surface of the multilayer substrate, and a digital circuit is arranged on the other surface. Is.

According to a third aspect of the present invention, in the structure of the first and second aspects, the earth layer of the multilayer substrate is a plurality of layers.

[0009]

According to the first or second aspect of the present invention, the high frequency circuit or the voltage controlled oscillator and the digital circuit may be separately arranged on both surfaces of the multilayer substrate, and it is not necessary to separate them in terms of distance. Further, a ground layer of the multi-layer substrate is interposed between both circuits, and high frequency from the high frequency circuit or the voltage controlled oscillator or digital noise from the digital circuit is shielded by the ground layer.

[0010]

Embodiments of the present invention will be described below with reference to the drawings. FIG. 1 and FIG. 2 show an embodiment of the present invention, which is applied to a PLL synthesizer device which is a high frequency processing device.

FIG. 2 shows a circuit block diagram of the PLL synthesizer device. In FIG. 2, the reference oscillator 1
Outputs a predetermined reference clock signal to the phase comparator 2, and the phase comparator 2 compares the reference clock signal with the frequency-divided clock signal of the frequency divider 5 described below, and determines the phase difference between them as the voltage amplitude value. Output to loop filter 3. The loop filter 3 smoothes the phase difference voltage signal to generate a voltage controlled oscillator 4 (V
CO).

The voltage controlled oscillator 4 outputs a clock signal corresponding to the phase difference voltage to the frequency divider 5. The frequency divider 5 is configured to be able to change the frequency division ratio based on a control signal from a channel selection control circuit (not shown), and divides the clock signal by a predetermined frequency division ratio to output the frequency divided clock signal to the phase comparator. Output to 2.

That is, the local oscillation frequency when the desired channel is received from the voltage controlled oscillator 4 is obtained by changing the frequency division ratio of the frequency divider 5.

FIG. 1 shows a block diagram of a component mount state of the PLL synthesizer device. In FIG. 1, the voltage controlled oscillator 4 is configured as a high frequency circuit in one package, and the reference oscillator 1, the phase comparator 2, the loop filter 3 and the frequency divider 5 are configured as a digital circuit 6 in one package. Has been done. The voltage controlled oscillator 4 is mounted on one surface 7a of the multilayer substrate 7, and the digital circuit 6 is mounted on the other surface 7b of the multilayer substrate 7.

The multi-layer substrate 7 includes four pattern layers 8a to 8d.
The first pattern layer 8a on the side of the voltage controlled oscillator 4 and the fourth pattern layer 8d on the side of the digital circuit 6 are pattern layers for signals. The second pattern layer 8b and the third pattern layer 8c are both configured as a ground layer, and the pattern layers 8b and 8c (ground layer) are provided over the entire area as much as possible.

Further, through holes 9 are appropriately provided in the multi-layer substrate 7, and the through holes 9 are utilized to make both surfaces 7a,
Terminals 10a and 10b for connecting between 7b are provided respectively. The terminals of the voltage controlled oscillator 4 and the terminal of the digital circuit 6 are connected to the terminals 10a and 10b, respectively, so that signals are transmitted between the circuits 4 and 6.

According to the above construction, since the voltage controlled oscillator 4 and the digital circuit 6 are separately arranged on both surfaces 7a and 7b of the multilayer substrate 7, both circuits 4 and 6 are arranged in close proximity to each other. Use for miniaturization of equipment.

Between the voltage controlled oscillator 4 and the digital circuit 6, the second and third ground layers of the multilayer substrate 7 are provided.
Since the pattern layers 8b and 8c are interposed, the high frequency wave from the voltage controlled oscillator 4 is generated by the second and third pattern layers 8b and 8c.
The digital noise from the digital circuit 6 is shielded by the second and third pattern layers 8b and 8c.
Shielded by. Therefore, the high frequency jumps in and out of the voltage controlled oscillator 4 into the digital circuit 6,
Intrusion of digital noise from the digital circuit 6 into the voltage controlled oscillator 4 is prevented.

In the above embodiment, the high frequency processing device is the PLL synthesizer device.
The present invention can be applied to any high frequency processing device in which a high frequency circuit and a digital circuit are mixed. Further, in the above embodiment, the loop filter 3 is included in the digital circuit 6, but the loop filter 3 may be omitted. The loop filter 3 may be formed on any surface 7a of the multilayer substrate 7.
It may be mounted on 7b. Further, in the above-mentioned embodiment, the two layers of the second and third pattern layers 8b and 8c are formed as the ground layer, but only one layer may be formed as the ground layer, or three or more layers are formed as the ground layer. May be configured as. However, the more the earth layer is, the more effective the shielding is.

[0020]

As described above, claim 1 or claim 2 is provided.
According to the invention, since the high frequency circuit or the voltage controlled oscillator is arranged on one surface of the multilayer substrate whose inner layer is the ground layer and the digital circuit is arranged on the other surface, both circuits are simply separated on both surfaces of the multilayer substrate. Since the adverse effect between the two circuits can be prevented only by arranging them, there is an effect that a metal case or the like is unnecessary while maintaining the spurious characteristics, and that the device is miniaturized.

According to the third aspect of the invention, since the earth layer is composed of a plurality of layers, there is an effect that the shielding effect against high frequency and digital noise is further improved.

[Brief description of drawings]

FIG. 1 is a configuration diagram (example) of a component mount state of a PLL synthesizer device.

FIG. 2 is a circuit block diagram of a PLL synthesizer device (embodiment).

[Explanation of symbols]

 4 ... Voltage controlled oscillator (high frequency circuit) 6 ... Digital circuit 7 ... Multilayer substrate 7a ... One surface 7b ... Other surface

Claims (3)

[Claims] 1. A multi-layer substrate having an inner layer as an earth layer,
A high-frequency processing device characterized in that a high-frequency circuit is arranged on one surface of this multilayer substrate and a digital circuit is arranged on the other surface thereof. 2. A multi-layer substrate having an inner layer as an earth layer,
A PLL synthesizer device characterized in that a voltage controlled oscillator is arranged on one surface of this multilayer substrate and a digital circuit is arranged on the other surface thereof. 3. The high frequency processing device according to claim 1, or the PLL synthesizer device according to claim 2, wherein the ground layer of the multilayer substrate is a plurality of layers.