JPH07307297A - Method of chemical vapor deposition - Google Patents

Method of chemical vapor deposition

Info

Publication number
JPH07307297A
JPH07307297A JP6284149A JP28414994A JPH07307297A JP H07307297 A JPH07307297 A JP H07307297A JP 6284149 A JP6284149 A JP 6284149A JP 28414994 A JP28414994 A JP 28414994A JP H07307297 A JPH07307297 A JP H07307297A
Authority
JP
Japan
Prior art keywords
reaction
oxygen
layer
coating
film
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP6284149A
Other languages
Japanese (ja)
Other versions
JPH0831424B2 (en
Inventor
Shunpei Yamazaki
舜平 山崎
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Semiconductor Energy Laboratory Co Ltd
Original Assignee
Semiconductor Energy Laboratory Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Semiconductor Energy Laboratory Co Ltd filed Critical Semiconductor Energy Laboratory Co Ltd
Priority to JP6284149A priority Critical patent/JPH0831424B2/en
Publication of JPH07307297A publication Critical patent/JPH07307297A/en
Publication of JPH0831424B2 publication Critical patent/JPH0831424B2/en
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

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Classifications

    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02EREDUCTION OF GREENHOUSE GAS [GHG] EMISSIONS, RELATED TO ENERGY GENERATION, TRANSMISSION OR DISTRIBUTION
    • Y02E10/00Energy generation through renewable energy sources
    • Y02E10/50Photovoltaic [PV] energy

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  • Chemical Vapour Deposition (AREA)
  • Photovoltaic Devices (AREA)

Abstract

PURPOSE:To manufacture a film, into which oxygen or carbon is not mixed, by forming the silicon film having concentration, in which oxygen or carbon reaches a specified value or less by measurement by a secondary ion analytic method, onto a surface to be formed by an exhaust means. CONSTITUTION:In an exhaust system 52 using a continuous exhaust system TP, carbon concentration has 1X10<17>-5X10<18>cm<-3> in the measurement of a secondary ion analytic method, and carbon is contained only in 1X10<18> or less generally. Oxygen is also contained in 5X10<18>cm<-3> or less, preferably 1X10<18>cm<-3> or less. A pressure regulating valve 72 is closed, pressure in a reaction vessel 101 is brought to 0.01-10Torr, preferably 0.05-1Torr, the lower sections of the valve are brought to 1X10<-2>Torr or less, generally 1X10<-4>-10<-7>Torr, and the degree of the vacuum is attained by rotating a TP 87. The inverse diffusion of the polymerized oil of a VP 36 and the back flow of atmospheric air for exhaust impregnated into oil, particularly oxygen can be prevented.

Description

【発明の詳細な説明】Detailed Description of the Invention

【0001】[0001]

【産業上の利用分野】本発明は気相反応被膜作製装置お
よび作製方法に関する。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an apparatus and method for producing a vapor phase reaction coating.

【0002】[0002]

【従来の技術】従来、CVD 装置例えばPCVD装置において
は、反応系の圧力が0.05〜10torrと高い圧力のため、そ
の排気系等はVPのみが用いられ、それ以上の真空度を発
生させるTP等を設けることが全く不可能とされていた。
しかし本発明人はかかるPCVD装置において、排気系がVP
のみではこのVPが不連続の回転運動をするため、空気と
接触している大気圧の排気系からの大気(特に酸素)が
逆流し、さらにこの大気の一部が油中に混入し、ここか
ら再気化することにより反応容器内に逆流してしまうこ
とが判明した。
2. Description of the Related Art Conventionally, in a CVD apparatus such as a PCVD apparatus, since the pressure of the reaction system is as high as 0.05 to 10 torr, only VP is used for the exhaust system and the like, and TP etc. that generate a higher vacuum degree It was completely impossible to provide.
However, the present inventor has found that in such a PCVD device, the exhaust system has a VP
With this alone, this VP makes a discontinuous rotational motion, so the atmosphere (especially oxygen) from the exhaust system at atmospheric pressure that is in contact with air flows backward, and a part of this atmosphere mixes in the oil. From the above, it was found that re-vaporization causes backflow into the reaction vessel.

【0003】さらにこのため、この逆流により酸素が形
成する被膜内に混入し、例えば珪素膜を作製する場合そ
の被膜内に酸素が3×1019〜2×1020cm-3の濃度に混
入してしまった。このため、かかる被膜に水素または弗
素が添加されて、珪素半導体であるべきものが低級酸化
珪素といってもよいようなものになってしまった。
Therefore, due to this backflow, oxygen is mixed into the film formed, and for example, when a silicon film is produced, oxygen is mixed into the film at a concentration of 3 × 10 19 to 2 × 10 20 cm -3. I got it. For this reason, hydrogen or fluorine is added to such a coating so that what should be a silicon semiconductor may be called lower silicon oxide.

【0004】[0004]

【発明が解決しようとする課題】本発明はかかる欠点を
防ぐことを目的としている。
The present invention aims to prevent such drawbacks.

【0005】[0005]

【課題を解決するための手段】本発明は反応性気体を用
いて被膜作製を行うに際し、非酸化物の被膜を作製する
に関して、排気系においてタ−ボ分子ポンプを用いて気
相反応(以下CVD という)を行なわしめることにより、
被膜中の酸素の混入量を1×1019cm-3以下の濃度とさ
せる気相反応被膜作製方法である。
The present invention relates to the production of a non-oxide coating when a coating is produced using a reactive gas, in which a gas phase reaction (hereinafter By performing CVD)
This is a method for producing a gas phase reaction coating in which the amount of oxygen mixed in the coating is set to a concentration of 1 × 10 19 cm −3 or less.

【0006】本発明は非酸素系被膜の作製において、そ
の排気系よりの大気の逆流を防ぐため、油回転方式のロ
−タリ−ポンプ、メカニカルブ−スタ−ポンプ等の不連
続回転方式の真空ポンプ(以下単に真空ポンプまたはVP
という)のみを用いるのではなく、連続排気方式のタ−
ボ分子ポンプ(以下単にタ−ボ分子ポンプまたはTPとい
う)を反応容器と真空ポンプとの間に介在させて、排気
系からの大気の逆流を防止したことを特徴とする。その
ため非酸化物被膜例えば非単結晶珪素を、反応性気体で
あるシラン(Sin 2n+2n>1)を用いて形成するに際
し、その被膜中の酸素の量を5×1018cm-3以下好まし
くは1×1018cm-3以下とすることができる。
In order to prevent the backflow of the atmosphere from the exhaust system in the production of a non-oxygen type coating, the present invention uses a discontinuous rotation type vacuum such as an oil rotation type rotary pump and a mechanical booster pump. Pump (hereinafter simply vacuum pump or VP
Not only) but a continuous exhaust type
A feature of the present invention is that a bo molecular pump (hereinafter simply referred to as a turbo molecular pump or TP) is interposed between the reaction container and the vacuum pump to prevent backflow of the atmosphere from the exhaust system. Therefore a non-oxide film such as non-single-crystal silicon, a reactive gas silane in forming using (Si n H 2n + 2 n > 1), oxygen in an amount of 5 × 10 18 cm of that in the coating - 3 or less, preferably 1 × 10 18 cm −3 or less.

【0007】本発明はかかる排気系をTPを反応室とVPと
の間に反応中の圧力調整用のバルブを経て介在させるこ
とにより、反応室内は0.05〜10torrの間の圧力範囲でプ
ラズマ気相反応(PCVDという)、光CVD (Photo CVD と
いう)またはこれらを併用した方法(以下単にCVD 法と
して総称する)を用いて被膜形成を行い、かつ圧力調整
パルブ下は1×10-2torr以下(一般には10-4〜10-6tor
r)の圧力として保持し、TPを作用させるため、反応系
はこの排気系よりも高い圧力(1×10-2torr以上即ち0.
05〜10torr)で保持して被膜形成を行っている。
According to the present invention, the exhaust system is provided between the reaction chamber and VP via a valve for adjusting the pressure during the reaction, so that the plasma gas phase in the reaction chamber is in the pressure range of 0.05 to 10 torr. A film is formed by using a reaction (referred to as PCVD), a photo CVD (referred to as Photo CVD), or a method in which these are used together (hereinafter simply referred to as a CVD method), and under a pressure adjusting valve, 1 × 10 -2 torr or less ( Generally 10 -4 to 10 -6 tor
The pressure of the reaction system is higher than that of this exhaust system (1 × 10 -2 torr or more, that is, 0.
05 to 10 torr) to form a film.

【0008】さらに本発明はかかるプラズマCVD 装置を
反応室を複数ケ連結し、それぞれの反応室にてP型非単
結晶半導体、I型非単結晶半導体およびN型非単結晶半
導体を基板上に積層して、PIN 接合を構成する半導体装
置の作製方法にも適用できる。
Further, according to the present invention, a plurality of reaction chambers are connected to the plasma CVD apparatus, and a P-type non-single crystal semiconductor, an I-type non-single crystal semiconductor and an N-type non-single crystal semiconductor are placed on a substrate in each reaction chamber. It can also be applied to a method for manufacturing a semiconductor device in which a PIN junction is formed by stacking layers.

【0009】[0009]

【実施例】本発明の実施例として、本発明の気相反応被
膜作製方法を実現するための気相反応被膜作製装置(図
1, 図2にその概要を示す装置)を説明し、その後この
装置を用いたPIN 接合を構成する半導体装置の作製方法
を説明する。この図面(図1, 図2) は、PIN 接合、PI
P 接合、NIN 接合またはPINPIN・・・PIN 接合等の基板
上の半導体に、異種導電型でありながらも、形成される
半導体の主成分または化学量論比の異なる半導体層をそ
れぞれの半導体層をその前工程において形成された半導
体層の影響(混入)を受けずに積層させるための多層に
自動かつ連続的に形成するための装置である。
EXAMPLES As an example of the present invention, a vapor phase reactive coating forming apparatus (an apparatus whose outline is shown in FIGS. 1 and 2) for realizing the vapor phase reactive coating forming method of the present invention will be described, and thereafter, A method for manufacturing a semiconductor device that forms a PIN junction using the device will be described. This drawing (Fig. 1, Fig. 2) shows PIN junction, PI
P-junction, NIN-junction or PINPIN ... PIN-junction semiconductors on the substrate are semiconductor layers of different conductivity types, but with different main components or different stoichiometry. This is an apparatus for automatically and continuously forming a multi-layer for stacking without being influenced (mixed) by the semiconductor layer formed in the previous step.

【0010】図1に示すようにこの気相反応被膜作製装
置は、反応性気体を導入するドーピング系(50), 反応容
器(51), 排気系(52)を有する。反応容器内側に絶縁物で
内面が形成された反応空間を有する二重反応容器型とし
て半導体層を形成し、さらに加えてP型半導体(図面で
は系A),I型半導体(図面では系C)およびN型半導
体と積層して接合を基板上に形成するに際し、それぞれ
の反応容器を分離部(図面では系B)を介して連結せし
めたマルチチャンバ方式のPCVD装置である。
As shown in FIG. 1, this vapor phase reactive film forming apparatus has a doping system (50) for introducing a reactive gas, a reaction vessel (51), and an exhaust system (52). A semiconductor layer is formed as a double reaction vessel type having a reaction space having an inner surface formed of an insulator inside the reaction vessel, and additionally, a P-type semiconductor (system A in the drawing) and an I-type semiconductor (system C in the drawing) A multi-chamber type PCVD apparatus in which respective reaction vessels are connected via a separating part (system B in the drawing) when a junction is formed on a substrate by laminating with and an N-type semiconductor.

【0011】このPCVD装置における分離部(図面では系
B)の(7) がバッファ室である。本実施例は水素または
ハロゲン元素が添加された非単結晶半導体層の形成によ
り、再結合中心密度の小さなP,IおよびN型の導電型を
有する半導体層を形成し、その積層境界にてPIN 接合を
形成するとともに、それぞれの半導体層に他の隣接する
半導体層からの不純物が混入して接合特性を劣化させる
ことを防ぎ、またそれぞれの半導体層を形成する工程間
に、大気特に酸素に触れさせて、半導体の一部が酸化さ
れることにより層間絶縁物が形成されることのないよう
に連続生産を行うものである。さらに本実施例は、かか
る反応容器をそれぞれの反応においては独立として多数
連結したマルチチャンバ方式のプラズマ反応方法におい
て、一度に多数の基板を同時にその被膜成長速度を大き
くしたいわゆる多量生産方式である。本実施例は、10cm
×10cmまたは電極方向に10〜50cm、例えば40cmを有する
とともに、巾15〜120cm 例えば60cmの基板(40cm×60cm
または20cm×60cmを1バッチ20枚配設)を用いた。
The buffer chamber (7) of the separation unit (system B in the drawing) in this PCVD apparatus is used. In this embodiment, a non-single crystal semiconductor layer to which hydrogen or a halogen element is added is formed to form a semiconductor layer having P, I and N type conductivity types with a small recombination center density, and the PIN is formed at the stack boundary. While forming the junction, each semiconductor layer is prevented from being mixed with impurities from other adjacent semiconductor layers and deteriorating the junction characteristics, and the atmosphere, particularly oxygen is exposed during the process of forming each semiconductor layer. Thus, continuous production is performed so that an interlayer insulating material is not formed due to the oxidation of a part of the semiconductor. Further, the present embodiment is a so-called mass production method in which a large number of substrates are simultaneously increased in film growth rate in a multi-chamber plasma reaction method in which a large number of such reaction vessels are connected independently in each reaction. This example is 10 cm
X 10 cm or 10 to 50 cm in the electrode direction, for example 40 cm, with a width of 15 to 120 cm, for example 60 cm substrate (40 cm x 60 cm
Alternatively, 20 sheets of 20 cm × 60 cm were arranged in one batch).

【0012】図1、図2においては、反応性気体の導入
手段、排気手段を有し、これらの供給ノズル、排気ノズ
ルを設け、前記反応室内側に形成された絶縁物よりも内
側に相対させて一対の電極(61),(61')または(62),(62')
および反応性気体の供給ノズル(17),(18) および排気ノ
ズル(17'),(18') を配設した。即ち、電極の外側をフー
ドの絶縁物で包む構造(39)(39') とした。さらにこのフ
ード間の反応空間を閉じ込めるため、外側周辺を絶縁物
(38),(38')で取り囲んだ。また、図2に図1の断面を示
す図面を示すが、反応容器の前(図面左側),後(図面右
側)に開閉扉を設け、この扉の内面にハロゲンランプ等
による加熱手段(13),(13')を設けた。
In FIG. 1 and FIG. 2, a reactive gas introducing means and an exhausting means are provided, and these supply nozzles and exhausting nozzles are provided so as to face the inside of the insulator formed inside the reaction chamber. A pair of electrodes (61), (61 ') or (62), (62')
The reactive gas supply nozzles (17), (18) and the exhaust nozzles (17 '), (18') were arranged. That is, a structure (39) (39 ') is formed in which the outside of the electrode is wrapped with the hood insulator. Furthermore, in order to confine the reaction space between the hoods, the outer periphery is insulated.
Surrounded by (38) and (38 '). Further, FIG. 2 shows a drawing showing a cross section of FIG. 1. Opening and closing doors are provided in front of the reaction vessel (left side of the drawing) and after (right side of the drawing), and heating means (13) such as a halogen lamp is provided on the inner surface of the door. , (13 ') are provided.

【0013】以下に本発明の実施例であるPIN 接合を構
成する半導体装置の作製方法を図面図1、図2に従って
説明する。図面においてはPIN 接合を構成する複数の反
応系の一部を示している。即ち、P,IおよびN型の半導
体層を積層して形成する3つの反応系の内2つ(A、
C)とさらに第1の予備室および移設用のバッファ室
(系B)を有するマルチチャンバ方式のプラズマ気相反
応装置の装置例を示す。
A method of manufacturing a semiconductor device forming a PIN junction, which is an embodiment of the present invention, will be described below with reference to FIGS. The drawing shows some of the multiple reaction systems that make up the PIN junction. That is, two of the three reaction systems formed by stacking P, I and N type semiconductor layers (A,
An apparatus example of a multi-chamber type plasma vapor phase reaction apparatus having C), a first preliminary chamber, and a transfer buffer chamber (system B) is shown.

【0014】図面における系A、B、Cは、2つの各反
応容器(101),(103) およびバッファ室(102) を有し、そ
れぞれの反応容器間の分離部にゲート弁(44),(45) ,(4
6),(47)を有している。またそれぞれ独立して、反応性
気体の供給ノズル(17),(18)と排気ノズル(17'),(18')
とを有し、反応性気体が供給系から排気系に層流になる
べく設けている。この装置は入り口側には第1の予備室
(100) が設けられ、まず扉(42)より基板ホルダ(2) の2
つの面に2つの被形成面を有する2枚の基板(1) を挿着
した。さらにこのホルダ(3) を外枠冶具(外周辺のみ(3
8),(38')として示す)により互いに所定の等距離を離間
して配設した。即ちこの被形成面を有する基板は被膜形
成を行わない裏面を基板ホルダ(2) に接し、基板2枚お
よび基板ホルダとを一つのホルダ(3) として6cm±0.5c
m の間隙を有して絶縁物の外枠冶具内に林立させた。そ
の結果、40cm×60cmの基板を20枚同時に被膜形成させる
ことができた。かくして高さ55cm、奥行80cm、巾80cmの
反応空間(6)(8)は上方、下方を絶縁物(39)(39') で囲ま
れ、また側周辺は絶縁外枠冶具(38)(38') で取り囲ん
だ。
The systems A, B and C in the drawings have two reaction vessels (101), (103) and a buffer chamber (102), and a gate valve (44), (45), (4
It has 6) and (47). Independently, the reactive gas supply nozzles (17), (18) and the exhaust nozzles (17 '), (18')
And the reactive gas is provided as a laminar flow from the supply system to the exhaust system. This device has a first spare room on the entrance side.
(100) is installed. First, from the door (42) to the board holder (2) 2
Two substrates (1) having two surfaces to be formed on one surface were attached. In addition, attach this holder (3) to the outer frame jig (outer periphery only (3
8) and (38 ') are provided at a predetermined equidistant distance from each other. In other words, the substrate having this formation surface contacts the substrate holder (2) with the back surface on which no coating is formed, and the two substrates and the substrate holder are regarded as one holder (3), and 6 cm ± 0.5 c
It was made to stand in an outer frame jig of an insulator with a gap of m 3. As a result, 20 substrates of 40 cm × 60 cm could be simultaneously coated. Thus, the reaction space (6) (8) with a height of 55 cm, a depth of 80 cm and a width of 80 cm is surrounded by insulators (39) (39 ') on the upper and lower sides, and the outer periphery is insulated by an outer frame jig (38) (38). Surrounded by ').

【0015】まず第1の予備室(100) を圧力調整バルブ
(71)を全開とし、TP(86)を経て真空ポンプ(35)により真
空引きをした。この後、圧力調整バルブ(72)を全開と
し、TPにより3×10-8torr以下にまで予め真空引きがさ
れている反応容器(101) との分離用のゲート弁(44)を開
けて、外枠冶具(38)に保持された基板を移した。例え
ば、予備室(100) より第1の反応容器(101) に移し、さ
らにゲート弁(44)を閉じることにより基板を第1の反応
容器(101) に移動させたものである。この時、第1の反
応容器(101) に保持されていた基板(1) 等は、予めまた
は同時にバッファ室(102) に、またバッファ室(102) に
保持されていた冶具および基板(2) は第2の反応容器(1
03) に、また第2の反応容器(103) に保持されていた基
板は第2のバッファ室(104) に、さらに図示が省略され
ているが、第3の反応室の基板および冶具は出口側の第
2の予備室にゲート弁(45),(46),(47)を開けて移動させ
ることが可能である。この後ゲート弁(44),(45),(46),
(47) を閉めた。
First, the first auxiliary chamber (100) is provided with a pressure adjusting valve.
(71) was fully opened, and a vacuum pump (35) was used to evacuate through TP (86). After that, the pressure control valve (72) is fully opened, and the gate valve (44) for separation from the reaction vessel (101) which has been evacuated to 3 × 10 −8 torr or less by TP is opened, The substrate held by the outer frame jig (38) was transferred. For example, the substrate is moved from the preliminary chamber (100) to the first reaction container (101) and then the gate valve (44) is closed to move the substrate to the first reaction container (101). At this time, the substrate (1) and the like held in the first reaction vessel (101) are held in the buffer chamber (102) in advance or at the same time, and the jig and the substrate (2) held in the buffer chamber (102). Is the second reaction vessel (1
03), and the substrate held in the second reaction container (103) is in the second buffer chamber (104). It is possible to open and move the gate valves (45), (46) and (47) to the second auxiliary chamber on the side. After this, the gate valves (44), (45), (46),
I closed (47).

【0016】即ちゲート弁の動きは、扉(42)が大気圧
で開けられた時は分離部のゲート弁(44),(45),(46),(4
7)は閉じられ、各チャンバにおいてはプラズマ気相反応
が行われている。また逆に、扉(42)が閉じられていて予
備室(100) が十分真空引きされた時は、ゲート弁(44),
(45),(46),(47) が開けられ、各チャンバの基板、冶具
は隣のチャンバに移動する機構を有し、外気が反応室(1
01) およびバッファ室 (102)に混入しないようにしてい
る。系Aにおける第1の反応容器(101)でP型半導体層
をPCVD法により形成する場合を以下に示す。反応系A
(反応容器(101) を含む)は0.01〜10torr好ましくは0.
01〜1torr 例えば0.08torrとした。
That is, the movement of the gate valve is such that when the door (42) is opened at atmospheric pressure, the gate valves (44), (45), (46), (4
7) is closed, and plasma gas phase reaction is performed in each chamber. On the contrary, when the door (42) is closed and the auxiliary chamber (100) is sufficiently evacuated, the gate valve (44),
(45), (46), (47) are opened, the substrate and jig of each chamber have a mechanism to move to the adjacent chamber, and the outside air is
01) and the buffer chamber (102) are not mixed. The case where the P-type semiconductor layer is formed by the PCVD method in the first reaction container (101) in the system A is shown below. Reaction system A
0.01 to 10 torr (including the reaction vessel (101)), preferably 0.
01 to 1 torr For example, 0.08 torr.

【0017】即ち、圧力調整バルブを閉として、反応容
器 (101) 内の圧力は0.05〜1torrであり、またこのバ
ルブ下は1 ×10-2torr以下一般には1×10-4〜1×10-7
torrとなり、この真空度をTP(87)を回転させて成就させ
ている。またこの連続排気方式のTPを動作させているた
め、VP(36)のポリマ化した油の逆拡散、また油中に含浸
した排気用の大気特に酸素を逆流させることを初めて防
ぐことができた。反応性気体は系Aのドーピング系(50)
より供給した。即ち珪化物気体(24)としては精製されて
さらにステンレスボンベに充填されたシラン( Sin
2n+2 n>1特にSiH4またはSi2H6)、フッ化珪素(SiF2
またはSiF4)を用いた。ここでは、取扱いが容易な超高
純度シラン(純度99.99 %、但し水、酸素化物は0.1PPM
以下)を用いた。
That is, with the pressure regulating valve closed, the pressure in the reaction vessel (101) is 0.05 to 1 torr, and below this valve is 1 × 10 −2 torr or less, generally 1 × 10 −4 to 1 × 10 5. -7
It becomes torr, and this vacuum degree is fulfilled by rotating TP (87). In addition, since the TP of this continuous exhaust system is operated, it was possible for the first time to prevent the reverse diffusion of the polymerized oil of VP (36) and the reverse flow of the exhaust atmosphere, especially oxygen, impregnated in the oil. . Reactive gas is a doping system of system A (50)
More supplied. That is, as the silicide gas (24), silane (Si n H
2n + 2 n> 1, especially SiH 4 or Si 2 H 6 ), silicon fluoride (SiF 2
Or SiF 4 ) was used. Here, ultra-high-purity silane (purity 99.99%, but 0.1PPM for water and oxygenates is easy to handle.
The following) was used.

【0018】本実施例のSiX C1-X (0<x<1)を形成
するため、炭化物気体(25)としてDMS (ジメチルシラン
(SiH2(CH3)2 純度99.99 %)を用いた。炭化珪素(Si
X C1-X 0<x<1)に対しては、P型の不純物として
ボロンを前記したモノシラン中に同時に0.5 %の濃度に
混入させ(24)よりシランとともに供給した。必要に応
じ、水素(純度7N以上)または窒素(純度7N以上)を反
応室を大気圧とする時(23)より供給した。これらの反応
性気体はそれぞれの流量計(33)およびバルブ(32)を経、
反応性気体の供給ノズル(17)より高周波電源(14)の負電
極(61)を経て反応空間(6) に供給された。
DMS (dimethylsilane (SiH 2 (CH 3 ) 2 purity 99.99%)) was used as the carbide gas (25) to form the Si X C 1-X (0 <x <1) of this example. . Silicon carbide (Si
For X C 1-X 0 <x <1, boron was supplied as a P-type impurity into the above-mentioned monosilane at a concentration of 0.5% at the same time (24) and supplied together with silane. If necessary, hydrogen (purity 7N or higher) or nitrogen (purity 7N or higher) was supplied from the time (23) when the reaction chamber was brought to atmospheric pressure. These reactive gases pass through their respective flow meters (33) and valves (32),
The reactive gas was supplied from the supply nozzle (17) to the reaction space (6) through the negative electrode (61) of the high frequency power supply (14).

【0019】反応性気体はホルダ(38)に囲まれた筒状空
間(6) 内に供給され、この空間を構成する基板(1) に被
膜形成を行った。さらに負電極(61)と正電極(61') 間に
電気エネルギ例えば13.56MHzの高周波エネルギ(14)を加
えてプラズマ反応せしめ、基板上に反応生成物を被膜形
成せしめた。基板は100 〜400 ℃例えば 200℃に図2に
示す反応容器(103) の容器の前後に配設された赤外線ヒ
ータと同じ手段により加熱した。
The reactive gas was supplied into the cylindrical space (6) surrounded by the holder (38), and a film was formed on the substrate (1) constituting this space. Further, electric energy, for example, high frequency energy (13.56 MHz) (14) was applied between the negative electrode (61) and the positive electrode (61 ') to cause plasma reaction, and a reaction product was formed on the substrate. The substrate was heated to 100 to 400 ° C., for example 200 ° C., by the same means as the infrared heaters arranged before and after the reaction vessel (103) shown in FIG.

【0020】この赤外線ヒータは、近赤外用ハロゲンラ
ンプ(発光波長1〜3μ)ヒータまたは遠赤外用セラミ
ックヒータ(発光波長8〜25μ)を用い、この反応容器
内におけるホルダにより取り囲まれた筒状空間を200 ±
10℃好ましくは±5℃以内に設置した。この後、前記し
たが、この容器に前記した反応性気体を導入し、さらに
10〜500W例えば100Wに高周波エネルギ(14)を供給してプ
ラズマ反応を起こさせた。かくしてP型半導体層はB2H6
/SiH4=0.5 %,DMS/(SiH4+DMS)=10%の条件にて、
この反応系Aで平均膜厚30〜300 Å例えば約100 Åの厚
さを有する薄膜として形成させた。Eg=2.05eV, σ=1
×10-6〜3×10-5( Ωcm) -1であった。
As the infrared heater, a near infrared halogen lamp (emission wavelength of 1 to 3 μ) or a far infrared ceramic heater (emission wavelength of 8 to 25 μ) is used, and a cylindrical space surrounded by a holder in the reaction container. To 200 ±
It was installed at 10 ° C, preferably within ± 5 ° C. After this, as described above, the reactive gas described above was introduced into this container, and
A high frequency energy (14) was supplied to 10 to 500 W, for example 100 W, to cause a plasma reaction. Thus, the P-type semiconductor layer is B 2 H 6
/ SiH 4 = 0.5%, DMS / (SiH 4 + DMS) = 10%,
This reaction system A was formed as a thin film having an average film thickness of 30 to 300Å, for example, about 100Å. Eg = 2.05eV, σ = 1
It was from × 10 -6 to 3 × 10 -5 (Ωcm) -1 .

【0021】基板は導体基板(ステンレス、チタン、ア
ルミニューム、その他の金属),半導体(珪素、ゲルマニ
ューム),絶縁体(ガラス、有機薄膜)または複合基板
(ガラスまたは透光性有機樹脂上に透光性導電膜である
弗素が添加された酸化スズ、ITO 等の導電膜が単層また
はITO 上にSnO2が形成された2層膜が形成されたもの)
を用いた。本実施例のみならず本発明のすべてにおいて
これらを総称して基板という。勿論この基板は可曲性で
あってもまた固い板であってもよい。
The substrate is a conductor substrate (stainless steel, titanium, aluminum or other metal), a semiconductor (silicon, germanium), an insulator (glass, organic thin film) or a composite substrate (glass or transparent organic resin on which light is transmitted). Conductive conductive film such as tin oxide to which fluorine is added, ITO is a single conductive film, or a two-layered film in which SnO 2 is formed on ITO)
Was used. These are collectively referred to as a substrate not only in this embodiment but also in all of the present invention. Of course, this substrate may be flexible or a rigid plate.

【0022】かくして1〜5分間プラズマ気相反応をさ
せて、P型不純物としてホウ素が添加された炭化珪素膜
を約 100Åの厚さに作製した。さらにこの第1の半導体
層が形成された基板をゲート(45)を開け前記した操作順
序に従ってバッファ室(102)に移動し、ゲート(45)を閉
じた。このバッファ室(102) は予め10-8torr以下例えば
4×10-10 torrにターボ分子ポンプ(TP)(88)にて真空引
きがされている。またこの基板は系Cに同様にTP(89)に
より、1×10-7torr以下に保持された反応容器にゲート
(46)の開閉を経て移設された。即ち図1における反応系
Cにおいて、半導体の反応性気体として超高純度モノシ
ランまたはジシランを(水または酸化珪素、酸化物気体
の濃度は0.1PPM以下)(28) より、また、1017cm-3以下の
ホウ素を添加するため、水素、シラン等によって0.5 〜
30PPM に希釈したB2H6を(27)より、またキャリアガスを
必要に応じて(26)より供給した。反応性気体は基板(1)
の被形成面にそって上方より下方に流れ、TP(89)に至
る。系Cにおいて出口側よりみた縦断面図を図2に示
す。
Thus, the plasma vapor phase reaction was carried out for 1 to 5 minutes to form a silicon carbide film to which boron was added as a P-type impurity in a thickness of about 100 Å. Further, the substrate on which the first semiconductor layer was formed was moved to the buffer chamber (102) by opening the gate (45) and following the above-mentioned operation sequence, and the gate (45) was closed. The buffer chamber (102) is evacuated in advance to less than 10 -8 torr, for example, 4 × 10 -10 torr by a turbo molecular pump (TP) (88). This substrate is also gated by TP (89) to a reaction vessel held at 1 × 10 -7 torr or less as in system C.
It was relocated after opening and closing (46). That is, in the reaction system C in FIG. 1, ultrahigh-purity monosilane or disilane is used as the reactive gas of the semiconductor (water or silicon oxide, the concentration of the oxide gas is 0.1 PPM or less) (28), and 10 17 cm -3 Since the following boron is added, it is possible to add 0.5 to 0.5 by hydrogen, silane, etc.
B 2 H 6 diluted to 30 PPM was supplied from (27), and a carrier gas was supplied from (26) as needed. Reactive gas substrate (1)
It flows from the upper side to the lower side along the formation surface of TP and reaches TP (89). FIG. 2 shows a vertical sectional view of the system C as seen from the outlet side.

【0023】図面において、ランプヒータ(13)(13') は
棒状のハロゲンランプを用いた。反応空間はヒータによ
り100 〜400 ℃例えば250 ℃とした。基板(1) が基板ホ
ルダ(2) に保持され、外枠冶具(38)(38') で閉じ込め、
空間(8) を構成している。つぎに第2の反応室に移動さ
れたP型半導体層が形成してある基板(1) 上に、I型半
導体層を5000Åの厚さにSiH4 60cc/分、被膜形成速度
2.5 Å/秒、基板(20cm×60cmを20枚、延べ面積24000
cm2 )で圧力0.1 torrとして形成した。尚Si2H6 を用い
た場合、被膜形成速度28Å/秒を有していた。かくして
第1の反応室にてプラズマ気相法によりP型半導体層を
形成した上にPCVD法によりI型半導体層を形成させてPI
接合を構成させた。
In the drawings, rod-shaped halogen lamps are used as the lamp heaters 13 and 13 '. The reaction space was set to 100 to 400 ° C., for example 250 ° C., by a heater. The board (1) is held by the board holder (2) and is enclosed by the outer frame jigs (38) (38 '),
It constitutes the space (8). Next, on the substrate (1) on which the P-type semiconductor layer moved to the second reaction chamber is formed, the I-type semiconductor layer is formed to a thickness of 5000 Å, SiH 4 60 cc / min, and a film formation rate.
2.5 Å / sec, substrate (20 cm x 60 cm, 20 sheets, total area 24000
It was formed at a pressure of 0.1 torr in cm 2 ). When Si 2 H 6 was used, the film formation rate was 28 Å / sec. Thus, the P-type semiconductor layer is formed in the first reaction chamber by the plasma vapor phase method, and then the I-type semiconductor layer is formed by the PCVD method.
The joint was made up.

【0024】また系Cにて約7000Åの厚さにI型半導体
層を形成させた後、基板は前記した操作に従って、隣の
バッファ室(104) に移され、さらにその隣の反応室に移
設して同様のPCVD工程によりN型半導体層を形成させ
た。このN型半導体層は、PCVD法によりフォスヒンをPH
3 /SiH4=1.0 %としたシランとキャリアガスの水素を
SiH4/H2=20%として供給して、系Aと同様にして約20
0 Åの厚さにN型の微結晶性または繊維構造を有する多
結晶の半導体層を形成させて、さらにその上面に、炭化
珪素をDMS /(SiH4+DMS)=0.1 としてSiX C1-X(0<
x<1)で示されるN型半導体層を10〜200 Åの厚さ例
えば50Åの厚さに積層して形成させたものである。その
他反応装置については系Aと同様である。かかる工程の
後、第2の予備室より外にPIN 接合を構成して出された
基板上に100 〜1500Åの厚さのITOをさらにその上に反
射性または昇華性金属電極例えばアルミニューム電極を
真空蒸着法により約1μの厚さに作り、ガラス基板上に
(ITO+SnO2)表面電極─(PIN 半導体)─(裏面電極)
を構成させた。
After forming the I-type semiconductor layer to a thickness of about 7,000 Å in the system C, the substrate is transferred to the adjacent buffer chamber (104) according to the above-mentioned operation and further transferred to the adjacent reaction chamber. Then, an N-type semiconductor layer was formed by the same PCVD process. This N-type semiconductor layer is formed by removing Phoshin by using the PCVD method.
3 / SiH 4 = 1.0% silane and carrier gas hydrogen
SiH 4 / H 2 = 20%, and supply about 20% in the same manner as system A
A polycrystalline semiconductor layer having an N-type microcrystalline or fibrous structure is formed to a thickness of 0 Å, and silicon carbide is further formed on the upper surface thereof with DMS / (SiH 4 + DMS) = 0.1 to form Si X C 1 -X (0 <
It is formed by laminating N-type semiconductor layers represented by x <1) to a thickness of 10 to 200Å, for example, 50Å. Other reactors are the same as those in the system A. After this step, a 100 to 1500Å thick ITO film is formed on the substrate formed by PIN bonding outside the second auxiliary chamber, and a reflective or sublimable metal electrode such as an aluminum electrode is further formed thereon. It is made to a thickness of about 1μ by the vacuum deposition method, and (ITO + SnO 2 ) front surface electrode ─ (PIN semiconductor) ─ (back surface electrode) on the glass substrate.
Was configured.

【0025】このようにして形成されたPIN 接合を有す
る半導体装置の光電変換装置としての特性は7〜9%、
平均8%を10cm×10cmの基板でAM1 (100mW /cm2
の条件下にて真性効率特性として有し、集積化してハイ
ブリッド型にした40cm×60cmのガラス基板においても、
5.5 %を実効効率で得ることができた。その結果、1つ
の素子で開放電圧は0.85〜0.9V(0.87±0.02V )であっ
たが、短絡電流は18±2 mA/cm2 と大きく、またFFも
0.60〜0.70と大きく、かつそのばらつきもパネル内、バ
ッチ内で小さく、工業的に本発明方法はきわめて有効で
あることが判明した。図3は本発明および従来方法によ
り作られたPIN 型光電変換装置における半導体内の酸素
および炭素の不純物の濃度分布を示す。図面はアルミニ
ューム裏面電極(94), N型半導体(93), I型半導体(9
2), P型半導体(91), 基板上の酸化スズ透光性導電膜(9
0)をそれぞれ示す。
The characteristics of the semiconductor device having the PIN junction thus formed as a photoelectric conversion device are 7 to 9%,
AM1 (100mW / cm 2 ) on a 10cm x 10cm substrate with an average of 8%
It has intrinsic efficiency characteristics under the conditions of, and even in a 40 cm × 60 cm glass substrate that is integrated into a hybrid type,
It was possible to obtain 5.5% with effective efficiency. As a result, the open-circuit voltage was 0.85-0.9V (0.87 ± 0.02V) with one element, but the short-circuit current was as large as 18 ± 2mA / cm 2, and the FF also
It was as large as 0.60 to 0.70 and the variation was small in the panel and in the batch, and it was found that the method of the present invention is industrially extremely effective. FIG. 3 shows concentration distributions of oxygen and carbon impurities in a semiconductor in a PIN photoelectric conversion device manufactured by the present invention and the conventional method. The drawing shows the aluminum back electrode (94), N-type semiconductor (93), I-type semiconductor (9
2), P-type semiconductor (91), tin oxide translucent conductive film (9
0) is shown respectively.

【0026】従来方法の排気系を回転ポンプまたはメカ
ニカルブースターポンプのみによる排気方法において
は、連続排気方式のTPを用いないため、炭素は曲線(9
5), 酸素は曲線(96)に示される高い濃度の不純物を含有
していた。特に酸素は、5×1019〜2×1020cm-3をI型
半導体(92)において有していた。図面は5×1019cm-3
酸素を含んだ場合である。加えて油回転ポンプからの油
成分の逆流により炭素が5×1020〜4×1020cm-3を有し
ていた。図面は1×1020cm -3を有する場合である。
The conventional exhaust system is a rotary pump or a mechanism.
In the exhaust method using only the nical booster pump
Does not use a continuous exhaust type TP, so the carbon curve (9
5), oxygen contains high concentration of impurities shown in curve (96)
Was. Especially oxygen is 5 × 1019~ 2 x 1020cm-3Type I
Had in semiconductors (92). Drawing is 5 × 1019cm-3of
This is the case when oxygen is included. In addition, oil from the oil rotary pump
5 × 10 carbon due to backflow of components20~ 4 x 1020cm-3Have
Was there. Drawing is 1 × 1020cm -3Is the case.

【0027】他方、本発明に示すごとき排気系において
は炭素濃度は曲線(98)で示されるように1×1017〜5×
1018cm-3を有し、一般には1×1018cm-3以下しか含まれ
ない。加えて酸素も曲線(97)で示されるように5×1018
cm-3以下好ましくは1×1018cm-3以下であり、図3では
2×1018cm-3の場合を示している。図3において、裏面
電極(94)のアルミニュームには3〜6×1020cm-3の酸素
を有している。このため、この酸素がSIMS(二次イオン
分析法)(カメカ社3F型を使用)の測定において、バッ
クグラウンドの酸素となり、N型半導体(93)中の酸素は
1018〜1020cm-3となってしまったものと考えられる。
On the other hand, in the exhaust system as shown in the present invention, the carbon concentration is 1 × 10 17 to 5 × as shown by the curve (98).
It has 10 18 cm -3 and generally contains no more than 1 x 10 18 cm -3 . In addition, oxygen is also 5 × 10 18 as shown by curve (97).
cm −3 or less, preferably 1 × 10 18 cm −3 or less, and FIG. 3 shows the case of 2 × 10 18 cm −3 . In FIG. 3, the aluminum of the back electrode (94) has 3 to 6 × 10 20 cm −3 of oxygen. Therefore, this oxygen becomes the background oxygen in the measurement of SIMS (secondary ion analysis method) (using Kameka Co. 3F type), and the oxygen in the N-type semiconductor (93) becomes
It is thought that it became 10 18 to 10 20 cm -3 .

【0028】さらにP型半導体中の酸素、DMS 中に含ま
れる水の成分があるため不純物があり、この出発材料を
シランを精製して0.1PPM以下の酸素または酸化物とする
ことによりさらに酸素濃度を下げることの可能性が推定
できる。形成させる半導体の種類に関しては、Siのみな
らず他は4族のGe,SixC1-X(0<x<1),SixGe1-X(0
<x<1),SixSn(0<x<1),単層または多層であっ
ても、またこれら以外にGaAs,GaAlAs,BP,CdS等の化合物
半導体等の非酸素化物であってもよいことはいうまでも
ない。本発明は3つの反応容器を用いてマルチチャンバ
方式でのPCVD法を示した。しかしこれを1つの反応容器
とし、そこでPCVD法により窒化珪素をシラン(SiH4また
はSi2H6 )とアンモニア(NH3 )とのPCVD反応により形
成させることは有効である。
Further, there are impurities in the P-type semiconductor due to oxygen and water contained in DMS, and the starting material is purified from silane to obtain oxygen or oxide of 0.1 PPM or less, thereby further increasing the oxygen concentration. It is possible to estimate the possibility of lowering. Regarding the types of semiconductors to be formed, not only Si but also other group 4 Ge, SixC 1-X (0 <x <1), SixGe 1-X (0
<X <1), SixSn (0 <x <1), single-layer or multi-layer, or non-oxygenated compound semiconductor such as GaAs, GaAlAs, BP, CdS. Needless to say. The present invention has shown a PCVD method in a multi-chamber system using three reaction vessels. However, it is effective to use this as one reaction vessel and to form silicon nitride by the PCVD method by the PCVD reaction of silane (SiH 4 or Si 2 H 6 ) and ammonia (NH 3 ).

【0029】本発明で形成された非単結晶半導体被膜
は、絶縁ゲイト型電界効果半導体装置におけるN(ソー
ス)I(チャネル形成領域)N(ドレイン)接合または
PIP 接合に対しても有効である。さらに、PIN ダイオー
ドであってエネルギバンド巾がW─N─W(WIDE-NALLO
W-WIDE)またはSiX C1-X ─Si─SiX C1-X( 0 <x<
1)構造のPIN 接合型の可視光レーザ、発光素子または
光電変換装置を作ってもよい。特に光入射光側のエネル
ギバンド巾を大きくしたヘテロ接合構造を有するいわゆ
るW(PまたはN型)─N(I型)(WIDE TO NALLOW)と
各反応室にて導電型のみではなく生成物を異ならせてそ
れぞれに独立して作製して積層させることが可能にな
り、工業的にきわめて重要なものであると信ずる。本発
明において、分離部は単にゲイト弁のみではなく、2つ
のゲ─ト弁と1つのバッファ室とを系2として設けてP
型半導体の不純物のI型半導体層中への混入をさらに防
ぎ、特性を向上せしめることは有効であった。またバッ
ファ室を設けることによって反応室同士の反応気体が混
合することを防ぐことは、PINPIN・・・PIN 接合等を有
する半導体装置をマルチチャンバー方式のCVD装置を
用いて大量に生産する場合に有効な手段である。
The non-single-crystal semiconductor film formed by the present invention is an N (source) I (channel forming region) N (drain) junction or an insulating gate type field effect semiconductor device.
It is also effective for PIP bonding. Furthermore, it is a PIN diode and its energy bandwidth is W-N-W (WIDE-NALLO
W-WIDE) or Si X C 1-X ─Si─Si X C 1-X (0 <x <
1) A PIN junction type visible light laser, a light emitting element or a photoelectric conversion device having the structure may be manufactured. In particular, so-called W (P or N type) -N (I type) (WIDE TO NALLOW) having a heterojunction structure in which the energy band width on the light incident light side is wide and not only the conductive type but also the product in each reaction chamber We believe that it is industrially extremely important because it is possible to produce different layers independently of each other and laminate them. In the present invention, the separating section is not limited to the gate valve, but is provided with two gate valves and one buffer chamber as the system 2
It was effective to further prevent the impurities of the type semiconductor from mixing into the I type semiconductor layer and improve the characteristics. In addition, the provision of a buffer chamber to prevent reaction gases from mixing in the reaction chambers is effective when a large number of semiconductor devices with PINPIN ... PIN junctions are produced using a multi-chamber CVD device. It is a means.

【0030】特に各反応室の成膜時における反応圧力が
異なる場合、反応室内の圧力を変えなくてもバッファ室
の圧力を変えるだけで、反応室間で基板の移動ができる
点は重要である。なぜならばPINPIN・・・PIN 接合等を
有する半導体装置をマルチチャンバー方式のCVD装置
を用いて大量に生産する場合、従来は反応室間での基板
の移動に際していちいち関係する反応室を高真空にし、
基板を移動した後、もとのそれぞれの反応圧力に調整し
なおしていた。しかし本発明によるバッファ室を介して
基板を移動させる方法を用いた場合、各反応室の圧力は
そのままで、バッファ室のみを圧力変化させればよく、
しかも反応室間の反応気体が混合することも同時に防げ
るからである。本発明の実施例は図1に示すマルチチャ
ンバ方式であり、そのすべての反応容器にてPCVD法を供
給した。しかし必要に応じ、この一部または全部をプラ
ズマを用いない光CVD 法、LT CVD法(HOMO CVD法ともい
う),減圧CVD 法を採用して複合被膜を形成してもよい。
Particularly, when the reaction pressure during film formation in each reaction chamber is different, it is important that the substrate can be moved between the reaction chambers only by changing the pressure in the buffer chamber without changing the pressure in the reaction chamber. . This is because when a large number of semiconductor devices having PINPIN ... PIN junction or the like are produced using a multi-chamber CVD apparatus, conventionally, the reaction chambers involved in moving the substrates between the reaction chambers are set to a high vacuum,
After the substrate was moved, the original reaction pressure was adjusted again. However, in the case of using the method of moving the substrate through the buffer chamber according to the present invention, the pressure of each reaction chamber may remain unchanged and only the buffer chamber may be changed in pressure.
Moreover, it is also possible to prevent the reaction gases in the reaction chambers from being mixed with each other. The embodiment of the present invention is the multi-chamber system shown in FIG. 1, and the PCVD method is supplied to all the reaction vessels. However, if necessary, a part or all of the composite coating may be formed by using an optical CVD method that does not use plasma, an LT CVD method (also called a HOMO CVD method), or a low pressure CVD method.

【0031】[0031]

【発明の効果】本発明は被膜形成中における反応容器か
らの排気を連続排気方式の排気手段により実施するため
に、前記排気手段と反応容器との間に設けたバルブの調
整によって、反応容器内の圧力を0.01〜10tor
rとし、酸素または炭素がSIMS(二次イオン分析
法)による測定で5×1018cm-3以下の濃度である非
酸化物被膜を基板上に形成する工程と、前記反応室をバ
ルブを開としかつ水素または窒素を供給して大気圧にす
る工程とを有する方法により、被膜中に酸素または炭素
が混入していない被膜を作製することが可能である。
According to the present invention, in order to carry out the exhaust from the reaction vessel during the film formation by the exhaust means of the continuous exhaust system, the inside of the reaction vessel is adjusted by adjusting the valve provided between the exhaust means and the reaction vessel. Pressure of 0.01-10 torr
r, a step of forming a non-oxide coating on the substrate in which oxygen or carbon has a concentration of 5 × 10 18 cm −3 or less as measured by SIMS (secondary ion analysis method), and the valve is opened in the reaction chamber. And a step of supplying hydrogen or nitrogen to bring it to atmospheric pressure, it is possible to produce a coating film in which oxygen or carbon is not mixed.

【図面の簡単な説明】[Brief description of drawings]

【図1】本発明を実施するためのプラズマ気相反応用被
膜製造装置の概略を示す。
FIG. 1 shows an outline of an apparatus for producing a film for plasma vapor phase reaction for carrying out the present invention.

【図2】本発明を実施するためのプラズマ気相反応用被
膜製造装置の概略を示す。
FIG. 2 shows an outline of an apparatus for producing a film for plasma vapor phase reaction for carrying out the present invention.

【図3】本発明および従来方法によって作られた半導体
装置中の不純物の分布を示す。
FIG. 3 shows the distribution of impurities in a semiconductor device made according to the present invention and a conventional method.

【符号の説明】[Explanation of symbols]

50 反応性気体を導入するドーピング系 51 反応容器 52 排気系 61、61’、62、62’ 電極 17、18 反応性気体の供給ノズル 17’、18’ 反応性気体の排気ノズル 14、15 高周波エネルギー源 38、38’、39、39’ 絶縁物 13、13’ ハロゲンランプ等の加熱手段 101、103 反応容器 102、104 バッファ室容器 44、45、46、47 ゲート弁 100 予備室 42 予備室扉 5 予備室空間 2 基板ホルダ 1 基板 6 第1の反応室の反応空間 8 第2の反応室の反応空間 7、9 バッファ室空間 71、72、73、74 圧力調整バルブ 86、87、88、89 ターボ分子ポンプ 34、35、36、37 真空ポンプ 50 Doping System Introducing Reactive Gas 51 Reaction Vessel 52 Exhaust System 61, 61 ', 62, 62' Electrodes 17, 18 Reactive Gas Supply Nozzle 17 ', 18' Reactive Gas Exhaust Nozzle 14, 15 High Frequency Energy Source 38, 38 ', 39, 39' Insulator 13, 13 'Heating means such as halogen lamp 101, 103 Reaction vessel 102, 104 Buffer chamber vessel 44, 45, 46, 47 Gate valve 100 Preliminary chamber 42 Preliminary chamber door 5 Preliminary chamber space 2 Substrate holder 1 Substrate 6 Reaction space of the first reaction chamber 8 Reaction space of the second reaction chamber 7, 9 Buffer chamber space 71, 72, 73, 74 Pressure adjusting valve 86, 87, 88, 89 Turbo Molecular pump 34, 35, 36, 37 Vacuum pump

フロントページの続き (51)Int.Cl.6 識別記号 庁内整理番号 FI 技術表示箇所 C23C 16/54 H01L 31/04 Continuation of front page (51) Int.Cl. 6 Identification code Office reference number FI Technical display location C23C 16/54 H01L 31/04

Claims (2)

【特許請求の範囲】[Claims] 【請求項1】 NINまたはPIP接合を有する絶縁ゲ
イト型電界効果半導体装置の前記I型半導体層を形成す
る反応容器内で気相反応法により反応性気体を反応せし
めて珪素被膜を形成するに際し、被膜形成中における反
応容器からの排気を連続排気方式の排気手段により実施
するために、前記排気手段によって酸素または炭素がS
IMS(二次イオン分析法)による測定で5×1018
-3以下の濃度である珪素被膜を被形成面上に形成する
ことを特徴とする気相反応被膜作製方法。
1. When forming a silicon film by reacting a reactive gas by a gas phase reaction method in a reaction container forming an I-type semiconductor layer of an insulating gate type field effect semiconductor device having a NIN or PIP junction, In order to carry out the exhaust from the reaction vessel during the film formation by the exhaust means of the continuous exhaust system, oxygen or carbon is converted to S by the exhaust means.
5 × 10 18 c measured by IMS (secondary ion analysis)
A method for producing a vapor phase reaction coating, which comprises forming a silicon coating having a concentration of m -3 or less on a surface to be formed.
【請求項2】 NINまたはPIP接合を有する絶縁ゲ
イト型電界効果半導体装置の前記I型半導体層を形成す
るに際し、相異なる反応室内で気相反応法により反応性
気体を反応せしめて、第1層、第2層、第3層からなり
少なくとも1層が珪素を含む半導体被膜を作製する方法
において、前記半導体被膜を形成するに際し、減圧状態
に保持された反応室に、反応性気体を導入し、前記第2
層の形成中の反応室はゲート弁により他の反応室から独
立させ、被膜形成中における該反応室からの反応性気体
や反応生成物を連続排気手段により、反応容器内の圧力
を0.01〜10torrとすることを特徴とする気相
反応被膜作製方法。
2. When forming the I-type semiconductor layer of an insulating gate type field effect semiconductor device having a NIN or PIP junction, a reactive gas is reacted by a gas phase reaction method in different reaction chambers to form a first layer. In the method for producing a semiconductor coating comprising a second layer and a third layer, at least one layer of which contains silicon, a reactive gas is introduced into a reaction chamber kept under reduced pressure when the semiconductor coating is formed, The second
The reaction chamber during formation of the layer is separated from other reaction chambers by a gate valve, and the reactive gas and reaction products from the reaction chamber during formation of the film are kept at a pressure of 0.01 in the reaction vessel by continuous evacuation means. A method for producing a gas phase reaction coating, which is characterized by setting the pressure to 10 torr.
JP6284149A 1994-10-25 1994-10-25 Vapor-phase reactive coating method Expired - Lifetime JPH0831424B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP6284149A JPH0831424B2 (en) 1994-10-25 1994-10-25 Vapor-phase reactive coating method

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP6284149A JPH0831424B2 (en) 1994-10-25 1994-10-25 Vapor-phase reactive coating method

Related Parent Applications (1)

Application Number Title Priority Date Filing Date
JP2165026A Division JPH061765B2 (en) 1990-06-22 1990-06-22 Vapor-phase reactive coating method

Publications (2)

Publication Number Publication Date
JPH07307297A true JPH07307297A (en) 1995-11-21
JPH0831424B2 JPH0831424B2 (en) 1996-03-27

Family

ID=17674815

Family Applications (1)

Application Number Title Priority Date Filing Date
JP6284149A Expired - Lifetime JPH0831424B2 (en) 1994-10-25 1994-10-25 Vapor-phase reactive coating method

Country Status (1)

Country Link
JP (1) JPH0831424B2 (en)

Also Published As

Publication number Publication date
JPH0831424B2 (en) 1996-03-27

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