JPH0728621A - Information processor - Google Patents

Abstract

PURPOSE:To provide the drawing processor of an information processor which speed up a drawing process by decreasing the stand-by time of the processor when the drawing process is performed. CONSTITUTION:When a CPU sends a drawing command to the drawing actuation part 106 of a drawing control part 120, the drawing actuation part 106 actuates a drawing process part 108. When the drawing process part 108 is processing another command at this time, NG is stored in a logging register 209 in the drawing actuation part 106. When not, on the other hand, OK is stored in the logging register 209 in the drawing actuation part 106 and the drawing process part 108 processes the sent drawing command. The CPU reads the contents of the logging register 209 out and decides whether the contents are NG or OK. In case of NG, the drawing command is sent again and this process is repeated until OK is stored.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an apparatus for controlling drawing processing in an information processing apparatus.

[0002]

2. Description of the Related Art Conventionally, an information processing apparatus is provided with a drawing control unit for performing drawing control, and in order for this drawing control unit to perform drawing, a drawing command including information for drawing is sent to the drawing control unit. The method is common.

At this time, if the drawing control unit is executing the drawing command sent before the drawing command to be sent, the sending of the drawing command must be waited until the execution is completed. Therefore, a status register indicating the state of the drawing control unit (whether or not the drawing command is being executed) is provided, and the drawing command is transmitted by the following method using this register.

(1) First, the contents of the status register are read out.

(2) If the contents of the status register indicate that the drawing command is being executed, the process returns to (1).

(3) When the contents of the status register indicate that the drawing command is not executed, the drawing command is transmitted.

As another conventional example of the drawing controller,
There is a drawing control chip W8720 from WEITEK. An example of using this chip in an information processing system is shown in FIG.

A logging register read request from a CPU (not shown) is sent to the W8720 via the address bus 1201.
Sent to. The address bus 1201 consists of 22 bits, and the upper 13 bits specify the address of the logging register 1202, and the lower 9 bits specify drawing information. That is, this request doubles as a logging register read request and a drawing activation request. This request is sent using the address bus because it is a read request. The upper 13 bits of the sent request are input to the address decoder 1203. Address decoder 1203
Determines whether the upper 13 bits specify the logging register 1202 and, if so, activates the drawing engine 1205 via the parameter engine 1204. The drawing engine 1205 is started up when other drawing commands are not being processed, and stores in the logging register 1202 that the startup is successful (OK). If another drawing command is being processed, the fact that the activation has failed (NG) is stored in the logging register 1202. Logging register
The contents stored in 1202 are sent to the CP via the data bus 1208.
Transferred to U. On the other hand, the lower 9 bits of the request are input to the parameter engine 1204, and the drawing information indicated by the 9 bits is stored in the register group 1205 in the parameter engine 1204. Drawing engine using stored drawing information
A 1206 draws a graphic or the like on the display memory 1207.

[0009]

Of the time required for the processing of the above-mentioned conventional drawing method, the time from the drawing request from the central processing unit to the end of drawing is the drawing time and the central processing unit. Is the time from when the drawing processing unit checks the state of the drawing processing unit to the activation of the drawing processing unit, the drawing command transfer time, and the time from the activation of the drawing processing unit to the state of waiting for the next command after finishing the drawing. This is the operation time of the drawing processing unit.

Conventionally, when the status register is used, the drawing time is the sum of the drawing command transfer time and the drawing processing unit operation time. Of these, the drawing processing unit is not operating during the drawing command transfer time.
Therefore, each time the drawing command is processed, the drawing processing unit has a waiting time corresponding to the drawing command transfer time. Conventionally, in the case of speeding up the drawing, there is a problem that even if the performance of the drawing processing unit is improved and the operating time of the drawing processing unit is shortened, the performance is not sufficiently improved because of this waiting time.

When the W8720 is used as a drawing control unit, the CPU does not read the contents of the status register, but requests the reading of the logging register via the address bus (drawing information for starting drawing. (Including) is transmitted to the drawing control unit. The drawing control unit starts the engine (drawing engine) that performs the drawing process in response to the transmission of the request, stores the information indicating whether or not the startup is successful in the logging register, and the information is read to the CPU. To be done. Therefore, the drawing command transfer time is remarkably shorter than that when the status register is used. However, it is necessary to describe both the information specifying the reading request of the logging register (upper 13 bits) and the drawing information for starting drawing (lower 9 bits). That is, the W8720 has a problem in that 512 wide addresses are assigned to the request (information) of "reading of logging register and activation of drawing".

The present invention does not require a waiting time for reading the status register, and does not require a wide address allocation in the drawing control unit for the information "reading of logging register and activation of drawing". An object is to provide a processing device.

[0013]

In order to solve the above problems, the present invention comprises an arithmetic unit, a display unit and a drawing processing unit, receives a drawing instruction from the arithmetic unit, and draws by the drawing processing unit. In the information processing device for displaying the drawn content on the display device, the drawing processing device creates a content to be drawn, and a drawing for starting the drawing means in response to the drawing instruction. And activation means. Further, the drawing instruction can be a write instruction including data as the content of the drawing instruction and one address in the drawing starting means. Further, the drawing means may include notifying means for notifying the drawing starting means of processing information indicating whether or not the drawing means is executing the drawing processing. Further, the drawing starting means receives the first register designated by the address for storing the data, the drawing instruction and the processing information, and indicates that the processing information is being executed. If it is (busy), the content of the instruction is not stored in the first register, and if it is not being executed (non-busy), the content of the drawing instruction is stored in the first register. And an instruction receiving means for activating the drawing means. The arithmetic unit further includes a second register that stores information indicating whether or not the content of the drawing instruction is stored in the first register, and the arithmetic unit sends the drawing instruction and then the second register. By referring to the information stored in the register, it can be determined whether or not the drawing instruction has been accepted.

[0014]

After transferring the drawing command instructing to start drawing, the logging register is checked. The success or failure of writing the transferred drawing command is determined by the contents of the logging register. If it is determined that the writing of the drawing command has succeeded, the process moves to the next drawing command, and if it is determined that the writing of the drawing command has failed, the writing of the command (the previously transferred drawing command) is performed. try again. This makes it possible to operate the drawing processing unit with a reduced waiting time. Also, one address (two addresses in total) may be assigned to each of the information of "reading of logging register" and "start of drawing".

[0015]

Embodiments of the present invention will be described below with reference to the drawings.

FIG. 1 is a hardware block diagram of the present invention. 101 is a central processing unit (hereinafter abbreviated as CPU), 102
Is a memory management unit, 103 is a main memory, 1
Reference numeral 04 is a system bus, 105 is another I / O device, 106 is a drawing activation unit, 107 is a parameter register, 108 is a drawing processing unit, 109 is a display memory, and 110 is a display device. The drawing activation unit 106, the parameter register 107, and the drawing processing unit 108 constitute a drawing control unit 120. Data transfer from the CPU 101 to the drawing control unit 120 is performed by the memory management unit 1
02 and the system bus 104. The following method is used for the CPU 101 to draw on the display memory 109. First, the CPU 101 sets data such as coordinates used for drawing in the parameter register 107, and then issues a drawing command to the drawing starting unit 106. Upon receiving this, the drawing activation unit 106
The state of the drawing processing unit 108 is determined, and if drawing is possible, the activation is notified to the drawing processing unit 108. In response to this, the drawing processing unit 108 writes to the display memory 109 based on the drawing command.

FIG. 2 is a detailed diagram of the drawing activation unit 106 (see FIG. 1) according to the first embodiment of the present invention. In the figure, 201 is an address decoder, 202 is an address selection signal, 203 is a write request signal, 204 is a data valid signal, 205 is a drawing processing unit Busy signal, 206 is a drawing start register, 207 is a drawing register latch signal, 208 is a drawing processing unit start trigger signal, 209
Is a logging register, 210 is a drawing section status signal, 211
Is a logging register latch signal, 212 is an acknowledge generation circuit, 213 is a system bus acknowledge signal, 214 is a data bus, and two AND gates.

The detailed operation of each part will be described.

The address decoder (201) is a system bus.
It is determined whether the address coming from (104) is an address (drawing command) for writing to the drawing activation register (206), and the result is output as an address selection signal (202). The logical product of this address selection signal and the write request signal (203) is taken to be the activation register data valid signal (204).

The drawing processing unit (108) is started by a drawing processing unit starting trigger signal (208) described later, and the drawing starting register is activated.
Writing to the display memory (109) is performed based on the drawing command written in (206). In addition, the drawing processing unit B from the start of the drawing processing unit to the end of drawing.
The usy signal (205) is set to true.

The drawing activation register (206) is a writable register. When the CPU (101) writes a drawing command in this register, the drawing processing unit (108)
Starts drawing. The drawing processing unit Busy signal (205)
And a signal obtained by ANDing the data valid signal (204) and the drawing register latch signal (207), and when this signal becomes true, the drawing start register latches the data of the system bus, Update the content. Further, this signal becomes a drawing processing unit activation trigger signal (208) and is transmitted to the drawing processing unit (108). The drawing processing unit that receives this signal starts drawing based on the contents of the parameter register and the drawing register.

The logging register (209) is a readable register. Whether or not the drawing command is adopted is written in this register. Start register data valid signal (20
4) becomes the logging register latch signal (211) as it is, and when this signal becomes true, the logging register (209)
Latches the drawing unit status signal (210) which is the inversion of the drawing processing unit Busy signal (205). Similarly, the activation register data valid signal (204) is input to the acknowledge generation circuit (212), and the output is returned to the system bus as the acknowledge signal (213). The logging register (209) is CP
It is read by a read request (including an address designating the register) of the register from U (101). In FIG. 2, an address decoder for decoding the address of the register is omitted.

Next, the overall operation during the drawing process will be described with reference to FIG. 3, and a time chart at this time is shown in FIG. In FIG. 3, a flowchart of the processing procedure of the software executed by the CPU 101 when performing drawing is shown in FIG.
1 to 304, the operation of the drawing activation unit 106 is shown in 305 to 310 in the figure.

First, the CPU 101 causes the parameter register 107
Write the parameters to (301). Next drawing start register 2
Write the drawing command in 06 (302). At this time, the drawing activation unit 106 starts the operation, and it is determined whether the drawing processing unit 108 is in operation based on the drawing processing unit Busy signal (30
Five).

When it is determined that the drawing processing unit 108 is not in operation, the operation time chart is as shown in FIG. The drawing register latch signal (208) becomes true, and the contents (drawing command) of the drawing processing unit start register (207) are updated.
(306). Also, the drawing processing unit activation trigger signal (209) becomes true, and the drawing processing unit (205) is activated (307). Further, the adoption of the drawing command is written in the logging register (210) (308).

When it is determined that the drawing processing unit is in operation, the operation time chart is as shown in FIG. The drawing register (207) is not updated. The fact that the drawing command was rejected is written in the logging register (210) (30
9). Finally, the drawing activation unit 106 transmits an acknowledge signal (212) to the system bus (310), terminates the writing operation of the system bus (102), and ends the processing.

When the process 310 is completed, the process returns to the software process on the CPU side to read the logging register (303). This is done by designating the address of the logging register and issuing a read request. Based on the read contents of the logging register, it is determined whether or not the drawing command is adopted in the drawing processing unit (304). If the drawing command is not adopted, the process returns to 302 and the drawing start register 206 of the drawing command is entered. Start with writing. Processing 3
When it is determined in 04 that the drawing command has been adopted,
One drawing (execution of one drawing command) ends.
According to this embodiment, after the drawing command is written in the drawing activation register, it is possible to confirm whether the drawing command is accepted or not, and the waiting time of the drawing processing unit 108 is shortened.

FIG. 6 is a detailed view of the drawing activation unit (600) according to the second embodiment of the present invention. In the figure, those having the same functions as those in FIG. 2 have the same numbers. 201 is an address decoder, 202 is an address selection signal, 203 is a system bus write request signal, 204 is a data valid signal, 205 is a drawing processing unit Busy signal, 206 is a drawing register, 207 is a drawing register latch signal, 208 is a drawing processing unit start trigger signal, 501 is a start acceptance signal, 502 is a timer, 503
Is a timer start signal, 504 is a time-up signal, 209 is a logging register, 210 is a drawing section status signal, 211 is a logging register latch signal, 212 is an acknowledge generation circuit, 213 is an acknowledge signal of the system bus, and two AND gates. -And one OR gate.
The operation of the part different from FIG. 2 is shown.

The timer (502) uses the data valid signal (204).
When the timer start signal (503) separated from is received, the time-up signal (504) is set to false first, and then the time-up signal (504) is set to true after measuring a fixed time. This time-up signal (504) indicates that the system bus is about to cause a timeout error.

The logging register (209) is a readable register in which the acceptance / rejection of drawing commands is written. Further, by the OR of the start acceptance signal (501) and the time-up signal (504) separated from the start trigger signal (207),
It becomes the logging register latch signal (211), and when this signal becomes true, the logging register latches the drawing unit status signal (210). Further, this logging register latch signal enters the acknowledge creating circuit (212) and is returned to the system bus as an acknowledge signal (213).

FIG. 6 shows a flowchart of the operation of the drawing starting unit 600. The flow chart of the software when the CPU 101 draws is designated by 301 to 304 in the drawing, and the drawing starting unit 60
The operation of 0 is indicated by 305 to 310, 601 and 602 in the figure. Items having the same numbers as those in FIG. 3 indicate the same processing. First, the CPU
101 writes parameters to parameter register 107
(301). Next, write the drawing command to the drawing register (30
2). At this time, the start register data valid signal (204) becomes true, and when this signal comes out, the timer (502) starts.
To Next, the drawing processing unit Busy signal (205) is used to determine whether the drawing processing unit 108 is in operation (30
Five).

If it is determined that the drawing processing unit 108 is not drawing, the drawing register latch signal (207)
Becomes true, and the drawing command in the drawing processing unit start register (206) is updated (306). Further, the drawing processing unit activation trigger signal (208) also becomes true, and the drawing processing unit (108) is activated (307). Further, the adoption of the drawing command is written in the logging register (209) (308).

When the drawing processing unit 108 is performing drawing, the drawing processing unit Busy signal (205) is true, and it is determined in step 305 that drawing is in progress.
Go to. In this state, since the acknowledge signal (213) has not been returned to the system bus, the system bus (104) below the CPU (101) is waiting for the acknowledge signal, and the drawing register (206) is not updated.

Here, when the drawing processing unit Busy signal (205) becomes false, the drawing register latch signal (207) becomes true, the drawing register (206) is updated, and thereafter the drawing processing unit operates. Do the same as if not.

When the drawing processing unit Busy signal (205) remains true (during drawing), when the timer (502) finishes measuring a fixed time, a time-up signal (504) is transmitted. This time-up signal 504 will wait until the system bus (10
It means that 4) becomes a bus timeout error. When this signal 504 occurs, the logging register (20
It is written in 9) that the drawing command was rejected (309). Finally, the system bus (104) is terminated by the acknowledge signal (213). Subsequent software processing (30
(3, 304) is the same as that of the first embodiment, and will be omitted.

The time chart of FIG. 8 will be described.
In the configuration shown in FIG. 2, when the CPU 101 sends a drawing request to the drawing starting unit 106, the drawing processing unit 108 is processing (drawing) the previously sent drawing command, and the drawing starting unit 106 is in process.
If the drawing processing unit 108 is not started up by the process (failure), the CPU 101 must issue a drawing request to the drawing starting unit 106 again (see FIG. 5). However, in the configuration shown in FIG. 6, the CPU 101 sends a drawing request to the drawing activation unit 6
When the drawing request is sent to 00, the drawing processing unit 108 is processing (drawing) the previously sent drawing command, and the drawing request is sent even if the drawing starting unit 600 does not start the drawing processing unit 108. Then, within the predetermined time measured by the timer,
It will be in a state of waiting for activation acceptance while issuing a drawing request. As a result, if the processing of the drawing processing unit 108 is completed within the predetermined time, the drawing starting unit 600 does not have to issue a drawing request again.
By this, the drawing processing unit 108 can be activated. The time chart of FIG. 8 shows such a state.

FIG. 9 is a time chart when the drawing command is rejected. In the configuration shown in FIG. 6, C
When the PU sends a drawing request to the drawing starting unit 600, the drawing processing unit 108 is processing (drawing) the previously sent drawing command, and the drawing starting unit 600 starts the drawing processing unit 108. Even if the drawing request is not sent, for a predetermined time measured by a timer after the drawing request is sent, the drawing request is issued and the activation acceptance is waited. However, if the processing of the drawing processing unit 108 is not completed within the predetermined time, the drawing request is issued again and the drawing starting unit 600 starts the drawing processing unit 108. The time chart of FIG. 9 shows such a state.

Further, in the first and second embodiments, it is known in advance that the drawing command (drawing process) to be executed will be completed (it is not necessary to retry) until the next drawing request is issued. If the drawing command has such a short processing time that it is desired to execute such a drawing command a plurality of times, drawing is performed by software (CPU side software) as shown in the flowchart of FIG. be able to.

In this flowchart, when the first drawing command is executed, it is determined whether the drawing command is accepted by referring to the logging register as in FIGS. 3 and 7, and if it is not accepted, Writes the drawing command again, and if received, the process moves to execution of the next drawing command (301 to 304). However, after the first drawing command is accepted, the execution of the previous drawing command is considered to have finished from the next drawing command, and it is determined whether the drawing command is accepted by referring to the logging register. Only the setting of the parameter register and the writing of the drawing command to the drawing register are repeated without making a determination (801 to 803). by this,
A series of drawing commands can be processed at high speed.
The time chart at this time is shown in FIG.

[0040]

According to the present invention, since the drawing processing unit is requested to be activated without reading the status register, and thereafter the reading for checking the logging register is performed in parallel with the drawing process, the logging register The time required for reading is hidden in the time required for drawing processing, and the speed of drawing processing can be increased. Also, when compared to W8720,
Unless the operation time of the drawing processing unit is extremely short, the time required to read the logging register is hidden by the operation time of the drawing processing unit. For this reason, there is little deterioration in performance. On the other hand, the allocation of the addresses required for "starting the drawing process" and "reading out the logging register" may be two (addresses for specifying the drawing start register and addresses for specifying the logging register).

Further, since it is possible to continue the request for starting the drawing processing unit for a predetermined time, it is possible to reduce the number of processes for retry and further speed up the drawing process. As a result, the average waiting time can be shortened, and the processing speed can be increased even when compared with the W8720.

Further, since there are a plurality of drawing commands, the processing time (drawing time) of these drawing commands is sufficiently short,
It is known in advance that even if two drawing commands out of the plurality of commands are continuously requested to activate the drawing processing unit, the second request is generated after the processing by the first request is completed. If so, the drawing process can be further speeded up by omitting the process of checking the logging register and creating a program for the drawing process.

[Brief description of drawings]

FIG. 1 is a hardware block diagram of an information processing apparatus according to the present invention.

FIG. 2 is a detailed circuit diagram of a drawing activation unit (first embodiment).

FIG. 3 is a flowchart at the time of drawing processing (first embodiment).

FIG. 4 is a time chart during drawing processing (when drawing is successful in the first embodiment).

FIG. 5 is a time chart during drawing processing (when drawing fails in the first embodiment).

FIG. 6 is a detailed circuit diagram of a drawing activation unit (second embodiment).

FIG. 7 is a flowchart at the time of drawing processing (second embodiment).

FIG. 8 is a time chart during drawing processing (in the second embodiment,
If the drawing is successful after waiting for the start acceptance).

FIG. 9 is a time chart during drawing processing (in the second embodiment,
If the drawing fails after waiting for the start acceptance).

FIG. 10 is a flowchart during drawing processing (third embodiment).
Is.

FIG. 11 is a time chart during drawing processing (third embodiment).
Is.

FIG. 12 is a block diagram of W8720.

[Explanation of symbols]

101 ... Central processing unit, 102 ... Memory management unit, 103 ... Main memory, 104 ... System bus, 105 ...
Other I / O devices, 106, 600 ... Drawing activation unit, 107 ... Parameter register, 108 ... Drawing processing unit, 109 ... Display memory, 110 ... Display device, 120 ... Drawing control unit, 201 ... Address decoder, 202 ... address selection signal, 203 ... write request signal, 204 ... data valid signal, 205 ... drawing processing unit Bu
sy signal, 206 ... drawing start register, 207 ... drawing register latch signal, 208 ... drawing processing unit start trigger signal, 209 ... logging register, 210 ... drawing unit status signal, 211 ... logging register latch signal, 212 ... acknowledge creation circuit, 213 ... System bus acknowledge signal, 501 ... Start acceptance signal, 502 ... Timer, 503 ... Timer start signal, 50
4… Time-up signal.

 ─────────────────────────────────────────────────── ─── Continuation of the front page (72) Kazuo Sugai Kazuo Sugai 292 Yoshida-cho, Totsuka-ku, Yokohama, Kanagawa Pref., Hitachi, Ltd. Microelectronics Equipment Development Laboratory (72) Inventor, Hitoshi Kawaguchi Totsuka-ku, Yokohama, Kanagawa 292 Yoshida-cho, Hitachi, Ltd., Microelectronics Equipment Development Laboratory (72) Inventor Masataka Kobayashi 292 Yoshida-cho, Totsuka-ku, Yokohama, Kanagawa Prefecture Hitachi Micro Software Systems Ltd. (72) Inventor, Koji Mizutani No. 1 Ikegami, Haruoka-cho, Owariasahi, Aichi, Ltd., Hitachi Systems Office Systems Division, Inc. (72) Nobutaka Kato No. 1, Ikegami, Haruoka-cho, Owariasahi, Aichi, Ltd., Office Systems Division, Hitachi, Ltd.

Claims (4)

[Claims] 1. A calculation device, a display device, and a drawing processing device, wherein a drawing instruction is received from the calculation device, drawing is performed by the drawing processing device, and the drawn contents are displayed on the display device. In the information processing device, the drawing processing device includes drawing means for generating contents to be drawn, and drawing starting means for starting the drawing means in response to the drawing instruction. It is a write instruction including data that is the content and one address in the drawing starting means, and the drawing means sets the processing information indicating whether or not the drawing processing is being executed by the drawing starting means. The drawing activation means receives the drawing instruction and the processing information designated by the address, the first register for storing the data, and the processing If the information indicates that it is being executed (busy), the contents of the instruction are not stored in the first register, and if it is not being executed (non-busy), The content of the drawing instruction is stored in the first register, and an instruction receiving unit that activates the drawing unit and information indicating whether the content of the drawing instruction is stored in the first register are stored. A second register, and the arithmetic unit, after sending the drawing instruction, refers to the information stored in the second register to determine whether the drawing instruction has been accepted. An information processing device characterized by: 2. The arithmetic unit according to claim 1, wherein the arithmetic unit makes the determination, sends the next drawing instruction when the determination is accepted, and retransmits the drawing instruction when the determination is not accepted. Information processing device. 3. The drawing activation means according to claim 1 or 2, further comprising detection means for detecting that a predetermined time has elapsed after the drawing activation means received the drawing instruction, and the instruction acceptance means comprises: When the processing information indicates that the process information is being executed when the drawing instruction is received,
Until the detection unit detects that a predetermined time has elapsed, the process information is continuously referred to determine whether the process information is busy / non-busy, and if it is non-busy, the content of the drawing instruction Is stored in the first register and the drawing means is activated. 4. The drawing instruction according to claim 1, wherein there are a plurality of types of drawing instructions having different processing times in the drawing means due to different contents to be drawn. In the case of sending a plurality of drawing instructions, when the plurality of drawing instructions of the plurality of drawing instructions are continuously given to the drawing processing apparatus, the drawing instruction given earlier is given by the drawing processing apparatus. When it is known in advance that the next instruction will be given after being processed, after sending the drawing instruction, the next instruction is sent without referring to the information stored in the storage means. Information processing equipment.