JPH07283247A - Semiconductor device - Google Patents
Semiconductor deviceInfo
- Publication number
- JPH07283247A JPH07283247A JP10079294A JP10079294A JPH07283247A JP H07283247 A JPH07283247 A JP H07283247A JP 10079294 A JP10079294 A JP 10079294A JP 10079294 A JP10079294 A JP 10079294A JP H07283247 A JPH07283247 A JP H07283247A
- Authority
- JP
- Japan
- Prior art keywords
- brazing material
- semiconductor device
- brazing
- melting point
- semiconductor chip
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
- H01L2224/732—Location after the connecting process
- H01L2224/73201—Location after the connecting process on the same surface
- H01L2224/73203—Bump and layer connectors
- H01L2224/73204—Bump and layer connectors the bump connector being embedded into the layer connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
- H01L2224/831—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector the layer connector being supplied to the parts to be connected in the bonding apparatus
- H01L2224/83101—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector the layer connector being supplied to the parts to be connected in the bonding apparatus as prepeg comprising a layer connector, e.g. provided in an insulating plate member
Landscapes
- Die Bonding (AREA)
Abstract
Description
【0001】[0001]
【産業上の利用分野】本発明は、半導体チップを金属又
は熱良伝導性のセラミック等の部材にろう付けする場
合、又は金属基板とセラミックとの間を均一なろう層に
よりろう付けされる半導体装置に関する。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor chip which is brazed to a member such as a metal or a ceramic having good thermal conductivity, or a semiconductor which is brazed by a uniform brazing layer between the metal substrate and the ceramic. Regarding the device.
【0002】[0002]
【従来の技術】従来、この種の半導体チップと電極とか
らなる金属又は両面に金属層を有する熱良伝導性のセラ
ミック等の部材との間をろう材により接着する半導体装
置は、図2及び図3に示すような部材により作られてい
た。すなわち、ベースとなる部材上に半導体チップとほ
ぼ同じ寸法のペレット状に形成されたろう材2を搭載
し、さらにこのろう材2上に半導体チップ3を搭載し、
位置決めした状態でろう材の融点より数度〜数十度高い
不活性ガス雰囲気中又は還元性ガス雰囲気中でろう材を
溶着し、冷却固化させている。2. Description of the Related Art Conventionally, a semiconductor device in which a metal composed of a semiconductor chip of this type and an electrode or a member having a metal layer on both surfaces, such as a ceramic having good thermal conductivity, is bonded with a brazing material has been disclosed in FIG. It was made of a member as shown in FIG. That is, the brazing filler metal 2 formed in a pellet shape having substantially the same size as the semiconductor chip is mounted on the base member, and the semiconductor chip 3 is mounted on the brazing filler metal 2.
In the positioned state, the brazing material is welded in an inert gas atmosphere or a reducing gas atmosphere having a temperature of several degrees to several tens of degrees higher than the melting point of the brazing material and is cooled and solidified.
【0003】半導体チップと部材との間をろう付けする
ことは、半導体チップと部材との間の機械的接続ととも
に電気的及び熱的な接続がなされる。そして、電気的及
び熱的な接続という観点からは、電気抵抗及び熱抵抗が
低い程好ましく、ろう材層の厚みが薄い程半導体装置は
良好な特性が得られる。The brazing between the semiconductor chip and the member makes an electrical and thermal connection together with a mechanical connection between the semiconductor chip and the member. From the viewpoint of electrical and thermal connection, the lower the electric resistance and the lower the heat resistance, the more preferable, and the thinner the brazing material layer, the better the characteristics of the semiconductor device.
【0004】[0004]
【発明が解決しようとする課題】しかし、従来の半導体
装置は、半導体チップと部材との間の電気的及び熱的特
性と機械的特性とのバランスを取る必要があり、半田層
の厚みを厳しく管理しなければならなかった。例えば、
供給したろう材が不必要部分に流出すると、ろう材層の
厚みが薄くなるので、部材1上にろう材の流れ防止部を
設けており、ろう材流れ防止部の加工が必要となってい
た。また、ろう材は膨張吸収の為に、柔軟性のある材料
(例えば鉛)が用いられており、熱的・電気的伝導性が
悪いものであった。However, in the conventional semiconductor device, it is necessary to balance the electrical and thermal characteristics and the mechanical characteristics between the semiconductor chip and the member, so that the thickness of the solder layer is strict. Had to manage. For example,
If the supplied brazing filler metal flows out to an unnecessary portion, the thickness of the brazing filler metal layer becomes thin. Therefore, the brazing filler metal flow prevention portion is provided on the member 1, and the brazing filler metal flow prevention portion needs to be processed. . In addition, since the brazing material is made of a flexible material (for example, lead) for expansion and absorption, it has poor thermal and electrical conductivity.
【0005】[0005]
【課題を解決するための手段】上記の課題を解決するた
めに、本発明は半導体チップとこの半導体チップを固定
する部材との間をろう材によって接続する構造を有する
半導体装置に適用され、上記ろう材中の融点より高い粒
状物を混合したものである。In order to solve the above problems, the present invention is applied to a semiconductor device having a structure in which a semiconductor chip and a member for fixing the semiconductor chip are connected by a brazing material. It is a mixture of particles having a melting point higher than that of the brazing material.
【0006】また、上記粒状物がろう材より良熱伝統性
及び良電気伝導性を有する金属である。Further, the above-mentioned granular material is a metal having better thermal conductivity and better electrical conductivity than the brazing material.
【0007】また、上記粒状物が球形である。The above-mentioned granular material is spherical.
【0008】また、上記ろう材が形成された厚みが上記
粒状物の1ないし2倍である。The thickness of the brazing material formed is 1 to 2 times that of the granular material.
【0009】[0009]
【作用】ろう材中にろう材の融点より高い粒状物を混合
しているため、最適なろう材の厚みが粒状物により決定
される。Since the particulate material having a melting point higher than that of the brazing material is mixed in the brazing material, the optimum brazing material thickness is determined by the particulate material.
【0010】粒状物がろう材より良熱伝導性及び良電気
伝導性を有しているため、半導体装置の熱特性及び電気
特性を高めることができる。Since the granular material has better thermal conductivity and better electrical conductivity than the brazing material, the thermal and electrical characteristics of the semiconductor device can be improved.
【0011】また、粒状物を球形にすることにより、粒
状物を2段積みすることなく最適な厚みを保つことが可
能となる。Further, by making the granules spherical, it is possible to maintain the optimum thickness without stacking the granules in two stages.
【0012】また、ろう材の厚みが粒状物の粒径の1な
いし2倍に成形され使用されるので、ろう付け時に粒状
物が2段積みすることがなく最適な厚みを保つことが可
能である。Further, since the thickness of the brazing filler metal is formed and used to be 1 to 2 times the particle diameter of the granular material, it is possible to maintain the optimum thickness without stacking the granular materials in two stages during brazing. is there.
【0013】[0013]
【実施例】以下、この発明を実施例を示した図1により
説明する。図において、3は半導体チップ、1は電極と
なる金属、モリブデン・タングステン等のような半導体
チップと金属基板との熱緩衝用金属、両面に金属層を有
し半導体チップと金属基板を絶縁させる熱良伝導性のセ
ラミック等の部材である。6はペレット状のろう材で、
その内部にはろう材の融点より高く、良熱伝導性で良電
気伝導性を有する球形の金属、例えばモリブデン,ニッ
ケル,銅などで構成される粒状物5が混合されている。
また、粒状物5は100ないし150μmの大きさに選
定され、成形されたろう材の厚みは粒状物の粒径の1な
いし2倍に選定されている。DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS The present invention will be described below with reference to FIG. 1 showing an embodiment. In the figure, 3 is a semiconductor chip, 1 is a metal serving as an electrode, a metal such as molybdenum / tungsten for heat buffering between the semiconductor chip and the metal substrate, and heat for insulating the semiconductor chip from the metal substrate having metal layers on both sides. It is a member of good conductivity such as ceramics. 6 is a brazing filler metal in pellet form,
Granular material 5 composed of a spherical metal, such as molybdenum, nickel, or copper, having a higher thermal conductivity and a higher electric conductivity than the melting point of the brazing filler metal is mixed therein.
Further, the granular material 5 is selected to have a size of 100 to 150 μm, and the thickness of the brazing material formed is selected to be 1 to 2 times the particle diameter of the granular material.
【0014】そして、ベースとなる部材上に半導体チッ
プとほぼ同じ寸法の粒状物内蔵のろう材6を搭載し、こ
のろう材6の上に半導体チップ3を搭載し、位置決めさ
れた状態で、ろう材の融点より数度ないし数十度高い不
活性ガス雰囲気中又は還元性ガス雰囲気中でろう材を溶
着し、冷却固化させる。Then, a brazing material 6 containing a granular material having substantially the same size as the semiconductor chip is mounted on the base member, the semiconductor chip 3 is mounted on the brazing material 6, and the brazing material is positioned. The brazing material is welded in an inert gas atmosphere or a reducing gas atmosphere having a temperature of several degrees to several tens of degrees higher than the melting point of the material, and is cooled and solidified.
【0015】このように、粒状物内蔵のろう材を用いて
半導体チップ3と部材1をろう付けすると、図1に示す
ように粒状物がそのまま残り、半導体チップ3と部材1
との間の厚みは粒状物5によって規制され、粒状物5の
粒径以下になることはない。また、このようにして成形
された半導体装置を使用したとき、電流経路及び熱流経
路は粒状物5と粒状物5を除くろう材部7が共有するこ
とになり、従来の粒状物のない半導体装置に比較して、
熱伝導が良く電気伝導の良い粒状物を電流及び熱が流れ
るので、低い電気抵抗及び熱抵抗を得ることになる。ま
た、粒状物が球形でろう材の厚みが粒状物の粒径の1な
いし2倍に成形されているので、ろう付け時に粒状物が
2段に重なることがなく、最適な厚みを保つことができ
る。As described above, when the semiconductor chip 3 and the member 1 are brazed by using the brazing material containing the granular material, the granular material remains as shown in FIG.
The thickness between and is regulated by the granular material 5 and never falls below the particle diameter of the granular material 5. Further, when the semiconductor device molded in this way is used, the current path and the heat flow path are shared by the granular material 5 and the brazing filler metal portion 7 excluding the granular material 5, so that the conventional semiconductor device without granular material is used. Compared to
Since electric current and heat flow through the granular material having good heat conduction and good electric conduction, low electric resistance and heat resistance are obtained. Further, since the granular material is spherical and the thickness of the brazing filler metal is formed to be 1 to 2 times the particle diameter of the granular material, the granular material does not overlap in two stages during brazing, and the optimum thickness can be maintained. it can.
【0016】上記実施例は、半導体チップと部材との間
にろう付けに適用されているが、熱緩衝用金属とセラミ
ック、セラミックと金属基板等、半導体装置で用いられ
ている他の部材間のろう付けについても、ろう材中に粒
状物を混合させたろう材を使用することができる。ま
た、ろう材に対する粒状物の混合比率を変化させること
によって、半導体装置の熱特性及び電気特性を制御する
ことができる。The above embodiment is applied to brazing between a semiconductor chip and a member, but between other members used in a semiconductor device, such as a heat buffer metal and a ceramic, a ceramic and a metal substrate, and the like. Also for brazing, it is possible to use a brazing material in which particles are mixed in the brazing material. Further, the thermal characteristics and electrical characteristics of the semiconductor device can be controlled by changing the mixing ratio of the granular material with respect to the brazing material.
【0017】[0017]
【発明の効果】以上のように本発明の半導体装置によれ
ば、ろう材の厚みが粒状物によって最適値に決定され、
従来のようにろう材の厚みの厳密な管理を必要としな
い。また、粒状物によって半導体装置の熱特性及び電気
特性を向上させることができる。また、部材に従来のよ
うにろう材の流れ防止部を設ける必要もない。As described above, according to the semiconductor device of the present invention, the thickness of the brazing filler metal is determined to be the optimum value by the granular material,
It does not require strict control of the thickness of the brazing material as in the past. In addition, the thermal characteristics and electrical characteristics of the semiconductor device can be improved by the granular material. Further, it is not necessary to provide the member with a brazing filler metal flow preventing portion as in the conventional case.
【図1】本発明の半導体装置の一実施例の断面図であ
る。FIG. 1 is a sectional view of an embodiment of a semiconductor device of the present invention.
【図2】従来の半導体装置の部品構成状態を示す説明図
である。FIG. 2 is an explanatory diagram showing a component configuration state of a conventional semiconductor device.
【図3】図2の半導体装置のろう付け後の断面図であ
る。3 is a cross-sectional view of the semiconductor device of FIG. 2 after brazing.
1 部材 3 半導体チップ 5 粒状物 6 ろう材 7 ろう材部 1 member 3 semiconductor chip 5 granular material 6 brazing material 7 brazing material part
Claims (4)
する部材との間をろう材によって接続する構造を有する
半導体装置において、上記ろう材中にろう材の融点より
高い粒状物を混合したことを特徴とする半導体装置。1. A semiconductor device having a structure in which a semiconductor chip and a member for fixing the semiconductor chip are connected by a brazing material, wherein a granular material having a melting point higher than that of the brazing material is mixed in the brazing material. Semiconductor device.
良電気伝導性を有する金属である請求項1記載の半導体
装置。2. The semiconductor device according to claim 1, wherein the granular material is a metal having better thermal conductivity and better electrical conductivity than the brazing material.
半導体装置。3. The semiconductor device according to claim 1, wherein the particulate matter is spherical.
物の粒径の1ないし2倍である請求項3記載の半導体装
置。4. The semiconductor device according to claim 3, wherein the thickness of the formed brazing material is 1 to 2 times the particle diameter of the granular material.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP10079294A JPH07283247A (en) | 1994-04-13 | 1994-04-13 | Semiconductor device |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP10079294A JPH07283247A (en) | 1994-04-13 | 1994-04-13 | Semiconductor device |
Publications (1)
Publication Number | Publication Date |
---|---|
JPH07283247A true JPH07283247A (en) | 1995-10-27 |
Family
ID=14283289
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP10079294A Pending JPH07283247A (en) | 1994-04-13 | 1994-04-13 | Semiconductor device |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPH07283247A (en) |
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2000269415A (en) * | 1999-03-18 | 2000-09-29 | Hitachi Ltd | Resin-sealed type electronic device for internal combustion engine |
JP2005129886A (en) * | 2003-10-03 | 2005-05-19 | Fuji Electric Holdings Co Ltd | Semiconductor device and its manufacturing method |
-
1994
- 1994-04-13 JP JP10079294A patent/JPH07283247A/en active Pending
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2000269415A (en) * | 1999-03-18 | 2000-09-29 | Hitachi Ltd | Resin-sealed type electronic device for internal combustion engine |
JP2005129886A (en) * | 2003-10-03 | 2005-05-19 | Fuji Electric Holdings Co Ltd | Semiconductor device and its manufacturing method |
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