JPH07282405A - Digital transversal filter - Google Patents

Abstract

PURPOSE:To always suppress the power consumption to a minimum by varying the number of taps of a transversal filter conforming to an equalization charac teristic to be aimed at and suppressing a circuit scale, in a high speed digital transversal filter which is a parallel multiplication type and performs multi-step pipeline processing. CONSTITUTION:Partial product generating circuit 22, an adder circuit 23 and a flip flop 24 constitute one tap. This flip flop 24 is used as both a delay element between taps and a latch function for a pipeline. A logical product circuit 11 is a control means of the number of taps to be operated, and controls it with a 'select' signal. When 'select' signal is '1', all taps are operate, a transversal filter having 5 taps is realized. When 'select' signal is '0', taps in which coefficients h5, h4 are set such as the partial product generating circuits 22, 25, adder circuits 23, 26, flip flop circuits 34, 27 are not operated, and only remaining 3 taps are operated.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a transversal filter for waveform equalization used in a reproducing circuit of a magnetic disk device. In particular, the number of taps of the transversal filter is changed according to the change in the recording / reproducing characteristics on the inner and outer circumferences of the magnetic disk medium, which has a high calculation speed.
The present invention relates to a digital transversal filter having a variable tap length.

[0002]

2. Description of the Related Art Conventionally, a high-speed digital transversal filter used for a reproducing circuit of a magnetic disk device is described in, for example, Digital Signal Processing Handbook pp243-245 (published by Ohmsha in 1993) edited by The Institute of Electronics, Information and Communication Engineers. There was a configuration in which a partial product generation circuit using the Booth algorithm and a partial product addition circuit using the Wallace tree method were combined to perform parallel multiplication to form a transversal filter. A block diagram of a transversal filter having this configuration is shown in FIG. In this figure, each multiplier of the transversal filter (hereinafter referred to as a tap) is configured by an independent partial product generation circuit and partial product addition circuit, and the sum of each multiplication result is calculated by the addition circuit by the Wallace tree method. Has become.

Further, in order to reduce the circuit scale of the transversal filter shown in FIG. 2, the configuration shown in FIG. 3 is also used. In this configuration, the adder circuit for the partial products of the taps in FIG. 2 and the adder circuit for obtaining the sum of the multiplication results of the taps are combined as one adder circuit by the Wallace tree method.

Further, as another conventional example, Japanese Patent Application Laid-Open No. 61-1
There is a configuration disclosed in Japanese Patent Publication No. 07807. In this configuration, a transversal filter capable of high-speed operation is configured by using a multiplication circuit using a memory instead of the partial product generation circuit according to the Booth algorithm of FIG.

[0005]

Regarding the recording / reproducing characteristics of the magnetic disk medium, the deterioration of the high frequency characteristics is large at the innermost circumference of the disk, whereas the deterioration of the high frequency characteristics is small at the outermost circumference. A transversal filter that performs waveform equalization is mainly used to compensate for the deterioration of high frequency characteristics. Therefore, a transversal filter having a large number of taps is required in the innermost circumference where the deterioration of the high frequency characteristic is large, whereas a transversal filter having a small number of taps is required in the outermost circumference where the deterioration of the high frequency characteristic is small. Here, since this transversal filter is required to operate at a very high speed, it has a configuration in which parallel multiplication and pipeline processing are frequently used. Therefore,
A transversal filter circuit with a large number of taps and performing multi-stage pipeline processing must be used according to the characteristics of the innermost circumference.

On the other hand, in the magnetic disk device, the power consumption is extremely limited. Therefore, operating the transversal filter circuit having a large number of taps even in the outermost periphery is wasteful in terms of power consumption. Therefore, when performing data reproduction at the outermost periphery, a method of stopping the operation of some taps of the transversal filter to reduce power consumption can be considered. However, in the circuit having the configuration shown in FIG. 3, the adder circuit for obtaining the sum of partial products generated at each tap is not independent for each tap. Therefore, even if it is attempted to stop the operation of only some of the taps, all of the adder circuits 64 need to be operated, and the power consumption cannot be sufficiently reduced. In the configuration of FIG. 2, since the partial product adder circuit for each tap is independent, it is possible to stop the operation of only some taps to reduce power consumption, but this configuration has a large circuit scale. The problem remains.

An object of the present invention is to provide a high-speed transversal filter which is a parallel multiplication type and which performs multi-stage pipeline processing, while suppressing the circuit scale and reducing the number of taps of the transversal filter in accordance with the desired equalization characteristic. Instead, it is always about minimizing power consumption.

[0008]

In order to solve the above problems, in the present invention, the flip-flop used for delay between taps in FIG. 2 is used in the subsequent stage of the adder circuit for the partial product of each tap. Also serves as a flip-flop for pipeline processing. Then, a parallel multiplication type transversal filter having a large number of taps according to the characteristics of the innermost circumference is configured. Furthermore, a means for controlling the operation of some of the taps is provided so that all the taps are operated when the waveform equalization on the inner circumference side is performed, and some taps are performed when the waveform equalization on the outer circumference side is performed. To stop the power consumption.

[0009]

By arranging the flip-flop used for delay between taps in the subsequent stage of the adder circuit for the partial product of each tap, the flip-flop for delay between taps is replaced with the flip-flop for pipeline processing. The taps can be used in common, and each tap can be an independent circuit and the circuit scale can be suppressed. In addition, since the circuit of each tap is independent, it is possible to control the operation of only a part of the taps, and when performing equalization on the inner circumference side, all taps are operated and the waveform on the outer circumference side is operated. When equalization is performed, the operation of some taps can be stopped to reduce power consumption.

[0010]

DESCRIPTION OF THE PREFERRED EMBODIMENTS An embodiment of the transversal filter according to the present invention will be described below with reference to the drawings. FIG. 1 is a block diagram showing a transversal filter circuit having a maximum of 5 taps according to the present invention. In this figure, the input signal of the transversal filter is the reproduction signal of the magnetic disk device, which is converted into an analog / digital converter (ADC).
After being converted into a digital signal at 10, it is used as an input signal of the transversal filter. Further, in the configuration of FIG. 1, the normal parallel multiplication is performed without using the Booth algorithm for generating the partial product at each tap.

FIG. 4 is a timing chart showing the operation of the transversal filter shown in FIG. The operation of this transversal filter will be described below.

First, assuming data reproduction at the innermost circumference,
A case where all the two taps are operated will be described. In this case, the SELECT signal which is the tap length control signal is set to '1'. Then, the logical product 11 becomes through and all taps operate. Further, the output of the ADC 10 which is the input signal of the transversal filter is In. The subscript n indicates the time T, and a larger value indicates a newer time.

The output I8 of the ADC 10 at time 8 is FF12.
The value is taken into. The output of FF12 is ADC10
The output of the FF12 becomes I7 at the time when the ADC10 outputs I8 (see the timing chart of FIG. 4) because the output is delayed by 1T. In the partial product generation circuit 22, the output h5 of the FF17 which is a tap coefficient and the FF12 which is a multiplicand.
Output the partial product of. The obtained partial product is added by the adder circuit 23.
At, the total sum of partial products is obtained, and a value corresponding to h5 · I7 is output. However, at this point, the adding circuit 23
In order to reduce the circuit scale of (1), the signal is before the addition process with carry look ahead, and the number of signal lines is about twice the word length of the output data. In addition,
It is known that the adder circuit 23 is best in terms of circuit scale and operating speed when the Wallace tree method described in the above-mentioned digital signal processing handbook is used.

The outputs h5 and I7 of the adder circuit 23 are fetched by the FF24. Here, as in the previous case, since a delay of 1T occurs, FF2 when the output of the adder 23 is h5 · I7
The output of 4 becomes h5 · I6 (see the timing chart in FIG. 4).

In parallel with these processes, the partial product generation circuit 2
In 5, the tap coefficient h4 is multiplied by the output I7 of the FF12. The obtained partial products are input to the adder circuit 26 together with the output of the FF 24, and the total sum is obtained. Here, when the output of the partial product generation circuit 25 is h4 · I7, the output of the FF 24 is h5 · I6, and the value of the multiplicand In is shifted by one time. This is because the FF 24 causes a delay of 1T, that is, the FF 24 is the FF 4 in the configuration of FIG.
4 plays the role of a delay element. At the same time, as can be seen from the timing chart of FIG. 4, since processing of one tap may be performed within 1T from FF12 to FF24, the FF24 also serves as a flip-flop for pipeline processing. Adder circuit 26
Then, the sum of partial products h4 · I7 and h5 · I6, h4 · I7 + h5
-The value of I6 is output and taken into FF27. Since a delay of 1T is also generated in this FF, the output of the FF 27 at the same time is h4 · I6 + h5 · I5.

Thereafter, in the same manner, the partial product of each tap and the total sum of the multiplication results up to that point are added, and the processing of delaying 1T by the FF is repeated to perform the arithmetic processing of the transversal filter. The output of FF36 is the target filter output, h1 · I6 + h2 · I5 + h3 · I4 + h4 · I3
The value of + h5 · I2 is obtained, but since carry processing is not performed at this point, addition with carry is performed by the CLA 37 to obtain the final filter output.

Next, assuming the data reproduction at the outermost circumference, the operation of the taps for which the coefficients h4 and h5 are set is stopped and only the remaining three taps are operated. The tap coefficients h1, h2, h3 used at this time must be reset according to the actual recording / reproducing characteristics, and the values are different from the values h1, h2, h3 set at the innermost circumference.

First, in order to stop the operation of the tap for which the coefficients h4 and h5 are set, a tap length control signal is used.
Set the SELECT signal to "0". Then, the output of the logical product 11 is always "0" regardless of the output value of the ADC 10. Therefore, the outputs of FF24 and partial product generator 25 are always
The output of FF27 is always "0" regardless of the values of the coefficients h5 and h4 set in FF17 and FF18.
Becomes By the way, a digital transversal circuit that requires high speed and low power consumption is usually a CM.
It is composed of an OS circuit. The power consumption of the CMOS circuit is almost proportional to the frequency of the output signal of each circuit. Here, the partial product generation circuits 22 and 25, the addition circuits 23 and 26,
Since the outputs of the FFs 24 and 27 are always "0", these circuits consume little power. Therefore, in this state, power is consumed only by the circuits corresponding to the remaining 3 taps, so that the power consumption can be suppressed to the necessary minimum.

Even if the coefficients h5 and h4 set in the FFs 17 and 18 are set to "0" without using the logical product 11 shown in FIG. 1, the same effect can be obtained. The transversal filter at this time is shown in FIG. In this case, the output I of FF12
Although 7 is directly input to the partial product generation circuits 22 and 25, since the multipliers h5 and h4 are "0", the output partial product value is always "0" regardless of the output value of the ADC 10.
Is. Therefore, also in this case, the partial product generation circuits 22 and 2
5, the adder circuits 23 and 26, and the FFs 24 and 27 consume almost no power.

In the above description, the case where the 5-tap transversal filter is operated as a 3-tap transversal filter has been taken as an example. However, by using a plurality of logical products 11 for selecting the number of taps, n-tap Can be set to an arbitrary number of taps as an m-tap transversal filter (m and n are integers and m <n). Similarly, by setting m tap coefficients of the n-tap transversal filter to “0”, it is possible to operate as a (n−m) -tap transversal filter.

By the way, in a transversal filter used for a magnetic disk or the like, the values of all digits of the filter output are not necessarily required, and only the upper x digits may be output. Therefore, a method of rounding the multiplication result at the time of multiplication at each tap to reduce the circuit scale of the filter can be considered. An example of multiplication including such rounding processing is shown in FIG. In this figure, an example is shown in which multiplication between fixed numbers of 5 bits is performed by normal parallel multiplication.

In FIG. 5, since the multiplier is 5 bits, 5 partial products are generated. Also, "*" in the figure is an extension code bit, and its value is determined from the sign relation between the multiplier and the multiplicand.
The multiplication result, which is the sum of these partial products, is stored in the upper 7 digits (S3
Consider the case where rounding processing is performed. in this case,
When calculating the sum of partial products, the upper 8th digit (digit of S2) is rounded to 0 by a binary operation. Therefore, add "1" to this digit, Find the sum of. The lower three digits (S2, S1, S0) of the obtained result are cut off and used as the multiplication result. Such a rounding process is
The addition circuit using the llace tree method can be easily realized, and the increase in the circuit scale of the addition circuit is small. Therefore, the addition processing of partial products including the rounding processing shown in FIG.
Since the output data word length from the adder circuit is reduced by applying the adder circuits 23, 26, 29, 32 and 35 shown in FIG. 1, the FFs 24, 27, 30, 33 and 36 and the adder circuits 26, 29 and 32 are used. , 35 can be reduced. When the rounding process is performed on such a multiplication result, the calculation accuracy of the filter output becomes a problem, but the rounding process is performed with a digit sufficiently low with respect to the calculation accuracy required for the transversal filter. You can set it as follows.

Although the case of normal parallel multiplication has been described so far, if the Wallace tree method is used for the addition unit of partial products even in the case of a multiplier configuration using another multiplication algorithm such as Booth's algorithm. For example, the present invention can be applied similarly to the above description.

Next, considering the case where the transversal filter according to the present invention is applied to a magnetic disk, an embodiment in which the number of taps of the transversal filter is controlled according to the position of the recording medium for reproducing data will be described. FIG. 7 is a block diagram showing a magnetic disk device including a transversal filter according to the present invention. In this figure, the magnetic disk device is roughly divided into a disk drive 101, which is a mechanical component, and an electronic circuit section 102. The electronic circuit unit 102 is roughly composed of four blocks, and includes a signal processing unit 103 that performs recording / reproducing processing, a servo control unit 104 that controls positioning of the magnetic head, a disk device and a PC.
An interface unit 106 for transmitting / receiving data to / from a host computer such as / WS, and a microprocessor unit 105 for controlling the entire electronic circuit unit. Among them, the transversal filter according to the present invention is included in the signal processing unit 103.

First, it is assumed that a request for reproducing data recorded on the inner circumference side of the recording medium is sent from the host computer to the interface section 106. This instruction is interpreted by the microprocessor unit 105, and the position on the recording medium for reproducing the data is obtained. The microprocessor 105 issues a command to the servo control unit 104 to move the magnetic head to a target position, and at the same time controls to increase (maximize) the number of taps of the transversal filter included in the signal processing unit. . This control for increasing the number of taps of the transversal filter is shown in FIG.
In this case, the select signal is set to "1", and the number of taps does not change if it is already set. At the same time, for each tap of the transversal filter,
Set an appropriate coefficient corresponding to the position for data reproduction. A method of changing the coefficient set in the transversal filter according to the position of the reproducing head is described in Japanese Patent Application No. 4-190917. However, it should be noted that in the case of the present invention, the number of coefficients to be set differs depending on the position of the head. And
After switching the signal processing unit 103 to the data reproduction mode,
Performs actual data playback.

Next, consider the case where the data recorded on the outer peripheral side of the recording medium is reproduced. In this case as well, the basic processing procedure is the same as in the case of reproduction on the inner circumference side described above. However, in order to stop the operation of a part of the taps of the transversal filter on the outer peripheral side, control is performed so that the number of taps operated by the microprocessor 105 for the transversal filter is reduced according to the target position information. This corresponds to setting the select signal = “0” in FIG.

Further, the same applies to the case where the number of taps of the transversal filter is controlled more finely depending on the position of the head for data reproduction, and the microprocessor provided in the magnetic disk device operates according to the position of the recording medium for data reproduction. , It suffices to control the number of taps that the transversal filter actually operates.

By the way, in recent years, in order to increase the storage capacity of a magnetic disk device or the like, the recording frequency is changed on the inner and outer peripheral sides of the recording medium so that the linear recording density is always constant.
DR (Constant Density Recording) technology has become popular. In this case, the operating frequency of the transversal filter on the reproducing side needs to be changed according to each recording frequency, but since the linear recording density is constant, the deterioration of high frequency characteristics when the recording frequency is taken as a reference is It is almost constant regardless of the position of the recording medium. Therefore, as described above, there is no need to change the number of taps of the transversal filter depending on the position of the recording medium on which data is reproduced. On the other hand, however, when the CDR technique is used, the recording frequency becomes higher toward the outer peripheral side of the recording medium, resulting in a wider signal band and a lower signal-to-noise ratio. The decrease in the signal-to-noise ratio is unfavorable because it causes a decrease in the reliability of reproduced data. Therefore, more accurate waveform equalization is required to compensate for the decrease in the signal-to-noise ratio on the outer peripheral side of the recording medium, and for that purpose, it is necessary to use a transversal filter with an increased number of taps.

[0029]

As is apparent from the above description, according to the present invention, the number of taps can be reduced according to the desired equalization characteristic while suppressing the circuit scale of the digital transversal filter used in the magnetic disk device or the like. Since it can be changed, the power consumption can always be minimized.

By rounding the multiplication result at each tap, the circuit scale of the transversal filter can be further reduced.

[Brief description of drawings]

FIG. 1 shows a transversal filter according to the present invention.

FIG. 2 is a diagram showing a conventional transversal filter.

FIG. 3 is a diagram showing a conventional transversal filter.

FIG. 4 is a timing chart showing the operation of the transversal filter according to the present invention.

FIG. 5 is a diagram showing an example of multiplication including rounding processing.

FIG. 6 is a diagram showing another embodiment of the transversal filter according to the present invention.

FIG. 7 is a diagram showing a magnetic disk device using a transversal filter according to the present invention.

[Explanation of symbols]

DESCRIPTION OF SYMBOLS 1 ... Transversal filter, 10 ... Analog-digital conversion circuit, 11 ... Logical product, 12, 17, 18, 1
9, 20, 21, 24, 27, 30, 33, 36, 38
... flip-flops, 22, 25, 28, 31, 34 ...
Partial product generation circuit, 23, 26, 29, 32, 35 ... Addition circuit, 37 ... Addition circuit with carry look ahead, 1
01 ... Disk drive section, 102 ... Electronic circuit section, 10
3 ... Signal processing unit, 104 ... Servo control unit, 105 ... Microprocessor, 106 ... Interface unit.

 ─────────────────────────────────────────────────── --- Continuation of the front page (72) Inventor Naoki Sato 2880 Kozu, Odawara-shi, Kanagawa Hitachi Ltd. Storage Systems Division (72) Inventor Masakazu Hoshino 5-22-1 Kamimizumotocho, Kodaira-shi, Tokyo Hitachi Microcomputer System (72) Inventor Terumi Takashi 2880 Kozu, Odawara-shi, Kanagawa Hitachi Storage Systems Division (72) Inventor Shoichi Miyazawa 1099 Ozenji, Aso-ku, Kawasaki-shi, Kanagawa Hitachi Systems Development Research Co., Ltd. In-house

Claims (5)

[Claims] 1. A data recording device equipped with a digital transversal filter and a microprocessor, wherein the digital transversal filter is an n-tap digital transversal filter equipped with n multipliers and corresponds to each tap. Flip-flops having a delay function between the multipliers and a latch function for pipeline processing are connected to the subsequent stage of the multipliers to stop the operation of only m multipliers and (n−m) multipliers. (N-
m) It can also function as a tap digital transversal filter, and the microprocessor controls the number of multipliers that actually operate in the digital transversal filter according to the position on the recording medium for reproducing data. And a data recording device. However,
n and m are integers, and m <n. 2. In an n-tap digital transversal filter having n multipliers, the multiplier function corresponding to each tap has a delay function between the multipliers and a latch function for pipeline processing. Flip-flop is connected, only m multipliers stop operation, (nm)
A digital transversal filter which can also function as an (n−m) tap digital transversal filter having a number of multipliers.
However, n and m are integers, and m <n. 3. An n-tap digital transversal filter having n multipliers, which has a delay function between the multipliers and a latch function for pipeline processing after a multiplier corresponding to each tap. A digital transversal filter having flip-flops connected thereto, rounding the output of each multiplier so that the output has a high-order k digits, and transmitting the result to the multiplier at the subsequent stage. 4. The digital transversal filter according to claim 2, wherein the output from each multiplier is rounded so that it has a high-order k digits, and the result is transmitted to the multiplier at the subsequent stage. A digital transversal filter characterized in that 5. In an n-tap digital transversal filter having n multipliers, the multiplier function corresponding to each tap has a delay function between the multipliers and a latch function for pipeline processing. A digital transversal filter having flip-flops connected thereto.