JPH0728052B2 - Semiconductor light emitting device and manufacturing method thereof - Google Patents

Semiconductor light emitting device and manufacturing method thereof

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Publication number
JPH0728052B2
JPH0728052B2 JP1494086A JP1494086A JPH0728052B2 JP H0728052 B2 JPH0728052 B2 JP H0728052B2 JP 1494086 A JP1494086 A JP 1494086A JP 1494086 A JP1494086 A JP 1494086A JP H0728052 B2 JPH0728052 B2 JP H0728052B2
Authority
JP
Japan
Prior art keywords
compound semiconductor
type
group
semiconductor layer
layer
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
JP1494086A
Other languages
Japanese (ja)
Other versions
JPS62172766A (en
Inventor
正季 岡島
勝 河内
奎治郎 平原
達郎 別府
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Toshiba Corp
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Publication date
Application filed by Toshiba Corp filed Critical Toshiba Corp
Priority to JP1494086A priority Critical patent/JPH0728052B2/en
Publication of JPS62172766A publication Critical patent/JPS62172766A/en
Publication of JPH0728052B2 publication Critical patent/JPH0728052B2/en
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

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Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/36Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the electrodes
    • H01L33/40Materials therefor
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/005Processes
    • H01L33/0083Processes for devices with an active region comprising only II-VI compounds
    • H01L33/0087Processes for devices with an active region comprising only II-VI compounds with a substrate not being a II-VI compound
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/02Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies
    • H01L33/26Materials of the light emitting region
    • H01L33/28Materials of the light emitting region containing only elements of group II and group VI of the periodic system

Description

【発明の詳細な説明】 〔発明の技術分野〕 本発明は、II−VI族化合物半導体を用いた発光素子とそ
の製造方法に関する。
TECHNICAL FIELD OF THE INVENTION The present invention relates to a light emitting device using a II-VI group compound semiconductor and a method for manufacturing the same.

〔発明の技術的背景とその問題点〕[Technical background of the invention and its problems]

III−V族化合物半導体を用いた赤色から緑色までの発
光素子は量産化の時代に入り、表示素子として広く実用
されている。この様な状況下で、可視域で欠けている唯
一の発光色である青色発光素子に対する期待が一層高ま
っている。にも拘らず、これまでのIII−V族化合物半
導体発光素子と比肩し得る青色発光素子の製造技術は未
だ確立されていない。
Red to green light emitting devices using III-V compound semiconductors have entered the age of mass production and are widely used as display devices. Under such circumstances, expectations for a blue light emitting element, which is the only light emitting color lacking in the visible region, are increasing. Nevertheless, a manufacturing technique of a blue light emitting device comparable to the conventional III-V compound semiconductor light emitting device has not yet been established.

青色発光素子を得るための第1の条件は、用いる半導体
の禁制帯幅Egが2.6eVを越えることである。この条件を
満たす半導体結晶としては、II−VI族化合物半導体であ
るZnS(Eg=3.5eV)、ZnSe(Eg=2.6eV)或いはこれら
の混晶がある。これらは直接遷移型であるため高い発光
効率が期待され、各所で精力的な研究が進められてい
る。これらのII−VI族化合物半導体単結晶は、有機金属
気相成長法(MOCVD法)や分子線エピタキシャル法(MBE
法)などにより、GaAsやGaPなどのIII−V族化合物半導
体基板上に得られている。これは、III−V族化合物半
導体では大型の単結晶基板の量産化技術が確立されてい
るが、II−VI族化合物半導体では未だ大型の単結晶基板
製造の技術が確立されていないためである。
The first condition for obtaining a blue light emitting device is that the forbidden band width Eg of the semiconductor used exceeds 2.6 eV. Semiconductor crystals that satisfy this condition include ZnS (Eg = 3.5 eV) and ZnSe (Eg = 2.6 eV) which are II-VI group compound semiconductors, or mixed crystals thereof. Since these are direct transition types, high luminous efficiency is expected, and vigorous research is being conducted in various places. These II-VI group compound semiconductor single crystals are produced by metal organic chemical vapor deposition (MOCVD) or molecular beam epitaxy (MBE).
Method) and the like on a III-V group compound semiconductor substrate such as GaAs or GaP. This is because the technology for mass-producing large single crystal substrates has been established for III-V compound semiconductors, but the technology for manufacturing large single crystal substrates has not yet been established for II-VI compound semiconductors. .

ところが、III−V族化合物半導体基板上にII−VI族化
合物半導体層を成長させた場合、結晶成長時に一方の半
導体の構成元素が他方の半導体に拡散する、いわゆる相
互拡散現象が生じ、これが良好な発光特性を得る上で障
害になっていた。即ち、II族元素であるZnはIII−V族
化合物半導体中での拡散定数が大きく、また浅いアクセ
プタ準位を形成して電気的に活性に働く。またGaAsやGa
PなどのIII−V族化合物半導体のIII族構成元素であるG
aは、II−VI族化合物半導体中でドナーとして働き、V
族元素であるAsやPはアクセプタとして働く。このため
に、III−V族化合物半導体とII−VI族化合物半導体の
界面付近に伝導型の反転や高抵抗層を生じるのである。
However, when a II-VI group compound semiconductor layer is grown on a III-V group compound semiconductor substrate, a so-called mutual diffusion phenomenon occurs in which a constituent element of one semiconductor diffuses into the other semiconductor during crystal growth, which is favorable. This was an obstacle to obtaining excellent light emission characteristics. That is, Zn, which is a group II element, has a large diffusion constant in a III-V group compound semiconductor, and forms a shallow acceptor level to act electrically. Also GaAs and Ga
G which is a group III constituent element of III-V group compound semiconductors such as P
a acts as a donor in the II-VI group compound semiconductor, and V
Group elements As and P function as acceptors. Therefore, conduction type inversion and a high resistance layer are generated near the interface between the III-V group compound semiconductor and the II-VI group compound semiconductor.

以上のことをより具体的に第5図を参照して説明する。
第5図は、n型GaAs基板51に、MOCVD法によりn型ZnSe
層52,p型ZnSe層53を順次成長形成した発光素子を示して
いる。55はn側電極、55はp側電極である。この様な従
来法による発光素子では、n型GaAs基板51のn型ZnSe層
52との界面部にp型反転層56が形成される。これは、結
晶成長時に高温の条件下で構成元素の相互拡散が生じる
が、特にZnはGaAs中で拡散定数が大きく、且つ浅いアク
セプタ準位を形成するためである。即ち、GaAs基板51に
拡散したZnの濃度がn型GaAs基板51中でドナー不純物と
なるSeおよび予め存在したドナー不純物濃度の総和を上
回ることにより、p型反転層56が形成されることにな
る。
The above will be described more specifically with reference to FIG.
FIG. 5 shows an n-type GaAs substrate 51 on which n-type ZnSe is formed by MOCVD.
A light emitting device in which a layer 52 and a p-type ZnSe layer 53 are sequentially grown is shown. 55 is an n-side electrode and 55 is a p-side electrode. In such a conventional light emitting device, the n-type ZnSe layer of the n-type GaAs substrate 51 is used.
A p-type inversion layer 56 is formed at the interface with 52. This is because mutual diffusion of constituent elements occurs under high temperature conditions during crystal growth, and Zn has a large diffusion constant in GaAs and forms a shallow acceptor level. That is, when the concentration of Zn diffused in the GaAs substrate 51 exceeds the sum of the concentration of Se serving as a donor impurity in the n-type GaAs substrate 51 and the concentration of donor impurities existing in advance, the p-type inversion layer 56 is formed. .

このようにp型反転層56が形成されると、この発光素子
はpnpn積層構造となる。従ってp側電極55が正、n側電
極54が負となるようなバイアスを印加しても、n型ZnSe
層52とp型反転層56間が逆バイアスになるため、発光部
となるp型ZnSe層53とn型ZnSe層52の接合部に十分な電
流を流すことができないのである。
When the p-type inversion layer 56 is formed in this manner, this light emitting element has a pnpn laminated structure. Therefore, even if a bias is applied such that the p-side electrode 55 is positive and the n-side electrode 54 is negative, the n-type ZnSe is
Since a reverse bias is applied between the layer 52 and the p-type inversion layer 56, a sufficient current cannot flow in the junction between the p-type ZnSe layer 53 and the n-type ZnSe layer 52, which is the light emitting portion.

〔発明の目的〕[Object of the Invention]

本発明は上記した点に鑑みなされたもので、III−V族
化合物半導体とII−VI族化合物半導体の界面において反
転層や高抵抗層の発生がなく、従って良好な電流−電圧
特性が得られ、高い発光効率が得られるようにした半導
体発光素子およびその製造方法を提供することを目的と
する。
The present invention has been made in view of the above points, and an inversion layer and a high resistance layer are not generated at the interface between the III-V group compound semiconductor and the II-VI group compound semiconductor, and therefore good current-voltage characteristics can be obtained. An object of the present invention is to provide a semiconductor light emitting device capable of obtaining high luminous efficiency and a method for manufacturing the same.

〔発明の概要〕[Outline of Invention]

本発明にかかる発光素子は、p型のIII−V族化合物半
導体基板上に直接、またはp型のIII−V族化合物半導
体層を介してp型のII−VI族化合物半導体層およびn型
のII−VI族化合物半導体層が順次積層形成されて構成さ
れていることを特徴とする。
A light emitting device according to the present invention is provided with a p-type II-VI compound semiconductor layer and an n-type III-V compound semiconductor layer directly on a p-type III-V compound semiconductor substrate or via a p-type III-V compound semiconductor layer. It is characterized in that the II-VI group compound semiconductor layers are sequentially laminated and formed.

本発明はまた、p型のIII−V族化合物半導体基板上に
直接、またはp型のIII−V族化合物半導体層を介して
p型のII−VI族化合物半導体層を成長形成し、続いてこ
の上にn型のII−VI族化合物半導体層を成長形成して発
光素子を製造することを特徴とする。
The present invention also grows and forms a p-type II-VI group compound semiconductor layer directly on a p-type III-V group compound semiconductor substrate or through a p-type III-V group compound semiconductor layer. An n-type II-VI group compound semiconductor layer is grown and formed on this to manufacture a light emitting device.

〔発明の効果〕〔The invention's effect〕

本発明によれば、III−V族化合物半導体とII−VI族化
合物半導体の間で構成元素の相互拡散が生じたとして
も、この接合部の両側は共にp型であって、II−VI族化
合物半導体層のII族構成元素はIII−V族化合物半導体
層内でアクセプタとなり、III−V族化合物半導体のV
族構成元素はII−VI族化合物半導体層内でアクセプタと
なるために、この界面部で伝導型の反転層や高抵抗層が
形成されることはない。またp型III−V族化合物半導
体基板のp型不純物として、この上に形成されるII−VI
族化合物半導体層のII族構成元素を用い、p型II−VI族
化合物半導体層のp型不純物としてIII−V族族化合物
半導体基板のV族構成元素を用いれば、成長時の構成元
素の相互拡散はより効果的に抑制される。従って良好な
電流−電圧特性が得られ、高い発光効率を有する発光素
子が得られる。
According to the present invention, even if mutual diffusion of the constituent elements occurs between the III-V group compound semiconductor and the II-VI group compound semiconductor, both sides of this junction are p-type and The group II constituent element of the compound semiconductor layer serves as an acceptor in the group III-V compound semiconductor layer, and is a V of the group III-V compound semiconductor.
Since the group-constituting element serves as an acceptor in the II-VI group compound semiconductor layer, a conduction type inversion layer or a high resistance layer is not formed at this interface. II-VI formed on the p-type III-V compound semiconductor substrate as p-type impurities
If the group II constituent element of the group compound semiconductor layer is used and the group V constituent element of the III-V group compound semiconductor substrate is used as the p-type impurity of the p-type II-VI compound semiconductor layer, the mutual composition of the constituent elements during growth can be improved. Diffusion is suppressed more effectively. Therefore, a favorable current-voltage characteristic can be obtained, and a light emitting element having high luminous efficiency can be obtained.

また本発明の方法によれば、大型結晶基板の量産技術が
確立されているGaAs,GaPなどのIII−V族化合物半導体
基板を用いて、無用な反転層や高抵抗層を形成すること
なくII−VI族化合物半導体によるpn接合を形成すること
ができ、ZnS,ZnSeなどのII−VI族化合物半導体を用いた
高効率の青色発光素子を量産することができる。
Further, according to the method of the present invention, a III-V group compound semiconductor substrate such as GaAs, GaP or the like, for which a mass production technique for a large crystal substrate is established, is used without forming an unnecessary inversion layer or a high resistance layer. It is possible to form a pn junction with a group-VI compound semiconductor, and mass-produce a highly efficient blue light-emitting device using a group II-VI compound semiconductor such as ZnS and ZnSe.

〔発明の実施例〕Example of Invention

以下本発明の実施例を説明する。 Examples of the present invention will be described below.

第1図は一実施例の青色発光素子を示す。図において、
11はp型GaAs基板であり、この上に厚さ5μmのp型Zn
Se層12、厚さ5μmのn型ZnSe層13が順次積層形成され
ている。GaAs基板11の主要なp型不純物は、ZnSeのII族
構成元素であるZnであり、その濃度は例えば1×1018/c
m3である。p型ZnSe層12の主要なp型不順物は、GaAsの
V族構成元素であるAsであり、またn型ZnSe層13の主要
なn型不純物はAlである。GaAs基板11の裏面にはp側電
極としてAuZn電極14が形成され、n型ZnSe層13の表面に
はn側電極としてInGa電極15が形成されている。
FIG. 1 shows a blue light emitting device of one embodiment. In the figure,
11 is a p-type GaAs substrate, on which a 5 μm thick p-type Zn substrate is formed.
An Se layer 12 and an n-type ZnSe layer 13 having a thickness of 5 μm are sequentially laminated. The main p-type impurity of the GaAs substrate 11 is Zn, which is a Group II constituent element of ZnSe, and its concentration is, for example, 1 × 10 18 / c.
m is 3. The main p-type disordered material of the p-type ZnSe layer 12 is As which is a group V constituent element of GaAs, and the main n-type impurity of the n-type ZnSe layer 13 is Al. An AuZn electrode 14 is formed as a p-side electrode on the back surface of the GaAs substrate 11, and an InGa electrode 15 is formed as an n-side electrode on the surface of the n-type ZnSe layer 13.

第2図(a)〜(c)はこの発光素子の製造工程を示
す。Znドープのp型GaAs基板11に、MOCVD法により先ず
p型ZnSe層12を成長させる。原料ガスにはジメチル亜鉛
(DMZn)およびジメチル・セレン(DMSe)を用い、p型
不純物原料としてアルシン(AsH3)を用いる。結晶成長
条件は、II族原料のモル供給量[DMZn]と、VI族原料の
モル供給量 [DMSe]の比を、 [DMSe]/[DMZn]=2 とし、500℃,1気圧の条件下で行う。成長速度は約500Å
/minであり、この様な条件で厚さ5μmのp型ZnSe層12
を形成する(a)。次に不純物原料を変えて、他は同様
の条件で厚さ5μmのn型ZnSe層13を成長させる
(b)。n型不純物原料としては、トリエチルアルミニ
ウム(TEAl)を用いる。最後にGaAs基板11裏面にAuZn電
極14を形成し、n型ZnSe層13の表面にInGa電極15を形成
して、発光素子を完成する(c)。
2 (a) to (c) show the manufacturing process of this light emitting device. First, the p-type ZnSe layer 12 is grown on the Zn-doped p-type GaAs substrate 11 by the MOCVD method. Dimethyl zinc (DMZn) and dimethyl selenium (DMSe) are used as source gases, and arsine (AsH 3 ) is used as a p-type impurity source. The crystal growth conditions are as follows: [DMSe] / [DMZn] = 2, the ratio of the molar supply amount [DMZn] of the Group II raw material to the molar supply amount [DMSe] of the Group VI raw material at 500 ° C. and 1 atm. Done in. Growth rate is about 500Å
/ min, and the p-type ZnSe layer 12 having a thickness of 5 μm under these conditions
Are formed (a). Next, the impurity raw material is changed, and the n-type ZnSe layer 13 having a thickness of 5 μm is grown under the same conditions as above (b). Triethylaluminum (TEAl) is used as the n-type impurity raw material. Finally, the AuZn electrode 14 is formed on the back surface of the GaAs substrate 11, and the InGa electrode 15 is formed on the surface of the n-type ZnSe layer 13 to complete the light emitting device (c).

この様にして得られた発光素子は、pn接合の正常な電流
−電圧特性を示し、GaAs基板とZnSe層との界面部に反転
層等が生じていないことが確認された。またこの発光素
子は、良好な青色発光を示した。
It was confirmed that the light emitting device thus obtained showed a normal pn junction current-voltage characteristic, and that an inversion layer or the like did not occur at the interface between the GaAs substrate and the ZnSe layer. Further, this light emitting device exhibited good blue light emission.

第3図は別の実施例の発光素子である。この実施例で
は、p型GaAs基板31上にバッファ層としてp型GaAs層32
を成長させ、この上にp型ZnSe層33、n型ZnSe層34を順
次成長させている。35はAuZn電極、36はInGa電極であ
る。
FIG. 3 shows a light emitting device of another embodiment. In this embodiment, the p-type GaAs layer 32 is used as a buffer layer on the p-type GaAs substrate 31.
Is grown, and a p-type ZnSe layer 33 and an n-type ZnSe layer 34 are sequentially grown on this. Reference numeral 35 is an AuZn electrode and 36 is an InGa electrode.

バッファ層としてのGaAs層32は、原料ガスとしてトリメ
チル・ガリウム(TMG)およびアルシン(AsH3)を用
い、p型不純物原料としてジメチル亜鉛(DMZn)を用い
たMOCVD法により成長させる。成長条件は、700℃,1気圧
の条件下で、III族原料のモル供給量 [TMG]とV族原料のモル供給量[AsH3]比を、 [AsH3]/[TMG]=20 となるように保つ。p型ZnSe層33およびn型ZnSe層34の
成長法は先の実施例と同様である。
The GaAs layer 32 as a buffer layer is grown by the MOCVD method using trimethyl gallium (TMG) and arsine (AsH 3 ) as source gases and dimethylzinc (DMZn) as a p-type impurity source. The growth conditions were 700 ° C. and 1 atm, and the molar supply amount [TMG] of the group III raw material and the molar supply amount [AsH 3 ] of the group V raw material were [AsH 3 ] / [TMG] = 20. Keep it. The growth method of the p-type ZnSe layer 33 and the n-type ZnSe layer 34 is the same as in the previous embodiment.

この実施例によっても先の実施例と同様に優れた発光特
性を示す素子が得られた。
Also in this example, an element having excellent light emitting characteristics was obtained as in the previous example.

以上では、II−VI族化合物半導体としてZnSeを用いた
が、同じく広い禁制帯幅を持つZnSを用いることもでき
る。特にこれらの混晶であるZnSxSe1-xを用いれば、そ
の組成比を異ならせて素子内部に適当なヘテロ接合を形
成して、より発光効率の高い素子を得ることができる。
Although ZnSe is used as the II-VI group compound semiconductor in the above, ZnS having a similarly wide band gap can also be used. In particular, if ZnSxSe 1- x, which is a mixed crystal of these, is used, it is possible to form a suitable heterojunction inside the device by varying the composition ratio thereof and obtain a device with higher luminous efficiency.

第4図はその様な実施例の発光素子を示す。この実施例
では、p型GaAs基板41に厚さ5μmのp型ZnS0.1Se0.9
層42、厚さ1μmのp型ZnSe層43、厚さ5μmのn型Zn
S0.1Se0.9層44が順次積層形成されている。結晶成長は
先の実施例と同様の条件のMOCVD法より行われる。その
際、Sの原料にはジエチル・イオウ(DES)が用いられ
る。p型電極,n側電極としてそれぞれAuZn電極45,InGa
電極46が形成されている。
FIG. 4 shows a light emitting device of such an embodiment. In this embodiment, a 5 μm thick p-type ZnS 0.1 Se 0.9 layer is formed on the p-type GaAs substrate 41.
Layer 42, 1 μm thick p-type ZnSe layer 43, 5 μm thick n-type ZnSe
An S 0.1 Se 0.9 layer 44 is sequentially formed. Crystal growth is performed by the MOCVD method under the same conditions as in the previous embodiment. At that time, diethyl sulfur (DES) is used as a raw material of S. AuZn electrode 45 and InGa as p-type electrode and n-side electrode, respectively
The electrode 46 is formed.

この素子構造において、p型ZnSe層43の禁制帯幅は2.7e
Vであり、これを挟むZnSSe層42,44の禁制帯幅は2.8eVで
ある。従って両者の禁制帯幅の差により生じるポテンシ
ャル障壁によってp型ZnSe層43には電子および正孔が有
効に閉じこめられ、効率のよい放射性再結合が生じる。
このためこの発光素子は良好な電流−電圧特性と、高効
率の青色発光を示す。n型層部分を同様にZnSとZnSSeと
の積層構造とすることも有効である。
In this device structure, the band gap of the p-type ZnSe layer 43 is 2.7e.
V, and the forbidden band width of the ZnSSe layers 42 and 44 sandwiching this is 2.8 eV. Therefore, electrons and holes are effectively confined in the p-type ZnSe layer 43 by the potential barrier caused by the difference in the forbidden band width between them, and efficient radiative recombination occurs.
Therefore, this light emitting device exhibits favorable current-voltage characteristics and highly efficient blue light emission. It is also effective to make the n-type layer portion similarly have a laminated structure of ZnS and ZnSSe.

本発明は上記各実施例に限られるものではない。例え
ば、II−VI族化合物半導体層として上記実施例で挙げた
ZnSxSe1-x系の他に、ZnTe,CdS,CdSe,HgTe等或いはこれ
らの混晶系を用いることができる。またIII−V族化合
物半導体基板としてGaAsの他に、GaP,InPなどを用いる
ことができる。II−VI族化合物半導体層の成長法として
も、MOCVD法に限らず、他の気相成長法やMBE法或いは液
相成長法を利用することが可能である。
The present invention is not limited to the above embodiments. For example, as the II-VI group compound semiconductor layer, it is mentioned in the above-mentioned embodiment.
In addition to the ZnSxSe 1- x system, ZnTe, CdS, CdSe, HgTe, etc., or a mixed crystal system thereof can be used. In addition to GaAs, GaP, InP or the like can be used as the III-V compound semiconductor substrate. The growth method of the II-VI group compound semiconductor layer is not limited to the MOCVD method, and other vapor phase growth method, MBE method, or liquid phase growth method can be used.

その他、本発明はその趣旨を逸脱しない範囲で種々変形
して実施することができる。
Besides, the present invention can be variously modified and implemented without departing from the spirit thereof.

【図面の簡単な説明】[Brief description of drawings]

第1図は本発明の一実施例の発光素子を示す図、第2図
(a)〜(c)はその製造工程を説明するための図、第
3図および第4図は他の実施例の発光素子を示す図、第
5図は従来の発光素子を示す図である。 11,31,41……p型GaAs基板、32……p型GaAs層、12,33,
43……p型ZnSe層、13,34,……n型ZnSe層、42……p型
ZnSSe層、44……n型ZnSSe層、14,35,45……AuZn電極、
15,36,46……InGa電極。
FIG. 1 is a diagram showing a light emitting device of one embodiment of the present invention, FIGS. 2 (a) to 2 (c) are diagrams for explaining the manufacturing process thereof, and FIGS. 3 and 4 are other embodiments. And FIG. 5 is a view showing a conventional light emitting element. 11,31,41 …… p-type GaAs substrate, 32 …… p-type GaAs layer, 12,33,
43 ... p-type ZnSe layer, 13,34, ... n-type ZnSe layer, 42 ... p-type
ZnSSe layer, 44 ... n-type ZnSSe layer, 14,35,45 ... AuZn electrode,
15,36,46 …… InGa electrode.

Claims (11)

【特許請求の範囲】[Claims] 【請求項1】p型のIII−V族化合物半導体基板上に直
接、またはp型のIII−V族化合物半導体層を介して、
p型のII−VI族化合物半導体層およびn型のII−VI族化
合物半導体層が順次積層されて構成されていることを特
徴とする半導体発光素子。
1. A p-type III-V group compound semiconductor substrate, either directly or through a p-type III-V group compound semiconductor layer,
1. A semiconductor light emitting device comprising a p-type II-VI group compound semiconductor layer and an n-type II-VI group compound semiconductor layer, which are sequentially stacked.
【請求項2】前記p型のIII−V族化合物半導体基板ま
たはその上のp型のIII−V族化合物半導体層の主要な
アクセプタ不純物は、これに接する前記p型のII−VI族
化合物半導体層のII族元素である特許請求の範囲第1項
記載の半導体発光素子。
2. A main acceptor impurity of the p-type III-V group compound semiconductor substrate or the p-type III-V group compound semiconductor layer on the p-type III-V compound semiconductor substrate is in contact with the p-type II-VI group compound semiconductor. The semiconductor light emitting device according to claim 1, wherein the layer is a Group II element.
【請求項3】前記p型のII−VI族化合物半導体層の主要
なアクセプタ不純物は、これに接する前記p型のIII−
V族化合物半導体基板またはこの上のIII−V族化合物
半導体層のV族元素である特許請求の範囲第1項記載の
半導体発光素子。
3. A main acceptor impurity of the p-type II-VI group compound semiconductor layer is the p-type III-type compound which is in contact with the main acceptor impurity.
The semiconductor light emitting device according to claim 1, which is a group V element of a group V compound semiconductor substrate or a group III-V compound semiconductor layer formed thereon.
【請求項4】前記p型のIII−V族化合物半導体基板ま
たはこの上のp型のIII−V族化合物半導体層がGaAsで
あり、前記p型のII−VI族化合物半導体層およびn型の
II−VI族化合物半導体層がZnSxSe1-x(0≦x≦1)で
ある特許請求の範囲第1項記載の半導体発光素子。
4. The p-type III-V compound semiconductor substrate or the p-type III-V compound semiconductor layer thereon is GaAs, and the p-type II-VI compound semiconductor layer and the n-type compound semiconductor layer.
The semiconductor light emitting device according to claim 1 , wherein the II-VI group compound semiconductor layer is ZnSxSe 1- x (0 ≦ x ≦ 1).
【請求項5】前記p型のII−VI族化合物半導体層はZnSS
e層とZnSe層の積層構造からなり、前記n型のII−VI族
化合物半導体層がZnSSeからなる特許請求の範囲第1項
記載の半導体発光素子。
5. The p-type II-VI group compound semiconductor layer is ZnSS.
The semiconductor light emitting device according to claim 1, which has a laminated structure of an e layer and a ZnSe layer, and wherein the n-type II-VI group compound semiconductor layer is ZnSSe.
【請求項6】p型のIII−V族化合物半導体基板に直
接、またはp型のIII−V族化合物半導体層を成長形成
した後、p型のII−VI族化合物半導体層およびn型のII
−VI族化合物半導体層を順次成長形成することを特徴と
する半導体発光素子の製造方法。
6. A p-type II-VI group compound semiconductor layer and an n-type II group II-VI compound semiconductor layer directly or after growing a p-type III-V group compound semiconductor layer on a p-type III-V group compound semiconductor substrate.
A method for manufacturing a semiconductor light emitting device, which comprises sequentially forming a group VI compound semiconductor layer.
【請求項7】前記p型のIII−V族化合物半導体基板ま
たはその上のp型のIII−V族化合物半導体層の主要な
アクセプタ不純物は、これに接する前記p型のII−VI族
化合物半導体層のII族元素である特許請求の範囲第6項
記載の半導体発光素子の製造方法。
7. The main acceptor impurity of the p-type III-V group compound semiconductor substrate or the p-type III-V group compound semiconductor layer thereon is the p-type II-VI group compound semiconductor in contact therewith. The method for manufacturing a semiconductor light emitting device according to claim 6, wherein the layer is a Group II element.
【請求項8】前記p型のII−VI族化合物半導体層の主要
なアクセプタ不純物は、これに接する前記p型のIII−
V族化合物半導体基板またはこの上のIII−V族化合物
半導体層のV族元素である特許請求の範囲第6項記載の
半導体発光素子の製造方法。
8. The main acceptor impurity of the p-type II-VI group compound semiconductor layer is the p-type III-type compound which is in contact with the main acceptor impurity.
7. The method for producing a semiconductor light emitting device according to claim 6, wherein the compound is a V group compound semiconductor substrate or a V group element of a III-V group compound semiconductor layer thereon.
【請求項9】前記p型のIII−V族化合物半導体基板ま
たはこの上のp型のIII−V族化合物半導体層がGaAsで
あり、前記p型のII−VI族化合物半導体層およびn型の
II−VI族化合物半導体層がZnSxSe1-x(0≦x≦1)で
ある特許請求の範囲第6項記載の半導体発光素子の製造
方法。
9. The p-type III-V compound semiconductor substrate or the p-type III-V compound semiconductor layer thereon is GaAs, and the p-type II-VI compound semiconductor layer and the n-type
The method for producing a semiconductor light emitting device according to claim 6, wherein the II-VI group compound semiconductor layer is ZnSxSe 1- x (0 ≦ x ≦ 1).
【請求項10】前記p型のII−VI族化合物半導体層はZn
SSe層からなり、前記n型のII−VI族化合物半導体層がZ
nSeとZnSSeとの積層構造からなる特許請求の範囲第6項
記載の半導体発光素子の製造方法。
10. The p-type II-VI group compound semiconductor layer is Zn.
The n-type II-VI group compound semiconductor layer is Z
7. The method for manufacturing a semiconductor light emitting device according to claim 6, which has a laminated structure of nSe and ZnSSe.
【請求項11】前記p型のII−VI族化合物半導体層およ
びn型のII−VI族化合物半導体層をMOCVD法により成長
形成する特許請求の範囲第6項記載の半導体発光素子の
製造方法。
11. The method for producing a semiconductor light emitting device according to claim 6, wherein the p-type II-VI group compound semiconductor layer and the n-type II-VI group compound semiconductor layer are grown and formed by a MOCVD method.
JP1494086A 1986-01-27 1986-01-27 Semiconductor light emitting device and manufacturing method thereof Expired - Lifetime JPH0728052B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP1494086A JPH0728052B2 (en) 1986-01-27 1986-01-27 Semiconductor light emitting device and manufacturing method thereof

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP1494086A JPH0728052B2 (en) 1986-01-27 1986-01-27 Semiconductor light emitting device and manufacturing method thereof

Publications (2)

Publication Number Publication Date
JPS62172766A JPS62172766A (en) 1987-07-29
JPH0728052B2 true JPH0728052B2 (en) 1995-03-29

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Country Link
JP (1) JPH0728052B2 (en)

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* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6482575A (en) * 1987-09-25 1989-03-28 Inkiyubeetaa Japan Kk Blue-light emitting element and manufacture thereof
JP2656276B2 (en) * 1988-01-22 1997-09-24 株式会社東芝 Semiconductor light emitting device
US5248631A (en) * 1990-08-24 1993-09-28 Minnesota Mining And Manufacturing Company Doping of iib-via semiconductors during molecular beam epitaxy using neutral free radicals
KR100247682B1 (en) * 1991-05-15 2000-03-15 스프레이그 로버트 월터 Blue-green laser diode
US5213998A (en) * 1991-05-15 1993-05-25 Minnesota Mining And Manufacturing Company Method for making an ohmic contact for p-type group II-VI compound semiconductors

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