JPH07273598A - Variable attenuator - Google Patents

Abstract

PURPOSE:To adjust the interfacing automatically with respect to a device or a line connecting to an input terminal and an output terminal by controlling three transistors (TRs) in pi connection in the variable attenuation circuit based on stored variable voltage information. CONSTITUTION:When input output impedance information to be set respectively to an input terminal 1 and an output terminal 2 and input information of attenuation information with respect to the input of an output are received from an input section 6, a control section 9 reads corresponding voltage variable information from a storage section 8 to provide an output of the information to a variable voltage section 7. Then the voltage section 7 controls independently three MOS TRs 3 to 5 in pi connection in the attenuation circuit so as to adjust the interfacing of a device or a line connecting to the input terminal 1 and the output terminal 2 based on the input information such as input impedance information, output impedance information and attenuation information or the like automatically.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a variable attenuator, and more particularly to a variable attenuator using a field effect transistor.

[0002]

2. Description of the Related Art As an example of a conventional variable damping device of this type, the contents disclosed in Japanese Patent Laid-Open No. 1-208908 will be described.

FIG. 2 is a block diagram showing a conventional example disclosed in JP-A-1-208908.

In FIG. 2, in this conventional example, an input microwave line 10 having a characteristic impedance Z ₀ is used as an input matching circuit 201 and a transconductance gm is used.
Gate-grounded field effect transistor with ₁ (FE
T) 11 is connected to the source, the drain of the FET 11 is connected to the ground through the gain adjusting resistor 12 having the resistance value R ₁ , and is connected to the first gate of the source-grounded twin-gate FET 13. The twin gate FET 13 is
It has a mutual conductance gm ₂ controlled by the bias voltage V _C applied to the second gate from the variable voltage source 200 via the bias voltage application terminal 15. The second gate of the twin-gate FET 13 is connected to ground via the high frequency bypass capacitor 14. Here, the variable voltage source 200 outputs a variable bias voltage V _C.

The drain of the twin-gate FET 13 is connected to the ground via the gain adjusting resistor 16 having a resistance value R ₂ , and is used as the output matching circuit 203 and has a mutual conductance gm ₃ and a drain-grounded FE.
Connected to the gate of T17. Further, the source of the FET 17 is connected to the output microwave line section 18 having the characteristic impedance Z ₀ .

With the above configuration, the microwave signal input to the input microwave line 10 is impedance-converted by the FET 11 of the input matching circuit 201 and then input to the FET 13 of the variable attenuation circuit 202. The variable attenuator circuit 202 attenuates the input microwave signal with an attenuation amount corresponding to the bias voltage V _C input from the variable voltage source 200 to the second gate of the dual-gate FET 13 via the bias voltage input terminal 15. After letting
It outputs to the output microwave line 18 via FET17 which is the output matching circuit 203 which performs an impedance conversion process. Therefore, the bias voltage V
By changing _C , the attenuation amount of the microwave variable attenuator can be changed.

[0007]

This conventional variable attenuator has a variable voltage source 200 and outputs only one variable bias voltage V _C as shown in FIG. There is a problem in that adjustment is difficult because the characteristics of the attenuation amount, the input impedance, and the output impedance at three points are independently and simultaneously satisfied exactly by only the variable bias voltage V _C.

[0008]

A variable attenuator of the present invention includes an input terminal and an output terminal connected in a π shape.
An attenuation circuit having three MOS transistors, and variable voltage output means for supplying different variable voltages to the respective gate terminals of the three MOS transistors,
Input impedance information of a first device or a first line connected to the input terminal, output impedance information of a second device or a second line connected to the output terminal, and input to the input terminal A plurality of voltage variable information for outputting the variable voltage corresponding to each of a plurality of combinations of these three types of pieces of attenuation amount information that sets the attenuation amount of the output signal of the output terminal with respect to the signal is stored in advance. To output the variable voltage information corresponding to the three types of input information, the input impedance information, the output impedance information, and the attenuation amount information, which are input from the outside, to output the variable voltage corresponding to the input information. And a variable voltage control means for controlling the variable voltage output means.

The variable attenuator of the present invention comprises a first MOS transistor having a source terminal grounded and a drain terminal connected to an input terminal, and a second MOS transistor having a drain terminal connected to the input terminal and a source terminal connected to an output terminal. , A third MOS transistor having a source terminal grounded and a drain terminal connected to the output terminal, and three different types for the respective gate terminals of the first, second, and third MOS transistors. Of a plurality of input impedances of a first device or a first line connected to the input terminal, and a plurality of second devices or a second line connected to the output terminal. Output impedance information and a plurality of pieces of attenuation amount information for setting the attenuation amount of the output signal of the output terminal with respect to the input signal to the input terminal. A storage unit that stores in advance a plurality of voltage variable information for outputting the variable voltage corresponding to each of a plurality of types of information combinations, and a device or line connected to the input terminal and the output terminal. An input unit for inputting these three types of input information, that is, the input impedance information, the output impedance information, and the attenuation amount information, and the voltage variable information corresponding to the three types of input information input from the input unit. And a control unit that controls the variable voltage unit to output the three types of variable voltages corresponding to the input information read from the storage unit.

[0010]

DESCRIPTION OF THE PREFERRED EMBODIMENTS Next, the present invention will be described with reference to the drawings.

FIG. 1 is a block diagram showing an embodiment of the present invention.

Referring to FIG. 1, the variable attenuator of this embodiment has a MOS transistor (MOSTR) 3 having a source terminal grounded and a drain terminal connected to an input terminal 1, and a drain terminal connected to the input terminal 1 and a source terminal. A MOSTR4 connected to the output terminal 2, a MOSTR5 having a source terminal grounded and a drain terminal connected to the output terminal 2, and a MOST
A variable voltage section 7 for supplying different variable voltages to the respective gate terminals of R3, 4, 5 and a plurality of input impedance information of the first device or the first line connected to the input terminal 1, output terminals 2 of a plurality of pieces of output impedance information of the second device or the second line connected to the second line, and a plurality of pieces of pieces of attenuation amount information for setting the amount of attenuation of the output signal of the output terminal 2 with respect to the input signal to the input terminal 1. A storage unit 8 that stores in advance a plurality of voltage variable information for outputting the variable voltage corresponding to each of a plurality of combinations of type information, and a device or line connected to the input terminal 1 and the output terminal 2. Of the input impedance information, the output impedance information, and the attenuation amount information of the input unit 6, and the input information of the three types input from the input unit 6. And a control unit 9 for controlling the variable voltage unit 7 so as to output three variable voltage corresponding to the read input information voltage variable information from the storage unit 8 to be.

Next, the operation of this embodiment will be described.

First, it is assumed that characteristic information (especially conductance between the drain terminal and the source terminal) of how the characteristics of each of the MOSTRs 3, 4 and 5 to be used change with the input voltage of the gate terminal is known in advance. To do. Therefore, it is assumed that the voltage supplied to each gate terminal for matching the input impedance with respect to the input terminal, the output impedance with respect to the output terminal, and the attenuation amount is known in advance.

Further, the variable voltage section 7 includes MOSTRs 3, 4, 5
It is assumed that the input voltage variable information for the variable voltage individually supplied to each of the gate terminals is set in advance. Further, in the storage unit 8, a plurality of input impedance information to the input terminal 1, a plurality of output impedance information to the output terminal 2, and voltage variable information corresponding to these combinations of a plurality of attenuation amounts with respect to the input of the output are stored in advance. It is assumed to be remembered.

In the state of this embodiment in which each information is preset as described above, the input impedance information to be set to the input terminal from the input section 6, the output impedance information to be set to the output terminal 2 and the input of the output. When the input information of the attenuation amount information for is input, the control unit 9 reads the voltage variable information from the storage unit 8 based on the input information and outputs it to the variable voltage unit 7. The variable voltage section 7 outputs an independent voltage to each of the gate terminals of the MOSTRs 3, 4, 5 according to the input voltage variable information.

As a result, the attenuation circuit having the MOSTRs 3, 4 and 5 receives the input impedance information, the output impedance information and the attenuation amount information according to the voltage supplied to the gate terminals of the MOSTRs 3, 4 and 5. It is automatically adjusted and adjusted.

[0018]

As described above, the present invention corresponds to the input / output impedance and the amount of attenuation of the equipment or line connected to the input terminal and the output terminal of the attenuation circuit composed of three MOS transistors connected in a π shape. The variable voltage output means for controlling the variable voltage output means for outputting the variable voltage based on the voltage variable information in advance by storing the variable voltage information for the variable voltage to be provided to the respective gate terminals of the three MOS transistors. By supplying individually independent variable voltages from the variable voltage output means, the characteristics of the three MOS transistors can be independently changed, so that the input / output impedance and the attenuation amount can be adjusted independently and easily more easily than in the past. There is an effect that can be done.

[Brief description of drawings]

FIG. 1 is a block diagram showing an embodiment of the present invention.

FIG. 2 is a block diagram showing a conventional example.

[Explanation of symbols]

 1 Input Terminal 2 Output Terminal 3, 4, 5 MOS Transistor (MOSTR) 6 Input Section 7 Variable Voltage Section 8 Storage Section 9 Control Section

 ─────────────────────────────────────────────────── ─── Continuation of the front page (72) Inventor Tadashi Ishihara 3-20-4 Nishishimbashi, Minato-ku, Tokyo Inside NEC Engineering Co., Ltd.

Claims (2)

[Claims] 1. An attenuator circuit comprising three MOS transistors connected in a π shape including an input terminal and an output terminal, and a variable voltage which is different for each gate terminal of the three MOS transistors. And a first device or a first device connected to the input terminal.
Input impedance information of the line, a plurality of output impedance information of the second device or the second line connected to the output terminal, and an attenuation amount of the output signal of the output terminal with respect to the input signal to the input terminal are set. The input impedance information and the output, which have been stored in advance and which store a plurality of variable voltage information for outputting the variable voltage corresponding to each of a plurality of combinations of these three types of attenuation information Variable voltage control means for controlling the variable voltage output means to output the variable voltage information corresponding to the three types of input information of the impedance information and the attenuation amount information and output the variable voltage corresponding to the input information. A variable damping device comprising: 2. A first MOS transistor having a source terminal grounded and a drain terminal connected to an input terminal, a second MOS transistor having a drain terminal connected to the input terminal and a source terminal connected to an output terminal, and a source. A third MOS having a terminal grounded and a drain terminal connected to the output terminal
A transistor, a variable voltage unit that supplies three different variable voltages to the respective gate terminals of the first, second, and third MOS transistors, and a first device or a first device connected to the input terminal. A plurality of input impedance information of one line, a plurality of output impedance information of a second device or a second line connected to the output terminal, and an attenuation amount of an output signal of the output terminal with respect to an input signal to the input terminal, A storage unit that stores in advance a plurality of voltage variable information for outputting the variable voltage corresponding to each of a plurality of combinations of these three kinds of information of a plurality of pieces of attenuation amount information for setting, and the input terminal. And these three types of input information of the input impedance information of the device or line connected to the output terminal, the output impedance information, and the attenuation amount information. An input unit for inputting, and the voltage variable information corresponding to the three types of input information input from the input unit is read from the storage unit and the variable voltage is output to output the three types of variable voltages corresponding to the input information. A variable damping device comprising: a control unit that controls a voltage unit.