JPH07271577A - Buffer storage control method and information processor - Google Patents

Abstract

PURPOSE:To reduce the constraint of the execution of succeeding fetching when a succeeding fetching request to a preceding fetching request is turned to the object of pre-fetching by the preceding fetching request, to eliminate futile waiting time, to accelerate an access speed and to improve throughput relating to a buffer storage control method and the information processor suitable when it is used at the time of looking-ahead data whose read can be requested from a processor and transferring them from a storage device to a buffer storage device. CONSTITUTION:When a read request to the data during a look-ahead and transfer processing is generated inside a data processing part 2 during the look-ahead and transfer processing, the read request is immediately issued from the data processing part 2 to a buffer storage control part 4. By the buffer storage control part 4, when the look-ahead and transfer of the data corresponding to the read request are not completed, the data processing part 2 is informed of that effect, and when the look-ahead and transfer of the data corresponding to the read request are completed, the data are read from a buffer storage part 3 to the data processing part 2.

Description

Detailed Description of the Invention

(Table of Contents) Industrial Application Field of the Prior Art (FIGS. 10 and 11) Problem to be Solved by the Invention Means for Solving the Problem (FIG. 1) Operation (FIG. 1) Embodiment 1 First Embodiment Description of Example (FIGS. 2 to 5) • Description of Second Embodiment (FIGS. 6 to 9)

[0002]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an information processing apparatus provided with a buffer storage device for the purpose of speeding up data access between a processing device and a storage device, and stores data that can be read out from the processing device. The present invention relates to a buffer storage control method suitable for use when prefetching and transferring from a storage device to a buffer storage device, and the information processing apparatus.

[0003]

2. Description of the Related Art In recent years, various researches and developments have been carried out for the purpose of improving the processing capability of information processing devices. There is a demand for this. As the above-mentioned information processing device, generally, a processing device for performing arithmetic processing on data, a storage device for storing the data, and data information accessed by the processing device in the buffer storage device are controlled once. Buffer storage controller for

When the processing device issues a data read request (fetch request) to the buffer storage control device, if the requested data exists in the buffer storage device, the data is read from the buffer storage device. The data is sent to the processor, and the instruction that is the source of the read request is executed continuously. However, if it does not exist (miss hit), the instruction that is the source of the read request. Is suspended, the requested data is transferred from the storage device to the buffer storage device, and then the suspended instruction is executed.

Therefore, if the data requested to be read from the processing device exists in the buffer storage device in advance as much as possible, this buffer storage device can be effectively utilized. FIG. 10 is a block diagram showing an information processing device in which the data requested to be read from the processing device exists in the buffer storage device as much as possible as described above. The information processing device shown in FIG. And the like, a buffer storage control device 102 that monitors and controls the storage (registration) state of data in a buffer storage device (not shown), and another storage device 103 that stores data. There is.

Further, the processing device 101 can issue a read request for data including address information to the buffer storage control device 102, and also issues a read request during data transfer to the buffer storage device. In this case, the address comparison means 112 is provided for detecting whether or not prefetch data during transfer, which will be described later, includes data corresponding to the read request.

The buffer storage control device 102 detects, based on the read request from the processing device 101, whether or not the data corresponding to the requested address information is registered in the buffer storage device, and follows the requested data. The buffer storage status detecting means 121 for detecting whether or not the data to be stored in the buffer storage device is registered.

The buffer storage device is the storage device 10.
A part of the copy of the data in 3 is managed and stored for each data block of a certain fixed size. Therefore, based on the detection information from the buffer storage status detection means 121, if the requested data is not stored in the buffer storage device, a read request for the requested data is issued to the storage device 103, and the buffer storage device is requested to read the requested data. In addition to registering, if the data following the requested data is not registered in the buffer storage device, the subsequent data is also registered in the buffer storage device (prefetch transfer process, prefetch operation). .

With such a configuration, for example, when the processing device 101 issues the first fetch request 110 for the data block "0" (see (s1) in FIG. 11), the buffer that has received this read request 110. In the storage controller 102, the buffer storage status detecting means 1
The presence or absence of registration of the subsequent data block of the requested data block in the buffer storage is detected by 21 (see (s2) in FIG. 11).

In this case, the succeeding data block does not exist in the buffer storage device, and following the registration of the data block "0" in the buffer storage device, the succeeding data block (data blocks "1", " 2 ",
"3") is also continuously registered (prefetched) in the buffer storage device (see (s3) in FIG. 11). When the data block “0” is registered in the buffer storage device, the fact that the data block “0” is registered is detected by the buffer storage status detecting means 1.
21 and the data block “0” is read into the processing device 101 (see (s5) in FIG. 11), and predetermined arithmetic processing is performed. Further, the fact that the data blocks "1" to "3" are in the prefetch operation means
It is registered in the address comparison means 112 of the processing device 101.

While the data block "0" and the subsequent data blocks "1" to "3" are being registered in the buffer storage device, for example, the second data block "1" of the processing device 101 is processed. When the fetch request 111 is generated (see (s4) in FIG. 11), the address comparison means 1
12 detects whether the prefetch data currently being transferred includes the data requested by the second fetch request 111, and if it is currently transferring or is predicted to be transferred, the prefetch operation is performed. While the second fetch request 111 is being accepted (see (s6) in FIG. 11), the transfer of all the prefetch data (data blocks “1” to “3”) is completed ((( (see s7)), the second fetch request 111 is released from the hold ((s in FIG. 11).
8) (see 8).

As a result, the subsequent data is continuously registered as the originally requested data in the buffer storage device, so that the rate of occurrence of an expected mishit in a subsequent read request from the processing device 101 is reduced. It was controlled to let me.

[0013]

However, in the above-mentioned buffer storage control, a control method is adopted in which the condition for performing the prefetch operation and the transfer data length for performing the prefetch can be made variable depending on the state in the system. In this case, a subsequent fetch request that requests data within the range that can be prefetched is not immediately issued to the buffer storage control device, and even if the subsequent fetch request target data is registered in the buffer storage device by prefetching, Subsequent fetch requests are suspended during the prefetch operation.

Then, the hold is released after the preceding fetch request is completed, the data is read from the buffer storage device if it has been prefetched, and the fetch request is issued to the buffer storage control device if it has not been prefetched. Since such control is performed, there is a problem that unnecessary waiting time is required, which hinders improvement of access speed and causes a decrease in throughput.

The present invention has been made in view of such a problem, and limits execution of a subsequent fetch when a subsequent fetch request with respect to a preceding fetch request is a target of prefetch by the preceding fetch request. It is an object of the present invention to provide a buffer storage control method and an information processing device that can reduce access time and throughput by reducing unnecessary waiting time.

[0016]

FIG. 1 is a block diagram showing the principle of the present invention. The information processing apparatus shown in FIG. 1 operates on the basis of a storage unit 1 for storing data and data in the storage unit 1. The data processing unit 2, the buffer storage unit 3 that holds a part of the data in the storage unit 1, the data transfer from the storage unit 1 to the buffer storage unit 3, and the data reading from the buffer storage unit 3 to the data processing unit 2. The buffer storage control unit 4 controls the buffer storage control unit 4. When the data corresponding to the read request (fetch request) of the data processing unit 2 is stored in the buffer storage unit 3, While the data is read to the data processing unit 2, if the data corresponding to the read request of the data processing unit 2 is not stored in the buffer storage unit 3, the data is read from the storage unit 1 to the data processing unit 2. After both of them are transferred to the buffer storage unit 3, a prefetch transfer process (prefetch process) of prereading the data that can be requested to be read from the data processing unit 2 and transferring the data from the storage unit 1 to the buffer storage unit 3 is performed. It has become.

In the data processing unit 2 of the present invention, when a read request for the data during the prefetch transfer process is generated in the data processing unit 2 during the prefetch transfer process, the read request is issued to the buffer storage control unit 4. A read request issuing means 5 for immediately issuing is provided. Further, the buffer storage control unit 4 of the present invention includes the transfer completion determination unit 6 and the notification unit 7.
The data read means 8 and the transfer data order control means 9 are provided.

Here, the transfer completion judging means 6 judges whether or not the prefetch transfer of the data according to the read request from the data processing section 2 (read request issuing means 5) is completed. When the transfer completion determination unit 6 determines that the prefetch transfer of the data corresponding to the read request is not completed, the notification unit 7 notifies the data processing unit 2 to that effect, and the data read unit 8 is provided. When the transfer completion determining unit 6 determines that the prefetch transfer of the data corresponding to the read request is completed, the data is read from the buffer storage unit 3 to the data processing unit 2 (claim 1). , 3).

Further, the transfer data order control means 9 reads out the data by the transfer completion determination means 6 when the buffer storage control part 4 continuously performs the prefetch transfer of a plurality of data in the prefetch transfer processing. If it is determined that the prefetch transfer of the requested data has not been completed,
The read-ahead transfer order of the plurality of data is changed to preferentially perform the read-ahead transfer of the data according to the read request (claims 2 and 4).

[0020]

In the above-described buffer storage control method and information processing apparatus of the present invention, when data corresponding to the read request of the data processing unit 2 is stored in the buffer storage unit 3, the buffer storage control unit 4 causes While the data is read to the data processing unit 2, if the data corresponding to the read request of the data processing unit 2 is not stored in the buffer storage unit 3, the buffer storage control unit 4 reads the data from the storage unit 1. After being read out to the data processing unit 2 and transferred to the buffer storage unit 3, the data processing unit 2 follows the data.
Read-ahead transfer processing for pre-reading data that can be requested to be read from the storage unit 1 and transferring it to the buffer storage unit 3 is performed.

Further, when a read request for the data during the prefetch transfer process is issued by the read request issuing means 5 of the data processing unit 2 during the prefetch transfer process, the read request is:
Immediately issued from the data processing unit 2 to the buffer storage control unit 4, and when the transfer completion determination means 6 of the buffer storage control unit 4 determines that the prefetch transfer of the data corresponding to the read request is not completed, To that effect, the notifying means 7 notifies the data processing section 2, and if the prefetch transfer of the data corresponding to the read request has been completed, the data reading means 8 transfers the data from the buffer storage section 3 to the data processing section 2. Read out.

As described above, the read request from the data processing unit 2 to the buffer storage control unit 4 is not suspended and the processing in the data processing unit 2 is continuously executed. Therefore, it is no longer necessary for the data processing unit 2 to recognize whether or not there is a possibility of prefetch transfer by a preceding read request, which is conventionally performed for each reading request, and the response from the buffer storage control unit 4 for the preceding read request is also waited. It is possible to output a subsequent read request without a request.

Further, when the prefetch transfer of a plurality of data is continuously performed in the prefetch transfer process, the prefetch transfer of data corresponding to the read request of the data processing unit 2 for the data being prefetched must be completed. For example, the transfer order control unit 9 of the buffer storage control unit 4 changes the prefetch transfer order of the plurality of data, preferentially performs the prefetch transfer of the data according to the read request, and minimizes the penalty of the subsequent read request. It becomes possible to limit it.

[0024]

【Example】

(A) Description of First Embodiment FIG. 2 is a block diagram showing an information processing apparatus according to the first embodiment of the present invention. The information processing apparatus shown in FIG. 2 is a main storage device in which data is stored. (Storage unit) 11 and a processing device (data processing unit) 12 that performs operations such as arithmetic processing based on the data stored in the main storage unit 11.
And a buffer storage device (buffer storage unit) 1 for temporarily storing a part of the data stored in the main storage device 11.
3 and a buffer storage control device (buffer storage control unit) 14 for monitoring and controlling the data storage (registration) state in the buffer storage device 13 and for controlling the data reading to the processing device 12. The buffer storage device 1
3 manages and stores a copy of part of the data in the main storage device 11 for each data block of a certain size.

Further, the buffer storage control device 14 uses the processing device 1 when the processing device 12 reads data.
The data storage state of the buffer storage control device 13 is controlled according to the data storage state of the data corresponding to the data read request (fetch request) from the buffer storage device 13, and the fetch request from the processing device 12 When the data corresponding to the data is stored in the buffer storage device 13 (cache hit), the data is read to the processing device 12, while the data corresponding to the fetch request from the processing device 12 is stored in the buffer storage device 13. If not (cache miss hit), the data is read from the main storage device 11 to the processing device 12 and transferred to the buffer storage device 13, and then the data which can be read from the processing device 12 is requested following the data. A prefetch transfer process (prefetch process of prefetching and transferring to the main storage device 11 or the buffer storage device 13) ) It is adapted to perform.

The processing device 12 of this embodiment comprises a registration status storage unit 61 and a read request issuing unit 19. Here, the registration status storage unit 61 stores a copy of the TAG unit 81 described later (registration status of data in the buffer storage device 13), and specifically, 64
The data registration status for each byte is such that if each bit is "0", it is unregistered, and if it is "1", registration can be performed simultaneously in units of four groups as registration.

Further, the read request issuing unit 19 issues a fetch request for the data being prefetched to the processing device 12.
If it occurs in the buffer, the fetch request is immediately issued to the buffer storage controller 14. On the other hand, in the buffer storage control device 14 of the present embodiment, the transfer completion determining unit (transfer completion determining unit) 15, the notifying unit (notifying unit) 16,
A data reading section (data reading means) 17, a transfer data order control section (transfer data order control means) 18, and a TAG section 81 are provided.

Here, the TAG unit 81 records the registration status of data in the buffer storage device 13, and specifically, the registration status of data every 64 bytes is
If each bit is "0", it is unregistered, and if it is "1", it is possible to record simultaneously as a unit of four groups as registration, and it is possible to retrieve four registration statuses at the same time.
The TAG unit 81 is also provided with a prefetch target flag indicating whether or not the fetch request target data is a prefetch target. This flag indicates “1” when the prefetch target data is a prefetch target. If not, "0" is set.

The transfer completion determining unit 15 determines the data corresponding to the fetch request (fetch request for the data being prefetched) from the processing device 12 (read request issuing unit 19) based on the data registration status in the TAG unit 81. It is to determine whether or not the transfer has been completed. When the notification unit 16 receives the determination result from the transfer completion determination unit 15 and determines that the prefetch process of the data according to the fetch request from the processing device 12 is not completed, the notification unit 16 notifies that effect. To notify.

The data reading section 17 includes a transfer completion determining section 15
When it is determined that the prefetch processing of the data corresponding to the fetch request from the processing device 12 is completed, the control is performed to read the data from the buffer storage device 13 to the processing device 12. is there.
The buffer storage control operation by the information processing apparatus according to the first embodiment of the present invention having the above-described configuration will be described below with reference to the block diagram shown in FIG. 3, the flowchart shown in FIG. 4, and the time chart shown in FIG. .

When a fetch request 62 for a data block "0" is generated in the processing unit 12 ((t in FIG. 5).
1)), the registration status storage unit 61 is searched to see if the requested data block "0" exists in the buffer storage device 13 (step A1 in FIG. 4 and (t in FIG. 5).
See 2)). Here, the requested data block “0”
Is present in the buffer storage device 13 (cache hit), the data reading unit 17 reads the data block “0” from the buffer storage device 14 (from YES route of step A1 to step A4 in FIG. 4). If the requested data block “0” does not exist in the buffer storage device 13 and a mishit occurs, the data block “0” from the main storage device 11 to the buffer storage device 13 is sent to the buffer storage control device 14. "Transfer request 83" is output (NO route of step A1 in FIG. 4).

In the buffer storage controller 14, not only the buffer registration status of the target data block "0" of the transfer request 83, but also prefetch processing, for example, data blocks "1" to "3" of 256 bytes in the succeeding address. The registration status of "is also checked by searching the TAG unit 81, and the main storage device 11 is searched according to the result.
The transfer requests 84 for the requested data blocks are sequentially output to.

Then, as a response 91 from the main storage device 11 to the transfer request 84 from the buffer storage device 14, data corresponding to the transfer request 83 is registered in the buffer storage device 13 (step A2 in FIG. 4).
From NO route of step A6) together with the processing device 1
2, the data corresponding to the transfer request 83 is output (see step A4 in FIG. 4), the contents of the TAG unit 81 are updated and registered, and the response to the fetch request 62 is completed ((t3 in FIG. 5). )reference).

After that, the subsequent data blocks "1" to "3" are stored in the buffer storage device 13 on the basis of the result of the search processing of the registration status of the subsequent data performed together with the data search processing corresponding to the transfer request 83. If it is not registered in, the prefetch processing is performed on the data blocks “1” to “3”, and the prefetch target flag in the TAG unit 81 is set to “1” for the prefetch target data block.

That is, a data registration request 85 of the data block “1” to the main memory device 11 to the buffer memory device 13, a data registration to the buffer memory device 13 as a response 92, and a data block “to the main memory device 11”. Data registration request 8 to the 2 "buffer storage device 13
6, data registration request to the buffer storage device 13 as the response 93, data registration request 87 to the buffer storage device 13 of the data block “3” to the main storage device 87
And the data as the response 94 to the buffer storage device 13 is sequentially and continuously registered ((t in FIG. 5).
See 3)).

When the data is registered in this way, the TAG unit 81 is registered for the registered data block.
The bit indicating the registration status in (registration status storage unit 61) is updated (set to "1"). Here, the transfer request 62
When the data corresponding to the prefetch operation started by is being transferred to the buffer storage device 13 by the response 92, the data block “1” is set in the processing device 12.
Suppose that a second fetch request 63 is generated for the (YES route from step A2 in FIG. 4, (t in FIG.
4)), the fetch request 63 is not suppressed by the read request issuing unit 19 and the transfer request 6 is sent to the buffer storage device 14 as it is as a normal request.
Issued as 4.

In this case, the TAG unit 81 is updated by the response 91, and the transfer completion determining unit 15 of the buffer storage control device 14 refers to the TAG unit 81 (registration status, prefetch target bit), It is possible to determine whether or not the target data block “1” of the fetch request 63 of No. 2 is prefetch registration, and further whether or not it is already registered in the buffer storage device 13.

The transfer completion judging unit 15 judges that the target data block "1" of the second fetch request 63 is undergoing data transfer by the prefetch operation currently being processed and is not yet registered in the buffer storage device 13. In this case, the notification unit 16 immediately returns a response 88 to that effect to the processing device 12 (from NO route of step A3 of FIG. 4 to step A5). When the processing device 12 receives such a response, it is as if the requested data is the buffer storage device 1.
The process can be continued as if it was hit at 3.

The processing device 12 repeats the output operation of the transfer request 64 to the buffer storage control device 14 after a certain time of this response, and the transfer completion judging section 15 causes the buffer storage device of the requested data block "1". When it is determined that the registration in the data storage unit 13 is completed, the data reading unit 17 performs the fetch operation of the data block “1” registered in the buffer storage device 13 to the processing device 12 ((t5) in FIG. 5 and FIG. 4). YES in step A3
From the root, step A4).

That is, when the transfer request 64 is output from the processing device 12 to the buffer storage control device 14, in the transfer completion judging section 15, the data corresponding to the second fetch request 63 is sent to the buffer storage device 13. Block "1"
Is determined to be stored, and the data reading unit 17 performs the operation of reading the data in the buffer storage device 13.

Note that the data corresponding to the prefetch operation started by the transfer request 62 is stored in the buffer storage device 13 in the processing device 12 while the data is being transferred to the buffer storage device 13 by the response 92. If there is no fetch request for data that is not related to the prefetch operation, the buffer storage controller 1
4, the prefetch operation currently being executed is immediately stopped, and the data for the generated fetch request is registered in the buffer storage device 13 from the main storage device 11 (from NO route of step A2 in FIG. 4 to step S2). A6).

As described above, according to the first embodiment of the present invention, if the buffer storage control device 14 has not completed the data prefetch process in response to the second fetch request 63, the processing device 12 indicates that fact. If the prefetch processing of the data corresponding to the second fetch request 63 is completed, the data can be read from the buffer storage device 13 to the processing device 12. Therefore, the subsequent fetch request for the preceding fetch request can be read. Can reduce the restriction on the execution of the subsequent fetch when the target is prefetched by the preceding fetch request, eliminate unnecessary waiting time, improve the access speed, and eventually prevent the throughput from decreasing. There are advantages.

(B) Description of Second Embodiment FIG. 6 is a block diagram showing an information processing apparatus according to the second embodiment of the present invention. The information processing apparatus shown in FIG. 6 is the same as the first embodiment described above. 2 is different from that in FIG. 3 in that the transfer data order control unit 18 is provided in the buffer storage control device 14, and other components have the same functions.

Here, the transfer data order control unit 18 transfers data when the buffer storage control device 14 continuously prefetches a plurality of data (three data blocks in this embodiment) in the prefetch process. When the completion determination unit 15 determines that the prefetch of the data corresponding to the second fetch request is not completed, the prefetch order (the registration order in the buffer storage device 13)
Is replaced and changed to preferentially prefetch data according to the second fetch request.

That is, in the second embodiment, as will be described later with reference to FIGS. 7 to 9, the order of data blocks to be prefetched can be changed to the order in which a fetch request is made. The buffer storage control performed by the information processing apparatus according to the second embodiment of the present invention having the above configuration will be described below with reference to the block diagram shown in FIG. 7, the flowchart shown in FIG. 8 and the time chart shown in FIG. To do.

Basically, as in the case of the first embodiment, when a fetch request 62 for a data block "0" occurs in the processing device 12 (see (t11) in FIG. 9), the registration status storage unit 61. In step S1, it is searched whether or not the requested data block "0" exists in the buffer storage device 13 (see step B1 in FIG. 8 and (t12) in FIG. 9).

Here, the requested data block "0"
Is present in the buffer storage device 13 (cache hit), the data reading unit 17 reads the data from the buffer storage device 13 (YES route from step B1 to step B5 in FIG. 8) while the requested data block “0” does not exist in the buffer storage device 13,
In the case of a mishit, the buffer storage controller 14
In response, a transfer request 83 for the data block “0” from the main storage device 11 to the buffer storage device 13 is output (NO route of step B1 in FIG. 8).

In the buffer storage control device 14 that has received the transfer request 83, not only the buffer registration status of the target data block "0" of the request 83 but also the data block "1" of 256 bytes at the succeeding address is prefetched. Even the registration status of "~" 3 is
Search by searching the section 81, and depending on the result,
A transfer request 84 for request data is output to the main storage device 11.

In this case, since the data corresponding to the transfer request 84 is not the target block during the prefetch operation, the buffer storage device 13 receives the response 91 from the main storage device 11 to the transfer request 84, and
The data corresponding to the transfer request 83 is registered (from NO route of step B2 of FIG. 8 to step B8), and the data corresponding to the transfer request 83 is output to the processing device 12 (step B5 of FIG. 8). ), TAG
The contents of the section 81 are updated and registered, and the fetch request 62
Is completed (see (t13) in FIG. 9).

After that, the subsequent data blocks "1" to "3" are stored in the buffer storage device 13 based on the result of the search processing of the registration status of the subsequent data which is performed together with the data search processing corresponding to the transfer request 83. If it is not registered in, the prefetch processing is performed on the data blocks “1” to “3”, and the prefetch target flag in the TAG unit 81 is set to “1” for the prefetch target data block.

That is, a data registration request 85 of the data block “1” to the main memory device 11 to the buffer memory device 13, a data registration to the buffer memory device 13 as its response 92, a data block “to the main memory device 11”. Data registration request 8 to the 2 "buffer storage device 13
6, registration of data in the buffer storage device 13 as its response, data block “3” for the main storage device 11
The data registration request 87 to the buffer storage device 13 and the data registration to the buffer storage device 13 as the response 93 are sequentially and continuously performed ((t13) in FIG. 9).
reference).

When the data is registered in this way, the TAG section 81 is registered for the registered data block.
The bit indicating the registration status in (registration status storage unit 61) is updated (set to "1"). Here, the transfer request 62
When the data corresponding to the prefetch operation started by is being transferred to the buffer storage device 13 by the response 92, the data block “3” is set in the processing device 12.
Suppose that a second fetch request 65 is issued to (YES route of step B2 of FIG. 8, (t1 of FIG. 9
4)), the fetch request 65 is not suppressed by the read request issuing unit 19 and the transfer request 6 is sent to the buffer storage device 14 as it is as a normal request.
Issued as 6.

At this time, in the second embodiment, like the transfer request 83 of the data block "0", the buffer storage device 13
When the data transfer has already been completed, the notification unit 16 immediately returns a response 88, but the transfer request 66
As shown in FIG.
If it is determined that a request has been made for the registration to 3 but not yet transferred, the transfer data order control unit 18 sets the buffer registration bit of the TAG unit 81 and the prefetch target flag. In reference to,
It is determined whether or not the requested data block “3” can be preferentially registered in the buffer storage device 13 (step B3 in FIG. 8).

When the requested data block "3" can be registered in the buffer storage device 13 with priority (FIG. 8).
(YES route in step B3), the transfer data order is changed by the request 87 issued from the transfer data order control unit 18 (step B6 in FIG. 8), and the data block “3” is given priority to the buffer storage device 13. Register with. That is, the transfer data order control unit 18 controls so as to issue the request 87 while overtaking the request 86 for transferring the data block “2” to the buffer storage device 13 and to make the response 89 to the processing device 12. Yes ((t in FIG. 9
16)).

Thereafter, in the transfer completion judging section 15, when it is confirmed by the request data registration completion signal that the data block "3" corresponding to the request 87 is registered in the buffer storage device 13 (YES route of step B4). ),
It is determined that the data block “3” corresponding to the second fetch request 65 is stored in the buffer storage device 13, and the data reading unit 17 performs the read operation of the data in the buffer storage device 13 (FIG. 8). Step B5).

When the transfer completion judging unit 15 judges that the data corresponding to the transfer request is being transferred and the registration in the buffer storage device 13 is not completed, the notifying unit 16 judges that The response indicating that is the processing device 1
2 (from step B4 of FIG. 8, NO route to step B7, (t15) of FIG. 9). As described above, according to the second embodiment of the present invention, the same effects as those of the first embodiment can be obtained, and according to the second embodiment,
When a plurality of data are prefetched continuously in the prefetch process, if the data prefetch corresponding to the second fetch request 65 of the processing device 12 for the data being prefetched is not completed, the buffer storage control device 14 Thus, by changing the data prefetch order and preferentially prefetching the data according to the second fetch request 65, the penalty of the subsequent fetch request can be minimized.
There is an advantage that the access speed can be dramatically improved, throughput can be surely prevented from lowering, and the system performance can be greatly improved.

[0057]

As described in detail above, according to the present invention,
The buffer storage control unit notifies the data processing unit of the fact that the prefetch transfer of the data corresponding to the read request has not been completed, and the prefetch transfer of the data corresponding to the read request has been completed, the data Can be read from the buffer storage unit to the data processing unit, so that when the subsequent fetch request for the preceding fetch request is the target of prefetching by the preceding fetch request, it is possible to reduce the constraint of executing the subsequent fetch. Therefore, there is an advantage that wasteful waiting time can be eliminated, access speed can be improved, and reduction in throughput can be prevented.

Further, according to the present invention, when the prefetch transfer of a plurality of data is continuously performed in the prefetch transfer process, the prefetch transfer of the data in response to the read request of the data processing unit for the data being prefetched. If not completed, the buffer storage control unit changes the prefetch transfer order of the plurality of data and preferentially performs the prefetch transfer of the data according to the read request, thereby penalizing the subsequent read request. Since it can be suppressed to the minimum limit, there is an advantage that the access speed can be dramatically improved, throughput can be surely prevented from lowering, and the system performance can be greatly improved.

[Brief description of drawings]

FIG. 1 is a principle block diagram of the present invention.

FIG. 2 is a block diagram showing a first embodiment of the present invention.

FIG. 3 is a block diagram for explaining the operation of the first exemplary embodiment of the present invention.

FIG. 4 is a flow chart for explaining the operation of the first embodiment of the present invention.

FIG. 5 is a time chart for explaining the operation of the first embodiment of the present invention.

FIG. 6 is a block diagram showing a second embodiment of the present invention.

FIG. 7 is a block diagram for explaining the operation of the second exemplary embodiment of the present invention.

FIG. 8 is a flow chart for explaining the operation of the second embodiment of the present invention.

FIG. 9 is a time chart for explaining the operation of the second embodiment of the present invention.

FIG. 10 is a block diagram showing a general information processing apparatus.

FIG. 11 is a time chart for explaining the operation of a general information processing device.

[Explanation of symbols]

1 Storage Unit 2 Data Processing Unit 3 Buffer Storage Unit 4 Buffer Storage Control Unit 5 Read Request Issuing Means 6 Transfer Completion Judging Means 7 Notifying Means 8 Data Reading Means 9 Transfer Data Sequence Control Means 11 Main Memory (Storage) 12 Processing Devices (Data processing unit) 13 Buffer storage device (Buffer storage unit) 14 Buffer storage control device (Buffer storage control unit) 15 Transfer completion determination unit (Transfer completion determination unit) 16 Notification unit 17 Data reading unit (Data reading unit) 18 Transfer Data order control unit (transfer data order control unit) 19 Read request issuing unit (read request issuing unit) 61 Registration status storage unit 81 TAG unit

Claims (4)

[Claims] 1. A storage unit (1), a data processing unit (2) that operates based on data in the storage unit (1), and a buffer storage unit that holds a part of the data in the storage unit (1). (3)
And a buffer storage control unit (4) for controlling data transfer from the storage unit (1) to the buffer storage unit (3) and data reading from the buffer storage unit (3) to the data processing unit (2). A buffer storage control method in an information processing apparatus comprising: a buffer storing control method, wherein data corresponding to a read request of the data processing unit (2) is stored in the buffer storage unit (3). The storage control unit (4) reads the data to the data processing unit (2), but the data according to the read request of the data processing unit (2) is not stored in the buffer storage unit (3). The buffer storage control unit (4) reads the data from the storage unit (1) to the data processing unit (2) and transfers the data to the buffer storage unit (3). Data processing The buffer storage unit from the storage unit to read ahead data that can be read request from (2) (1) (3)
In the buffer storage control method for performing the prefetch transfer process for transferring to the prefetch transfer process, if a read request for data during the prefetch transfer process occurs in the data processing unit (2), the read request is transmitted. Immediately issued from the data processing unit (2) to the buffer storage control unit (4), and if the buffer storage control unit (4) has not completed the prefetch transfer of data according to the read request, the fact is notified. The data processing unit (2) is notified, and if the prefetch transfer of the data corresponding to the read request is completed, the data is read from the buffer storage unit (3) to the data processing unit (2). And a buffer storage control method. 2. When the pre-reading transfer of a plurality of data is continuously performed in the pre-reading transfer process, the pre-reading transfer of the data according to the read request of the data processing unit (2) for the data under the pre-reading transfer process is performed. If not done,
2. The buffer storage according to claim 1, wherein the buffer storage control unit (4) changes the read-ahead transfer order of the plurality of data and preferentially performs the read-ahead transfer of the data in response to the read request. Control method. 3. A storage unit, a data processing unit (2) which operates based on the data of the storage unit (1), and the storage unit (1).
Storage unit (3) for holding a part of the data of the data, data transfer from the storage unit (1) to the buffer storage unit (3), and the data processing unit (2) from the buffer storage unit (3) A buffer storage control unit (4) for controlling data reading to and from the data storage unit (2),
When the data corresponding to the read request of the data processing unit (2) is stored in the buffer storage unit (3), the data is read to the data processing unit (2) and the read request of the data processing unit (2) is received. If the stored data is not stored in the buffer storage unit (3), the data is read from the storage unit (1) to the data processing unit (2) and transferred to the buffer storage unit (3). In an information processing device that performs a prefetch transfer process of prefetching data that can be requested to be read from the data processing unit (2) and transferring the data from the storage unit (1) to the buffer storage unit (3), When a read request to the data processing unit (2) for the data in the prefetch transfer process occurs during the prefetch transfer process, the read request is issued to the buffer storage control unit (4). ) Immediately A read request issuing means (5) for issuing the read request to the buffer storage control section (4), and whether or not the read-ahead transfer of data corresponding to the read request from the data processing section (2) is completed. If the transfer completion determination means (6) for determining whether or not the prefetch transfer of the data corresponding to the read request is not completed by the transfer completion determination means (6), the data processing unit indicates that fact. When it is determined by the notifying means (7) notifying (2) and the transfer completion determining means (6) that the prefetch transfer of the data corresponding to the read request is completed,
An information processing device, comprising: a data reading unit (8) for reading the data from the buffer storage unit (3) to the data processing unit (2). 4. When the buffer storage control unit (4) continuously performs the pre-read transfer of a plurality of data in the pre-read transfer process, the buffer storage control unit (4) notifies the transfer completion determination. When the means (6) determines that the prefetch transfer of the data corresponding to the read request is not completed, the prefetch transfer order of the plurality of data is changed to prioritize the prefetch transfer of the data corresponding to the read request. 4. The information processing apparatus according to claim 3, further comprising transfer data order control means (9) for performing the data transfer.