JPH07271378A - Sound source device - Google Patents

Abstract

PURPOSE:To realize an FM sound source having high degree of freedom of algorithm in a sound source LSI 11 having plural pronunciation channels. CONSTITUTION:A phase generator 30 generates the phase data based on the frequency of the signal data to be generated to input them to an adder 31. The modulation data are inputted to the adder 31, and the phase data are modulated by the modulation data. An address pointer 32 generates an address based on the phase data, and accesses to a DRAM 13 (waveform data storage means) with the address to read out the waveform data, and thus, the signal data are formed. The signal data are stored in an internal RAM 39 through an interpolater 33, a multiplier 34 and a read/write controller 38. The signal data stored in the internal RAM 39 are read out to other or one's own pronunciation channel as the modulation data to be inputted to the adder 31. The matter that any signal data are taken out from the internal RAM 39 as the modulation data is specified optionally, and optional algorithm is constituted according to the specification.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a tone generator device having a plurality of tone generation channels, and more particularly to a tone generator device for forming tone data by FM system.

[0002]

2. Description of the Related Art An FM sound source device is a sound source device configured as follows. It has a plurality of oscillation circuits that form signal data (operator) such as a sine wave. Regarding the plurality of oscillation circuits, "the signal data formed by the oscillation circuit of the previous stage is input to the frequency determination unit of the oscillation circuit of the subsequent stage. Modulates the frequency of the signal data formed by this oscillator. ”
The data input / output is performed by a predetermined algorithm. The signal data formed by the final-stage oscillation circuit among the plurality of oscillation circuits has a complicated waveform after undergoing complex modulation and is output as tone data.

[0003]

However, the conventional FM type sound source device does not have a memory for storing the signal data formed by each oscillating circuit, and after the signal data is input to the shift register or the like and delayed. It is configured to be input to another defined oscillation circuit and used as modulation data.
Therefore, the connection of a plurality of oscillator circuits is almost fixed in terms of hardware, and there is a drawback that the algorithm such as the number of operators and the connection form thereof is fixed.

The present invention provides a sound source device in which an arbitrary algorithm can be set by temporarily storing signal data formed by a plurality of sound generation channels and allowing input to any sound generation channel including self. With the goal.

[0005]

The invention according to claim 1 of the present application comprises a waveform data storage means for storing waveform data, and an address generation means for generating an address corresponding to a frequency of signal data to be formed. And a reading means for forming signal data by accessing the waveform data storage means at the address generated by the address generating means and reading the waveform data, and any one of the sound generation channels is formed. A sound source device for externally outputting signal data as tone data,
Signal data temporary storage means for sequentially storing signal data generated by the plurality of sound generation channels in the plurality of sound generation channels, and modulation data designating means for designating signal data to be read as modulation data from the signal data temporary storage means. A modulation data input means for reading the signal data designated by the modulation data designation means from the signal data temporary storage means and inputting the signal data to the address generation means, and the modulated data input means is inputted to the address generation means as the modulation data. An address displacing means for displacing the generated address by using the signal data is provided.

According to a second aspect of the present invention, phase data generating means for generating phase data by accumulating numerical data corresponding to the frequency of the signal data to form the address generating means, and phase data generating means Address generating means, and the address displacing means is composed of adding means for adding the signal data read from the signal data temporary storage means to the phase data generated by the phase data generating means. And

The invention of claim 3 of this application is the same as that of the invention of claim 1, in which envelope data generating means for generating envelope data defining amplitude characteristics of signal data is provided in each tone generation channel, and the envelope data generating means. Is provided to the signal data, and the signal data temporary storage means is a means for storing the signal data to which the envelope data is added by the envelope adding means. .

According to a fourth aspect of the present application, in the above-mentioned first aspect of the invention, the modulation data designating means is means for designating a plurality of signal data, and the address displacing means is the signal data temporary storage means. It is a means for shifting the address by using a plurality of signal data read from.

The invention of claim 5 of this application is characterized in that, in the invention of claim 1, the plurality of tone generation channels are constituted by time division channels.

[0010]

Each tone generation channel generates an address corresponding to the frequency of the signal data to be formed, and the waveform data storage means is accessed at this address to read the waveform data. On the other hand, the tone generation channel displaces this address with the modulation data to fluctuate the progress of the address for reading the waveform data (amplitude value), and frequency-modulates (FM-modulates) the signal data. The modulation data is selected by the modulation data designating means from among the plurality of signal data formed by the plurality of sound generation channels and stored in the signal data temporary storage means. By setting the modulation data designating means so that the signal data formed by another or its own sound generation channel is used as this modulation data, a plurality of sound generation channels can be connected by a predetermined algorithm to form an FM sound source. Since the setting of the modulation data designating means is arbitrary, any algorithm can be set. In this algorithm, the signal data formed by the tone generation channel designated at the final stage is externally output as musical tone data.

According to the second aspect of the present invention, the phase data is formed by accumulating numerical data corresponding to the frequency of the signal data to be formed, and the address is generated according to the phase data. Then, the generated address is displaced by adding the signal data to be the modulation data to this phase data.

Further, according to the invention of claim 3, the signal data stored in the signal data temporary storage means is added with an envelope. This can make the address modulation more complicated.

Further, in the invention of claim 4, the modulation data designating means designates a plurality of signal data, and the plurality of signal data read from the signal data temporary storage means are averaged to obtain an address. To displace. As a result, the address can be modulated with a plurality of signal data, and a more complicated algorithm can be configured.

According to the invention of claim 5, the plurality of sound generation channels are time-division channels. As a result, the hardware circuit can be simplified and downsized.

[0015]

1 is a block diagram of a video game machine to which a sound source LSI according to an embodiment of the present invention is applied. A display 4 and a speaker 5 are connected to the game machine body 1. As the display 4 and the speaker 5, those built in the television receiver can be used. In addition to the display 4 and the speaker 5, the game machine body 1 is connected to a game cartridge 3 having a ROM 19 storing a game program therein, and a controller 2 operated by a player to play a game. The controller 2 is connected to the game console body 1 via a cable, and the game cartridge 3 is connected to the game console body 1
It is inserted in the slot provided in. A CPU 10 is built in the game machine body 1, and the CPU 10 controls the operation of the entire device such as the progress of a game. The CPU 10 includes an R in the controller 2 and the game cartridge 3.
OM19, display controller 1 for display control
4, and a sound source LSI 11 for generating sound effects and BGM is connected. The tone generator LSI 11 is connected to a DRAM 13 that stores waveform data and the like, and a D / A conversion circuit 16 that converts the generated musical tone data into an analog musical tone signal.

The DRAM 13 stores the waveform data for the tone generator LSI 11 to form the signal data.
As the waveform data, voice waveform data that is waveform data of sampled musical tones and modulation waveform data that is waveform data of a simple sine wave, a triangular wave, or the like (see FIG. 5) are stored. The sound source LSI 11 reads voice waveform data when operating as a waveform memory type sound source, and reads modulation waveform data when operating as an FM system sound source. The waveform data is stored as 44.1 kHz PCM data.

The speaker 5 is connected to the D / A conversion circuit 16. In addition, the display controller 14
A VRAM 15 for storing screen display data and the display 4 are connected to the.

When the game cartridge 3 is set in the game machine main body 1 and the power is turned on, the CPU 10 first reads predetermined screen data and sends it to the display controller 14, and at the same time, waveform data for generating sound effects and BGM. Is written in the DRAM 13. After that, the game is started by operating the controller 2, and the CPU 10 rewrites the screen data and produces sound effects and BGM as the game progresses.

FIG. 2 is a diagram showing the internal structure of the tone generator LSI 11. As shown, the tone generator LSI 11 includes a phase generator 30, an adder 31, an address pointer 32, an interpolator 33, a multiplier 34, and an amplitude modulation low frequency oscillator (ALF).
O) 35, envelope generator (EG) 36, output mixing circuit 37, read / write controller 3
8, internal RAM 39, averaging circuit 40 and coefficient multiplier 4
Have one. The tone generator LSI 11 is capable of forming musical tone data by two types of methods, a waveform memory method and an FM tone generator method, and the above circuit operates as described below to operate low frequency signals such as tone data and modulated data. Generate data. The tone generator LSI 11 has 32 time division channels and can generate 32 signal data at the same time.

The tone generator LSI 11 has an internal register 19. In the internal register 19, as shown in FIG. 3, a plurality of storage areas corresponding to respective sounding channels are set. When sounding / muting a certain sounding channel, the CPU 10 sets data in the corresponding storage area. The phase generator 30 reads the FNS data and the octave data OCT corresponding to the note name from the internal register 19, and based on these, a predetermined sampling period (4
Phase data is generated every 4.1 kHz. This phase data is input to the adder 31. Modulation data is input to the adder 31 from the coefficient multiplier 41. When the modulation data is input from the coefficient multiplier 41, the adder 31 adds the modulation data to the phase data to add the address pointer 3
Output to 2. Since the modulation data is low-frequency signal data read from the internal RAM 39, the modulation data causes the phase data to fluctuate in a constant cycle, which causes the address value output by the address pointer 32 to be shifted back and forth. As a result, the waveform of the read signal data is frequency-modulated.

The address pointer 32 is the internal register 1
The start address SA, the loop start address LSA, and the loop end address LEA stored in 9 are read as data designating the waveform data. The start address SA is an address that specifies the beginning of the waveform data in the DRAM 13. Loop start address LS
A, the loop end address LEA is an address indicating a section that is repeatedly read when this waveform data is read for a long time. The address pointer 32 determines the step amount of the address based on the phase data input from the adder 31, and outputs the address data including the decimal part. The fractional part data FRA of the address data is output to the interpolator 33, and two integer addresses MEA sandwiching this fractional part are DR.
It is output to AM13.

Two adjacent waveform data are read from the DRAM 13 by the input two integer addresses MEA. The waveform data read from the DRAM 13 is input to the interpolator 33. The interpolator 33 forms signal data at the sampling timing by interpolating the two input waveform data according to the value of the fractional part data FRA input from the address pointer 32.
The interpolator 33 inputs this data to the multiplier 34.

The multiplier 34 includes an amplitude modulation low frequency oscillator (ALFO) 35 and an envelope generator (E).
G) 36 is connected. The ALFO 35 reads the frequency data LFOF from the internal register 19, the waveform designation data LFOWS, the influence data (amplitude data) LFO.
Based on S, modulated signal data having a low frequency waveform as shown in FIG. 5 is generated. The EG 36 reads the attack rate AR, the first decay rate D1R, the second decay rate D2R, and the release rate RR from the internal register 19 and generates envelope waveform data as shown in FIG. 6, for example.

The multiplier 34 multiplies the signal data formed by the interpolator 33 by the above-mentioned modulated signal data and envelope waveform data. By multiplying the envelope waveform data, the envelope from the sound generation to the mute is added to the signal data. When the signal data is used as an operator for modulating other signal data, an envelope having a waveform completely different from that in FIG. 6 may be added.

The output of the multiplier 34 is the output mixing circuit 3
7 and the read / write controller 38. The output mixing circuit 37 mixes the input signal data into left and right channels as musical sound data and outputs the mixed signal data to the D / A conversion circuit 16.

When the tone generator LSI 11 (sound generation channel) is used as a tone generator of the waveform memory system,
The voice waveform data is read from the DRAM 13 to form signal data, the envelope is added in the multiplier 34, and the signal is output to the output mixing circuit 37.

On the other hand, when the tone generator LSI 11 is used as an FM tone generator, the signal data (operator) input from the multiplier 34 is written in the internal RAM 39 connected to the read / write controller 38, and this is used as modulation data. To use. The internal RAM 39 has a storage area of 64 words capable of storing 32-channel signal data for 2 sampling timings (2 generations), and the read / write controller 38 stores the signal data input from the multiplier 34 in the internal RAM 39. In addition to writing the data in a predetermined area, the predetermined one or two signal data (designated by the algorithm) is read at the time division timing of the predetermined sound generation channel and input to the averaging circuit 40. Which data to read at each time division timing is
One or two modulation data designation data MDXSL, M stored in the register of each tone generation channel (see FIG. 3)
Specified by DYSL. Read / write controller 3
Reference numeral 8 reads the MDXSL and MDYSL to determine the signal data to be read from the internal RAM 39. In addition,
STIN input to the read / write controller 38
H is data for instructing permission / prohibition of use of the internal RAM 39. If this tone generator LSI 11 is not used as an FM tone generator, it is not necessary to use the internal RAM 39. In this case, therefore, the read / write controller 38 is prohibited from using the internal RAM 39, and this area is set as another work area or the like. To be able to use.

Here, the designation of MDXSL and MDYSL is the designation of an algorithm for forming musical tone data by the FM tone generator system. That is, this MDXSL, MDYS
By associating the pronunciation data of a plurality of pronunciation channels with L, an algorithm as shown in FIG. 4 is constructed.
The averaging circuit 30 is a circuit for calculating an average value of two data when two data are read from the read / write controller 38. As the average calculation, any calculation such as arithmetic average, geometric average, or weighted average of these may be performed. The data averaged by the averaging circuit 30 is input to the adder 31 after being multiplied by the modulation factor data MDL in the coefficient multiplier 31.

For example, in the case of the system of sequentially modulating the phase data (readout frequency) from the tone generation channel 0 to the tone generation channel 3 as shown in FIG.
The signal data of is temporarily stored in the internal RAM 39 and read /
It returns to the adder 31 at the timing of the tone generation channel 1 via the write controller 38. This operation is similarly performed up to the tone generation channel 3, and the signal data of the tone generation channel 3 may be input to the output mixing circuit 37 as tone data.

Further, as shown in FIG. 6B, when the signal data of the tone generation channel 0 and the tone generation channel 1 are added and synthesized (or multiplied and synthesized) and the read frequency of the tone generation channel 2 is modulated by the data, the tone generation is performed. The data of channel 0 and the tone generation channel 1 may both be stored in the internal RAM 39, and these may be read at the time division timing of the tone generation channel 2 and input to the averaging circuit 40.

Further, when the signal data formed by the tone generation channel 0 is fed back to modulate its own read frequency as shown in FIG. 6C, the signal data of the tone generation channel 0 is temporarily stored in the internal RAM 39, Adder 3 is added to the time division timing of the next or subsequent sound generation channel 0.
All you have to do is enter 1.

As described above, in the case of modulating the waveform reading frequency in a certain tone generation channel, the signal data to be the modulation data is stored in the internal RAM 39, and the signal data to be the modulated data is read out. Read this at the timing) and address pointer 3
It may be input to the adder 31 before the second.

FIG. 3 is a block diagram of the internal register 19. Although only the structure of the register of the sound generation channel 0 is shown in the figure, the other 31 sound generation channels (sound generation channel 1 to sound generation channel 31) have exactly the same structure. A register area of 16 bits × 9 columns is assigned to one sounding channel, and the storage areas of various data shown in the description of FIG. 2 are assigned.

In addition, the 11th bit and the 12th bit of the first column
A sound / silence bit KB and an execution bit KX are assigned to the bit. The pronunciation mute bit KB and the execution bit KX are flags for causing a plurality of sounding channels grouped by an algorithm to sound / silence at the same time and for matching the phases of a plurality of signal data (operators).

In order to instruct the sound generation channel 0 to generate sound, various data are written in the sound generation channel 0 register and "1" is set in KB. In the case of sounding only this channel, "1" is set to KX.
On the other hand, if there are channels other than tone generation channel 0 that sound at the same time, set "1" only in KB and set K
X is not set and data is written to the register of another channel. Finally, KX of the register in which the data was written is set. Since each sounding channel starts sounding operation when it is confirmed that any KX is set, the sounding channel in which the data is set starts sounding simultaneously (within one sampling timing) by setting this KX. Will be done.

That is, the tone generator LSI 11 determines whether or not KB is set from the register of the tone generation channel at the operation timing of each tone generation channel, and whether or not KX of the registers of all other tone generation channels is determined. It is configured to judge whether or not. Accordingly, in each tone generation channel, when its own KB is set, and when KX of any tone generation channel including itself is set, the tone generation operation is started at the tone generation timing. At the same time, the KB of its own tone generation channel is reset to "0". Further, when the own KX is set, the KX is reset to the next own time division timing. This gives one KX
The operation of all tone generation channels for which KB has been set at that time can be started within the time division timing of one sampling cycle, and the operation of the tone generation channels thereafter is not affected.

In the above description, only the operation at the start of sounding is explained, but the same is true at the time of muting. That is, when KB is set for a sounding channel being sounded, the sounding channel is muted with KX immediately after that as a trigger.

In the register area, the above-mentioned MD
Storage areas for XSL, MDYSL, STINH and MDL are also set. Among these, an algorithm as an FM sound source is set by setting MDXSL and MDYSL in a plurality of tone generation channels. For example, in FIG.
When setting the algorithm of, sound channel 0
Channels shown in FIG. 7 may be assigned to MDXSL and MDYSL of 3 to 3. That is, when the algorithm of FIG. 4A is set, as shown in FIG. 7A, sound generation channel 0: MDXSL-not specified, MDYSL
-No specification Sound channel 1: MDXSL-ch0, MDYSL
-No designation Sounding channel 0: MDXSL-ch1, MDYSL
-No specification Sound channel 0: MDXSL-ch2, MDYSL
− Not specified. Hereinafter, when the algorithm of FIG. 4 (B) is set, it is set as shown in FIG. 7 (B). When the algorithm of FIG. 4 (C) is set, it is set as shown in FIG. 7 (C). Although the internal memory 39 stores two generations of signal data for the same sound channel, FIG.
The setting table of does not distinguish this. If you want to use data of the same progress, select the signal data immediately before,
When it is desired to use the delayed data, the signal data of one generation before may be selected.

The sound source LSI 11 of the above embodiment has three
Although it has 2 channels of sound generation, if all of them are used as FM sound sources and an algorithm (4 operators) is formed to form one tone data with 4 channels as shown in FIG. can do. Further, it is possible to use a part of the 32 sound generation channels as an FM sound source and another part as a waveform memory sound source. Further, although FIG. 4 shows only the algorithm of four operators, the number of operators is four.
It is not limited to.

Further, in the above embodiment, the modulation data is input to the adder 31 provided between the phase generator 30 and the address pointer 32, but the modulation data is directly input to the address pointer 32 to set the address. You may make it modulate directly.

[0041]

According to the present invention, since the signal data of any tone generation channel can be selected as the modulation data by the modulation data designating means, an arbitrary algorithm can be constructed and an FM sound source with extremely high flexibility can be realized. be able to.

By adding an envelope to the signal data used as the modulation data, the address modulation can be made more complicated.

Further, by using a plurality of signal data as the modulation data and modulating the address for accessing the waveform data storage means, a more complicated algorithm can be constructed.

[Brief description of drawings]

FIG. 1 is a block diagram of a game device in which a sound source LSI according to an embodiment of the present invention is used.

FIG. 2 is a block diagram of the sound source LSI.

FIG. 3 is a diagram showing a configuration of an internal register of the sound source LSI.

FIG. 4 is a diagram showing an example of a musical tone signal forming algorithm used in the sound source LSI.

FIG. 5: ALF formed by a sound source LSI and built-in
The figure which shows the example of the low frequency waveform which FO forms.

FIG. 6 is a diagram showing an example of an envelope waveform formed by an envelope generator incorporated in the sound source LSI.

FIG. 7 is a diagram showing a setting example of MDXSL and DMYSL of the internal register.

[Explanation of symbols]

 31-Adder 36-Envelope Generator 38-Read / Write Controller 39-Internal RAM

Claims (5)

[Claims] 1. Waveform data storage means for storing waveform data, address generating means for generating an address corresponding to a frequency of signal data to be formed, and the waveform data at the address generated by the address generating means. A sound source device comprising a plurality of tone generation channels having a reading means for accessing the storage means and reading the waveform data to form signal data, and externally outputting the signal data formed by any one of the tone generation channels as tone data. A signal data temporary storage means for sequentially storing signal data generated by the plurality of sound generation channels in the plurality of sound generation channels, and a modulation data designating means for designating signal data to be read as modulation data from the signal data temporary storage means. And the signal data designated by the modulation data designating means An address displacement for displacing an address to be generated by using modulation data input means for reading out from the signal data temporary storage means and inputting to the address generation means, using the signal data input as the modulation data to the address generation means. A sound source device comprising means. 2. The address generating means comprises phase data generating means for generating phase data by accumulating numerical data corresponding to the frequency of signal data to be formed, and means for generating an address according to the phase data. The address displacement means is an addition means for adding the signal data read from the signal data temporary storage means to the phase data generated by the phase data generation means. 3. Envelope data generating means for generating envelope data defining the amplitude characteristic of the signal data for each tone generation channel, and envelope applying means for imparting the envelope data generated by the envelope data generating means to the signal data. 2. The sound source device according to claim 1, further comprising: the signal data temporary storage means for storing the signal data to which the envelope data is added by the envelope adding means. 4. The modulation data designating means is means for designating a plurality of signal data, and the address displacing means uses the plurality of signal data read from the signal data temporary storage means. The sound source device according to claim 1, which is means for displacing an address. 5. The sound source device according to claim 1, wherein the plurality of sound generation channels are time division channels.