JPH0724808Y2 - Automatic gain control circuit - Google Patents

Description

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an automatic gain control circuit, and more particularly to an automatic gain control circuit that adjusts an input signal level by a control signal generated according to an output signal level.

2. Description of the Related Art In a video intermediate frequency amplification stage (PIF amplification stage) of a television, it is necessary to always obtain a constant detection level with respect to changes in the input signal. For this reason, automatic gain control (AGC) circuits are used.

Conventionally, such an automatic gain control circuit has a circuit configuration as shown in FIG.

As shown in FIG. 4, the transistor Q ₁ is controlled by the control signal input to the control terminal 3 to control the forward current to the PIN diode D ₁ . By controlling the degree of the high frequency resistance value of the PIN diodes D ₁ and D ₂ with this forward current, the attenuation amount of the input signal input to the input terminal 1 is changed, and the level of the output signal output from the output terminal 2 is changed. Was held constant.

Since the current is controlled according to the control signal as it is, the characteristic of the attenuation amount with respect to the conventional control signal, the PIN diode D
Due to the characteristics of ₁ and D ₂ , it had the characteristics shown in FIG.

However, since the conventional automatic gain control circuit controls the amount of attenuation by controlling the forward current of the PIN diode D _{1 with} a transistor, the characteristic of the amount of attenuation with respect to the control signal is shown in FIG. The characteristics are as shown in (3), and the amount of attenuation changes greatly with a slight change in the control signal, so that it is difficult to control and stable output cannot be obtained.

The present invention has been made in view of the above points, and an object of the present invention is to provide an automatic gain control circuit in which the amount of attenuation can be easily controlled and a stable output can be obtained.

Means for Solving the Problems According to the present invention, the input signal level is controlled by controlling the forward current of the rectifying element by a control signal whose level changes according to the output signal level, and the output signal level is held constant. In the automatic gain control circuit, the first gate is supplied with the control signal, the second gate is supplied with a bias voltage, and a dual-gate field effect for controlling the forward current of the rectifying element according to the control signal is provided. A transistor, and the second of the dual gate field effect transistor.
A voltage dividing resistor connected to the gate of the dual gate type field effect transistor for adjusting the bias voltage to a voltage at which the characteristic of the attenuation amount of the input signal with respect to the control signal approximates a linear characteristic.
And a feedback circuit that feeds back to the gate of.

According to the present invention, the forward current flowing through the rectifying device is supplied with the feedback signal through the control signal and the feedback circuit to the first gate, and the bias voltage is input to the second gate through the voltage dividing resistor for the control signal. Since the characteristics of the signal attenuation amount are controlled by the dual-gate field effect transistor that is adjusted and supplied so as to approximate the linear characteristics, the attenuation amount of the input signal can be changed linearly with respect to the control signal. it can.

Further, the characteristic of the attenuation amount can be adjusted by the voltage dividing resistor, so that it can be easily and freely performed.

Embodiment FIG. 1 shows a circuit configuration diagram of an embodiment of the present invention.

A high frequency input signal is input to the input terminal 1 and an output terminal 2
The output signal is output. The input terminal 1 is a gain control PIN diode D via a DC component removing capacitor C _1.
The output terminal 2 is connected to the cathode of ₁ and the gain control PIN diode D ₁ is connected via the capacitor C ₂ for removing the DC component.
Connected to the anode of. 2 Gate FET 4 and resistors R ₆ and R ₇
The control circuit 7 is constituted by.

At the connection point between the capacitor C ₂ and the PIN diode D ₁ , there are 2 gates to control the forward bias to the PIN diode D ₁ .
The source of FET (field effect transistor) 4 is connected through a choke coil L ₁ for signal cutting.

The drain of the 2-gate FET 4 is connected to the bias terminal 5. The gate G ₁ is connected to the control terminal 3 via the resistor R ₅ , and the feedback circuit 6 is connected to the cathode of the PIN diode D ₁ . Further, a divided voltage obtained by dividing the voltage applied to the bias terminal 5 by the resistors R ₆ and R ₇ is applied to the other gate G ₂ .

The feedback circuit 6 is a circuit in which a coil L ₂ for removing a high frequency signal and a resistor R ₂ are connected in series, and the feedback is applied to the gate G ₁ of the 2-gate FET 4.

The cathode of the PIN diode D ₁ is grounded via the resistor R ₁ and also grounded via the PIN diode D ₂ and the capacitor C ₃ which are connected in series.

The cathode of the PIN diode D ₂ is connected to the cathode side of the PIN diode D ₁ , and the divided voltage obtained by dividing the voltage applied to the bias terminal 5 by the resistors R ₃ and R ₄ is applied to the anode thereof. .

Next, the operation of the circuit will be described. First, when a control signal is applied to the control terminal 3, a voltage is applied to the gate G ₁ of the FET 4. Then, the drain-source of FET4 is turned on. FE
T4 is the voltage applied to the resistor R ₁ via a choke coil L ₁ when turned on a forward current flows to the PIN diode D _1.
Therefore, the resistance value of the PIN diode D ₁ becomes small, and the input signal input from the input terminal 1 passes through the PIN diode D ₁ and is output from the output terminal 2.

Further, when the control signal level decreases, the drain current of FET4 decreases. Therefore, the voltage applied to the resistor T ₁ becomes low, the PIN diode D ₁ approaches the OFF side, and the resistance value of the PIN diode D ₂ becomes smaller.Therefore, the input signal is the signal passing through the PIN diode D _1. Decrease and PIN
The signal grounded through the diode D ₂ increases, and the amplitude of the output signal decreases.

At this time, the voltage corresponding to the voltage applied to the resistor R ₁ is fed back to the gate G ₁ of the FET 4 via the feedback circuit 6, and
Since the divided voltage divided by the resistors R ₆ and R ₇ is applied to the gate G ₂ of the FET 4, the characteristic of the change in the attenuation amount with respect to the AGC voltage becomes gentle.

FIG. 3 shows a circuit diagram of another embodiment of the present invention.

This embodiment of the PIN diode D _3, D _4, D ₅ is a rectifying element π
With the configuration arranged in a mold, the same components as those in FIG. 1 are designated by the same reference numerals. Capacitors C _{4 to} C ₅ cut DC components, and choke coils L _{3 to} L ₅ cut high frequency components. Also it is adjusted the voltage applied to the PIN diode D ₃ to D ₆ by the resistor R ₈ to R _11.

Next, the operation will be described. When the control signal to the control terminal 3 is applied, a voltage is applied to the gate G1 of the FET 4, a current flows in the FET 4, PIN diode D ₄ via the choke coil L ₃
A forward current flows through. In addition, a voltage is applied to the resistor R ₉ via the feedback resistor R ₈ and the PIN is applied via the choke coil L _4.
Reverse voltage is applied to the diodes D ₄ and D ₅ .

At this time, since the PIN diode D ₄ bias voltage to the forward voltage is increased and the resistor R _8, R ₉ are set, the resistance value of the PIN diode D ₄ becomes small. At this time, the values of the resistors R ₁₀ and R ₁₁ are set so that the resistance values of the PIN diodes D ₃ and D ₅ become large. Therefore, the input signal input from the input terminal 1 is output from the output terminal 2 via the PIN diode D ₄ .

Next, when the control signal decreases, the voltage applied to the resistor R ₉ also decreases, and the forward voltage is applied to the PIN diodes D ₃ and D ₆ ,
The resistance value becomes small. Therefore, the input signal input from the input terminal 1 flows to the ground from the capacitors C ₅ and C ₆ through the PIN diodes D ₃ and D ₅ , and the output from the output terminal 2 becomes small.

By changing the resistance values of the PIN diodes D _{3 to} D ₅ which are the rectifying elements while feedback is applied in this way, the same smooth characteristics as the embodiment shown in FIG. 1 as shown by the solid line in FIG. 2 are obtained. be able to.

EFFECTS OF THE INVENTION As described above, according to the present invention, the forward current flowing through the rectifying element is supplied with the feedback signal through the control signal and the feedback circuit to the first gate, and the second gate is biased by the voltage dividing resistor. Since the voltage is controlled by the dual gate type field effect transistor that is adjusted and supplied so that the characteristic of the attenuation of the input signal with respect to the control signal approximates a linear characteristic, the amount of attenuation of the input signal with respect to the control signal is controlled. Since it can be changed linearly, and the characteristic of the attenuation amount can be adjusted by a voltage dividing resistor, it has an advantage that it can be easily and freely performed.

[Brief description of drawings]

FIG. 1 is a circuit diagram of one embodiment of the present invention, FIG. 2 is a characteristic diagram of one embodiment of the present invention, FIG. 3 is a circuit diagram of another embodiment of the present invention, and FIG. FIG. 5 is a characteristic diagram of a conventional example. 1 ... input terminal, 2 ... output terminal, 3 ... control terminal, 4
...... 2 gate FET, 5 …… bias terminal, 6 …… feedback circuit.

Claims (1)

[Scope of utility model registration request] 1. An automatic gain for controlling an amount of attenuation of an input signal by controlling a forward current of a rectifying element by a control signal whose level changes according to an output signal level to keep the output signal level constant. In the control circuit, a dual gate type field effect transistor is provided in which the control signal is supplied to a first gate, a bias voltage is supplied to a second gate, and a forward current of the rectifying element is controlled according to the control signal. The second of the dual gate field effect transistor
A voltage dividing resistor connected to the gate of the dual gate type field effect transistor for adjusting the bias voltage to a voltage at which the characteristic of the attenuation amount of the input signal with respect to the control signal approximates a linear characteristic.
Automatic gain control circuit comprising a feedback circuit that feeds back to the gate of the.