JPH01300608A - Amplifier circuit - Google Patents

Abstract

PURPOSE:To prevent the dispersion in a gain control range by adding a resistor in series and in parallel with a channel resistor of a field effect transistor(TR) and limiting the range of change in the combined resistance. CONSTITUTION:The amplifier consists of a coupling capacitor 1, bias resistors 2, 3, a TR 4, a field effect TR 8 and resistors 6, 7 and the gain depends on ratio of a resistor 5 and a combined resistance comprising of a channel resistance of the field effect TR 8 and the resistors 6, 7. That is, if the channel resistor of the field effect TR 8 is decreased by a gate voltage, the combined resistance depends on the series resistor 6 to be added mainly and since the combined resistance depends on the parallel resistor 7 added mainly when the channel resistance is increased, the gate voltage is controlled to apply the gain control. Thus, the lower limit and the upper limit of the gain control range are set and the dispersion in the gain control range is reduced.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to an amplifier circuit suitable for equipment that controls the gain of a signal using a DC control voltage.
N ELECTRONIC (JRCUITS RgoER
ENCE MANUAL: As described in P. 77, a junction field effect transistor is connected to the emitter terminal of the amplification transistor, and the value of the channel resistance determined by the DC control voltage applied to the gate and the collector resistance of the amplification transistor are determined. This was an amplifier circuit whose amplification degree of the input signal was determined by the ratio of the input signal to the input signal.

[Problem to be solved by the invention]

The above conventional technology controls the gain by controlling the value of the channel resistance of the field effect transistor using the gate voltage, but due to the variation in the change range of the channel resistance value, the gain control range varies. There were problems that arose.

An object of the present invention is to provide an amplifier circuit that can set upper and lower limits of a gain control range using a gain control circuit using field effect transistors.

[Means to solve the problem]

The above object is achieved by adding resistances in series and parallel to the channel resistance of the field effect transistor, thereby limiting the range of change in the combined resistance value of Nanatsu et al.

[Effect]

When the channel resistance of a field effect transistor becomes small due to the gate voltage, the combined resistance value is determined mainly by the added series resistance, and when the channel resistance becomes small, the combined resistance value is determined mainly by the added parallel resistance. The combined resistance value is determined. By this, when controlling the gate voltage and controlling the gain, it is possible to set the upper and lower limits of the gain control range, and it is possible to reduce variations in the gain control range.

〔Example〕

An embodiment of the present invention will be explained below with reference to FIG.

The amplifier circuit consists of a coupling capacitor 1, bias resistors 2 and 3
, ) run lister 4, field effect transistor 8 (here, the case of an enhanced type N-channel MO8 type field effect transistor is shown as an example), and resistor 6.7. effect transistor 8
It is determined by the ratio of the channel resistance of 6.7 and the combined resistance of 6.7.

Therefore, by controlling the gate pressure of the field effect transistor 8 and varying the channel resistance, the gain can be variably controlled. Here, the value of resistor 6 is set so that the value when the channel resistance becomes the minimum can be ignored, and the value of resistor 7 is set so that when the channel resistance becomes the maximum, the combined resistance value is determined by resistor 7. Set to . As a result, the channel resistance of the field effect transistor 8 and the resistance 6.
Since the variable range of the combined resistance is determined by 7 (the upper limit is determined by resistor 7 and the lower limit is determined by resistors 6 and 7), variations in the gain control range can be suppressed.

A second embodiment of the present invention will be explained with reference to FIG.

2 is the same as the embodiment shown in FIG. 1 except for the way in which the resistor 7 is connected to the embodiment shown in FIG. 1.

The value of the resistor 6 is set to such a value that the value when the channel resistance is the minimum can be ignored, and the value of the resistor 7 is set to a value that can be ignored when the channel resistance is the maximum. As a result, the variable range of the combined resistance of the channel resistance and resistor 6.7 is determined (the upper limit is determined by resistors 6 and 7, and the lower limit is determined by resistor 6), and it is possible to suppress variations in the gain control range. can.

〔Effect of the invention〕

According to the present invention, gain control with less variation in the gain control range of the amplifier circuit can be realized, and distortion-free amplification can be performed.

[Brief explanation of the drawing]

FIG. 1 and FIG. 2 are diagrams each showing an embodiment of the present invention. 4...Transistor, 8...Field effect transistor

Claims (1)

[Claims] 1. An amplifier circuit that controls gain by controlling a channel resistance value of a field effect transistor, characterized in that the amplifier circuit is provided with a resistor that limits a lower limit value and an upper limit value of the gain.