JPH07244614A - Memory access system - Google Patents

Abstract

PURPOSE:To provide the memory access system which can hold data even when the power source is turned OFF and also enables fast access. CONSTITUTION:A volatile memory 2 has enough capacity to store the protection data 11 in a nonvolatile memory 1 and a transfer means 3 transfers the protection data 11 to the nonvolatile memory when the power source is turned ON. Then a request to read the protection data is made by a processor or other devices to the volatile memory 2. In a buffer 6 provided so as to speed up writing to the nonvolatile memory 1, data can be written faster than in the nonvolatile memory 1, and alteration data 4 written in the nonvolatile memory 1 can temporarily be stored. A writing means 5 when altering the protection data writes the alteration data 4 in the volatile memory 2 and also writes the data in the nonvolatile memory 1 as well through the buffer 6. Consequently, the protection data 21 in the volatile memory 2 can be accessed fast and when the power source is OFF, the protection data 11 are held in the nonvolatile memory 1.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a memory access method for a data processing device having a non-volatile memory for holding various data by a battery, and more particularly to a memory access method for improving the access speed to the non-volatile memory.

[0002]

2. Description of the Related Art Conventionally, numerical control devices have various memories for storing data. The data stored in the numerical control device includes, in addition to the system control program, various parameters, tool data, machine movement records, and other data used for a long period of time. Such data needs to be retained even when the power is turned off.
(Hereinafter, these data to be held are referred to as protected data.) Therefore, as a memory for storing the protected data, a non-volatile memory backed up by a battery is used. The protected data stored in the non-volatile memory is rewritten and updated every time the data is changed. (Hereinafter, non-volatile memory refers to non-volatile memory backed up by a battery.) It is not only the processor of the numerical control device that writes the protected data in this non-volatile memory, but it is connected to the numerical control device. Programmable controller (PC)
In some cases, an external device such as a bus master may write data. The memory controller controls which device is allowed to write.

In some cases, the protected data in the non-volatile memory is transferred to the volatile memory at the same time when the power is turned on, and the volatile memory is accessed.

[0004]

However, the access speed of the non-volatile memory is generally about 85 ns to 100 ns. On the other hand, the processing speed of one cycle of the processor of the numerical control device is 30 ns or more.
Thus, the access speed of the non-volatile memory is very low. Therefore, when the processor accesses the nonvolatile memory, the processor is kept waiting until the access is completed. As a result, the slow access speed of the non-volatile memory hinders an increase in the processing speed of the entire device.

Further, when the processor of the numerical controller and the programmable controller (PC) simultaneously issue access requests to the nonvolatile memory, while one is accessing, the other cannot access the nonvolatile memory. I will be kept waiting.

As the processing speed of the processor becomes faster, the difference between the processing speed of the processor and the access speed of the non-volatile memory is getting wider. Further, since the numerical control device is highly functional and various kinds of external devices access the non-volatile memory, collisions of access requests are frequently occurring. Therefore, there is a strong demand for speeding up of the non-volatile memory with the speeding up of the processor and the sophistication of the numerical controller.

There is a non-volatile memory which can be accessed at high speed, but it is very expensive. The volatile memory can be accessed in 20 to 30 ns by using the fast page mode. If the protected data in the nonvolatile memory is transferred to the volatile memory and the volatile memory is accessed, High-speed access is possible, but in this case the data will be destroyed in the event of an accident such as a power failure.

As described above, there is a problem in that an inexpensive nonvolatile memory that can retain data even in the case of an accident cannot be accessed at high speed. The present invention has been made in view of the above points, and an object of the present invention is to provide a memory access method capable of retaining data even when the power is turned off and enabling high-speed access.

[0009]

In order to solve the above-mentioned problems, the present invention stores a protected data in a memory access system of a data processing device having a non-volatile memory for holding various data by a battery, Volatile memory that can be accessed faster than a non-volatile memory, transfer means that transfers the protection data to the volatile memory when power is turned on, and data can be written at a higher speed than the non-volatile memory. A buffer capable of temporarily storing change data for changing, and a writing unit that writes the change data in the volatile memory and also writes the change data in the nonvolatile memory via the buffer. A memory access method is provided.

[0010]

When the power is turned on, the transfer means transfers the protected data to the volatile memory. Then, the volatile memory outputs the protected data when there is a read request for the protected data from the processor or another device.

The buffer provided for speeding up the writing to the non-volatile memory can write the data faster than the non-volatile memory, and can temporarily store the change data to be written in the non-volatile memory. .

The writing means writes the changed data to the volatile memory when changing the protected data, and
It also writes to the non-volatile memory via the buffer. This gives you fast access to protected data,
The protected data in the volatile memory and the protected data in the non-volatile memory are kept the same.

[0013]

Embodiments of the present invention will be described below with reference to the drawings. FIG. 1 is a block diagram showing a schematic configuration of the present invention. The non-volatile memory 1 is backed up by a battery, and the protected data 11 is stored therein. The protection data 11 is data used for a long time such as various parameters, tool data, machine movement record, and the like.

The volatile memory 2 can be accessed at a higher speed than the non-volatile memory 1 and has a storage capacity enough to store the protected data 11. Then, the transfer means 3 transfers the protected data 11 to the volatile memory 2. The transfer means 3 may be provided with a controller that is executed by a processor as needed or automatically transferred when the power is turned on.

After that, while the power is on, the volatile memory 2 stores the transferred protected data 21,
Access request from processor and DM from other device
An access request such as A (direct memory access) accesses the protected data 21 in the volatile memory 2. The volatile memory 2 can also be used as a work area when the processor processes various data. That is, a part of the volatile memory 2 is protected by the protected data 21.
Other storage areas can be used for general purpose to temporarily store various data, input / output signals, and the like.

Now, the protected data 21 is stored in the volatile memory 2
Can be read at high speed. When the change data 4 for rewriting the protected data 11 and 21 is sent, the writing means 5 rewrites the corresponding portion of the volatile memory 2 and also the nonvolatile memory 1 via the buffer 6.
Also write. This writing means 5 is executed by a memory controller described later. At this time, the nonvolatile memory 1
Protected data 11 inside and protected data 2 inside volatile memory 2
By arranging 1 and 1 in the same memory address space, the writing of the change data 4 can be facilitated.

The buffer 6 has a temporary storage area in which data can be written and read at a higher speed than the nonvolatile memory 1. The change data 4 sent from the processor or another device is written into the buffer 6 at high speed, and a write end signal is output. This allows the processor or other device to immediately shift execution to the next instruction.
Then, the change data 61 stored in the buffer 6 is
The writing means 5 writes the data in the nonvolatile memory 1 in accordance with the access speed of the nonvolatile memory 1.

This enables high-speed writing, and the protected data 11 in the non-volatile memory 1 and the protected data 21 in the volatile memory 2 are always kept the same. FIG. 2 is a schematic configuration diagram of a numerical controller for carrying out the present invention. The processor 70 controls the entire numerical controller. The non-volatile memory 1 is a memory using CMOS (complementary metal oxide semiconductor) and is backed up by a battery 73. It also stores various parameters, tool data, pitch error correction data, and other protection data used for a long period of time. The input to the non-volatile memory 1 is input via the write buffer 6a, and the change data written in the non-volatile memory 1 is written into the non-volatile memory 1 at high speed and temporarily stored therein. The stored change data is written in the non-volatile memory 1 according to the loading speed of the non-volatile memory 1.

The volatile memory 2 uses DRAM (dynamic RAM) or SRAM (static RAM) and has a larger storage capacity than the non-volatile memory 1. The volatile memory 2 is used as temporary data such as an input / output signal and stores the protected data in the nonvolatile memory 1.

The memory controller 71 manages input / output of the nonvolatile memory 1 and the volatile memory 2. When the processor 70 issues an instruction to transfer the protected data in the nonvolatile memory 1 to the volatile memory 2 when the power is turned on, the protected data is transferred. When the write command from the processor to the volatile memory 2 is to rewrite the protected data, the changed data is written in the volatile memory 2 and the write buffer 6a in parallel.

This numerical controller is provided with a PMC (Programmable Machine Controller) 74, which is connected to a processor 70, a memory and the like via a bus 76. The PMC 74 receives a T function signal (tool selection command) or the like via the bus 76, processes this signal with a sequence program, and outputs a signal as an operation command.
Control machine tools.

The PMC 74 can be a bus master of the bus 76. While being the bus master, the bus 76 can be controlled, and the volatile memory 2 and the non-volatile memory 1 can be accessed without going through the processor. The memory controller 71 manages which device is permitted to access the memory.

As described above, in terms of hardware, since it is only necessary to additionally provide the write buffer 6a in the conventional numerical control device, the present invention can be implemented easily and at low cost.

FIG. 3 is a block diagram for explaining the write operation of the write buffer. This block diagram shows a processor 70 that outputs changed data to the write buffer 6a,
After storing the received data once, the nonvolatile memory 1
Write buffer 6a for outputting to
Non-volatile memory 1 for storing change data output from
And a memory controller 71 that controls these operations. The write buffer 6a uses a memory capable of writing data at a speed equal to or higher than that of the volatile memory 2 (shown in FIG. 1). For example, DRAM (dynamic RAM) or SRAM
(Static RAM) is used. One area divided in the write buffer 6a in the figure is 1 byte,
Four 4-byte data can be stored in the write buffer 6a. The shaded area is the area in which the modified data 4a and 4b are already stored, and the blank area is the empty area 62.

When a change data write request is issued from the processor 70, the memory controller 71 confirms that there is a free area 62 in the write buffer 6a and informs the processor 70 that writing is possible. Then, the processor 70 performs writing. At this time, writing is also performed in parallel to the volatile memory 2 (not shown) (shown in FIG. 1). The processor 70 executes the next instruction as soon as the writing to the write buffer 6a is completed.

Change data 4a, 4 in the write buffer 6a
When b is stored, the memory controller 71 sequentially writes the change data 4a and 4b in the nonvolatile memory 1.

In this way, the processor 70 can output the modified data at high speed and execute the next instruction,
Change data 4a, 4b stored in the write buffer 6a
Can be stored in the non-volatile memory 1 according to the writing speed of the non-volatile memory 1.

In the case where the processor 70 is designed to output four 4-byte data each, the write buffer 6a waits for an empty area of 4 bytes × 4 and outputs the changed data.

FIG. 4 is a schematic configuration diagram of a numerical controller for implementing the present invention with one IC (integrated circuit). In this figure, a big difference from the numerical controller of FIG. 2 is that a write buffer 6a is provided between the non-volatile memory 1 and the volatile memory 2, and these write buffers 6a are one IC.
It is composed within 76. Further, an internal memory controller 71a for managing data transfer is provided inside the IC 76.

In the IC 76, the internal memory controller 71a transfers the protected data in the nonvolatile memory 1 to the volatile memory 2 when the power is turned on. Furthermore, as soon as the protected data stored in the volatile memory 2 is changed, the changed data is written in the write buffer 6a.
Then, the changed data is written in the nonvolatile memory 1 according to the speed of the nonvolatile memory 1. The nonvolatile memory 1 is backed up by the battery 73.

When the processor 70 issues a write request to the protected data in the volatile memory 2, the memory controller 71 writes to the volatile memory 2. The same applies when the PMC 74 controlling the machine tool 75 changes the protection data in the volatile memory 2 via the bus 76.

In this way, the transfer of the protected data to the volatile memory 2 and the transfer of the changed data to the non-volatile memory 1 when the power is turned on can be carried out only inside the IC 76. Therefore, it can be handled as a normal volatile memory from the processor 70 and the PMC 74, can be accessed at high speed, and the protected data is retained in the nonvolatile memory 1 even when the power is turned off.

Therefore, by changing the volatile memory of the conventional numerical control device to the IC 76 of the present invention, it is not necessary to change other devices and programs, and data can be easily retained even when the power is turned off and high speed access is possible. The memory can be configured.

In the description of FIG. 4, the write buffer 6a is provided between the volatile memory 2 and the non-volatile memory 1. However, as shown in FIG. 2, the processor 70 can directly write to the write buffer 6a. , Can be provided in one IC. In this case, the internal memory controller is provided on the input side of the volatile memory 2 and
The data input to the non-volatile memory 1 is managed in parallel with the input of change data.

Further, although the above description has been made assuming a numerical controller, the present invention can be similarly implemented in a programmable controller, a robot controller, and a computer used for general purposes.

[0036]

As described above, according to the present invention, when the power is turned on, the protection data is transferred to the volatile memory, the protection data is read to the volatile memory, and the change data is written to the volatile memory. Do with non-volatile memory,
Since the writing to the non-volatile memory at that time is configured to be performed at high speed through the buffer, the protected data can be retained even when the power is turned off, and the protected data can be accessed at high speed.

[Brief description of drawings]

FIG. 1 is a block diagram showing a schematic configuration of the present invention.

FIG. 2 is a schematic configuration diagram of a numerical control device for carrying out the present invention.

FIG. 3 is a block diagram illustrating a write operation of a write buffer.

FIG. 4 is a schematic configuration diagram of a numerical controller for implementing the present invention with one IC (integrated circuit).

[Explanation of symbols]

 1 non-volatile memory 2 volatile memory 3 transfer means 4, 61 change data 5 writing means 6 buffers 11, 21 protected data

Claims (4)

[Claims] 1. A memory access method for a data processing device comprising a non-volatile memory for holding various data by means of a battery, a volatile memory storing protected data, which can be accessed at a higher speed than the non-volatile memory, and power-on. Transfer means for sometimes transferring the protection data to the volatile memory, a buffer capable of writing data faster than the non-volatile memory, and temporarily storing change data for changing the protection data, A memory access method comprising: writing the modified data in the volatile memory and also writing the modified data in the nonvolatile memory via the buffer. 2. The non-volatile memory, the volatile memory, the transfer means, the buffer, and the writing means are integrated into one IC (integrated circuit). Memory access method described. 3. The memory access method according to claim 1, wherein the data processing device is a numerical control device. 4. The memory access method according to claim 1, wherein the data processing device is a programmable controller.