JPH07244472A - Picture display and processing device - Google Patents

Abstract

PURPOSE:To reduce required memory capacity by providing a 1 line data stor age section as a time axis absorbing buffer of one line and a timing generator section between an external output section and a display data storage section storing data of one line. CONSTITUTION:A picture display processing device having a conventional hard copy function has memories of each one plane for display and hard copy as its constitution. However, in this device, after one line data storage section 4 temporarily stores data of one line out of picture data sent out from a display data storing section 1, sends out successively data to an external output section 5. Also a timing generator section 66 sends out an address signal and a control signal in parallel with the one line data storage section 4 and the display data storage section 1, while sends out a dot clock to a D/A converter 2, and sends out horizontal/vertical synchronizing signals to a display section 3 and synchronization is performed. Therefore, memory capacity per data quantity to be processed can be largely reduced.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an image display processing device having a hard copy function by providing a time axis absorption buffer for one line for ensuring the time consistency between the image processing system and the display system. The present invention relates to an image display processing device capable of significantly reducing the amount of memory used for functions.

[0002]

2. Description of the Related Art In recent years, with the advent of the information age, there has been an increasing interest in image data processing systems for high-speed processing of image data as the capacity of media increases. FIG. 3 is a schematic diagram of a conventional image display processing device. Now, in the conventional image display processing apparatus that performs hard copy processing, as shown in FIG. 3, since the image processing system A and the display system B are asynchronous with each other, apart from the display memory C for one plane,
Further, by owning the hard copy memory D for one plane for hard copy, time consistency between the image processing system A and the display system B is achieved.

[0003]

That is, in the configuration of the conventional image display processing apparatus described above, the display system B needs the display memory C for one plane as an area for always performing the read processing in order to display the display. Yes, image processing system A
However, when performing the hard copy process, the hard copy memory D for one plane is required as an area for sequentially reading the image data currently displayed. As described above, the conventional technique has a problem in that the required memory capacity is large.

Therefore, an object of the present invention is to provide an image display processing device which can reduce the required memory capacity.

[0005]

SUMMARY OF THE INVENTION The present invention is directed to a display data storage unit that stores digital data of a display image, and analog data while sequentially converting image data sent from the display data storage unit into analog data. D / A conversion unit for transmitting the data, a display unit for displaying image data based on the analog data transmitted from the D / A conversion unit, and an external output unit for outputting or storing the data to an external printer or disk. And a one-line data storage unit that temporarily stores data for one line from the image data sent from the display data storage unit, and then sequentially sends the data to an external output unit, a one-line data storage unit, and display data. An address signal and a control signal are sent to the storage unit, a dot clock is sent to the D / A conversion unit, and Hsyn is sent to the display unit. / Vsync signal for synchronization to generate a timing generator section, a 1-line data storage section, a system control section for controlling the external output section and the timing generator section, and a hardware for sending a hard copy processing start signal to the system control section. A copy instruction unit is provided.

[0006]

In the above structure, a one-line data storage unit and a timing generator unit as a time-axis absorption buffer for one line are provided between the external output unit and the display data storage unit for storing data for one plane. As a result, it is possible to significantly reduce the memory amount per data amount to be handled, as compared with the conventional technique in which the hard copy memory for one plane connected to the image processing system is provided.

[0007]

Embodiments of the present invention will now be described with reference to the drawings. FIG. 1 is a functional block diagram of an image display processing apparatus according to an embodiment of the present invention. Reference numeral 1 denotes a display memory which stores digital data of an image currently being displayed and which is stored in the display memory. The display data storage unit 2 for sending the completed image data to the D / A conversion unit 2 or the 1-line data storage unit 4 according to the address signal and the control signal sent from the timing generator unit 6 to be described later, the display data storage unit 1 The D / A conversion unit 3 which synchronizes the image data sent from the unit with the dot clock sent from the timing generator unit 6 and sends the analog data to the display unit 3 while sequentially converting the analog data to the display unit 3, etc. And the analog data sent from the D / A conversion unit 2 and the analog data sent from the timing generator unit 6. A display unit 4 for displaying image data on a display or the like based on an incoming Hsync (horizontal sync) / Vsync (vertical sync) signal is used to display one line of data from the image data sent from the display data storage unit 1. A one-line data storage unit that temporarily stores data based on the address signal and control signal sent from the timing generator unit 6 and then sequentially sends one line of data to the external output unit 5 via the system control unit 7. The 1-line data storage unit 4 functions as a time axis absorption buffer by receiving a signal from the timing generator unit 6 and operating. Reference numeral 5 is an external output unit such as an interface for outputting or storing the data for one line sent from the one-line data storage unit 4 to an external printer or disk via the system control unit 7, and 6 is a one-line data storage unit. 4 and the display data storage unit 1, the address signal (ROW address / COL address) and the control signal are sent, the dot clock is sent to the D / A conversion unit 2, and the Hsync / Vsync signal is sent to the display unit 3. A timing generator unit for sending, a system control unit 7 for controlling the 1-line data storage unit 4, the external output unit 5, and the timing generator unit 6, and a hard copy instruction for sending a signal for starting the hard copy process to the system control unit 7. It is a department.

FIG. 2 is a flow chart of the image display processing apparatus in one embodiment of the present invention. The operation of the image display processing apparatus of the present embodiment configured as above will be described below with reference to FIG. . First, in step 1, the system control unit 7 instructs the timing generator unit 6 to start displaying. Upon receiving the instruction, the timing generator section 6 sends an address signal (ROW address / COL address) and a control signal to the display data storage section 1, and the D / A conversion section 2 receives a dot clock,
Transmission of the Hsync / Vsync signal or the like to the display unit 3 is started. Therefore, the D / A converter 2 converts the image data output from the display data storage 1 into digital data into analog data in synchronization with the dot clock, and outputs the analog data to the display 3. In addition, the display unit 3 is a D / A
The analog data converted by the converter 2 is converted to Hsync / V
It is displayed on the display based on the sync signal of sync.

Next, in step 2, the hard copy instruction section 8
Instructs the system control unit 7 to start the hard copy process. Upon receiving the instruction, the system control unit 7 sends a hard copy processing start signal to the timing generator unit 6.

Next, at step 3, the timing generator section 6 which receives the hard copy processing start signal from the system control section 7 continues the processing of step 1 and uses the next Vsync signal as a trigger to display. The line address (ROW) being sent to the data storage unit 1
Address signal). Then, when the line address reaches the address '0', the address signal and the control signal (read / read / read / read) considering the synchronization with the display data storage unit 1 are read.
(Write / chip select signal) is sent to the 1-line data storage unit 4 so that the process of step 1 is continued and the line address of the display data storage unit 1 is'
Information of the 0'address area is stored in the 1-line data storage unit 4. Then, the storage processing end signal to the one-line data storage unit 4 is sent to the system control unit 7. This read line address is "0" → "whenever step 3 is executed.
The address is incremented by 1 such as 1 '→' 2 '→' 3 '. For example, in the case of using a display of 640 * 480 (dots), when the read line address reaches the address 479, the hard copy is completed.

Next, in step 4, the system control section 7 receiving the processing end signal sequentially transfers the image data stored in the one-line data storage section 4 in consideration of synchronization with the external output section 5. Go. There is no restriction on the elapsed time in step 4, and the process of step 1 is still continued. The process ends when all the stored data for one line is transferred to the printer, the disk, and the like.

Next, in step 5, when the system control section 7 finishes the processing of step 4, the 1-line data storage section 4 outputs to the external output section 5 via this system control section 7.
It is judged whether or not the number of times of completion of the data transfer processing for one line to 1 plane has been completed. As a result, when it is determined that the number of times is insufficient, the process is performed in step 3
If it is determined that the process has been reached, the process ends.

[0013]

According to the present invention, a display data storage unit that stores digital data of a display image and image data sent from the display data storage unit are sequentially converted into analog data while sending analog data. / A conversion unit, a display unit that displays image data based on analog data sent from the D / A conversion unit, an external output unit that outputs or stores the data to an external printer or disk, and display data. A one-line data storage unit that temporarily stores data for one line from the image data sent from the storage unit and then sequentially sends the data to an external output unit;
An address signal and a control signal are sent to the line data storage unit and the display data storage unit, respectively, and D /
The dot clock is sent to the A converter, and Hs is displayed on the display.
A timing generator section for sending and synchronizing the sync / Vsync signal, a system control section for controlling the 1-line data storage section, the external output section and the timing generator section, and a signal for starting a hard copy process to the system control section. Since the hard copy instructing unit is provided, it is possible to significantly reduce the memory amount per data to be handled as compared with the conventional image display processing device. Further, the memory amount can be more effectively reduced as the data amount of one pixel increases, such as black and white → pseudo color → full color.

[Brief description of drawings]

FIG. 1 is a functional block diagram of an image display processing apparatus according to an embodiment of the present invention.

FIG. 2 is a flowchart of an image display processing device according to an embodiment of the present invention.

FIG. 3 is a schematic diagram of a conventional image display processing device.

[Explanation of symbols]

 1 Display Data Storage Section 2 D / A Conversion Section 3 Display Section 4 1 Line Data Storage Section 5 External Output Section 6 Timing Generator Section 7 System Control Section 8 Hardcopy Instruction Section

Claims (1)

[Claims] 1. A display data storage unit storing digital data of a display image, and D / A conversion for sending analog data while sequentially converting image data sent from the display data storage unit into analog data. And the D
A display unit for displaying image data based on analog data sent from the A / A conversion unit, an external output unit for outputting or storing the data to an external printer, a disk, or the like, and a display data storage unit for sending the data. Address signals are respectively stored in a 1-line data storage unit that temporarily stores data for one line from image data and then sequentially sends the data to the external output unit, and the 1-line data storage unit and the display data storage unit. And a control signal, a dot clock is sent to the D / A conversion unit, and a Hsync / Vsync signal is sent to the display unit for synchronization, and the 1-line data storage unit, A system control unit for controlling the external output unit and the timing generator unit, and a signal for starting a hard copy process The image display processing apparatus characterized by comprising a hard copy instruction unit for sending to said system controller.