JPH0723289A - Image data transfer processor - Google Patents

Abstract

PURPOSE:To perform the arithmetic processing of complicated image data by the simple control from a microprocessor at high speed by performing a transfer processing where a calculation is added to image data by using an arithmetic circuit provided on the outside of the microprocessor. CONSTITUTION:This processor is provided with a memory controller 4 controlling the read cycle and write cycle of a memory in a hardware, receiving the command from a microprocessor 1, a first arithmetic circuit 5 performing an arithmetic processing for image data read from a first image memory 2 (source surface) and a switch circuit 6 selecting the output to a second image memory (destination image) 3. The transfer processing of image data to which a calculation is added is performed by using the memory controller provided on the outside of the microprocessor and a circuit 5 exclusive for image data and without fetching image data to the inside of the microprocessor.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an image data transfer processing apparatus having a microprocessor for performing image processing, having a plurality of image memories, and capable of executing image data processing in pixel units. Furthermore, this device is compatible with multimedia and has been applied to a wide range of fields such as capturing image data created on a personal computer and being used for presentations.

[0002]

2. Description of the Related Art In an image data transfer processing device having a microprocessor for performing image processing and having a plurality of image memories, a second image memory (hereinafter referred to as "source surface") rather than a first image memory (hereinafter referred to as "source surface") is used. After that, when the image data is transferred to the "destination surface", the microprocessor not only controls the data transfer but also transfers the image data from the source surface once inside the microprocessor (read cycle). After the image is transferred to the buffer memory, the transfer process is performed again by the procedure of transferring the image data to the destination surface (write cycle). In particular, when performing transfer processing that adds arithmetic processing to image data, arithmetic processing is added to the data captured in the buffer memory inside the microprocessor that performs the above image processing, and the data is again extracted from the inside of the microprocessor to the destination side. Transfer processing is performed by a complicated control sequence of transfer.

FIG. 7 is a block diagram showing a conventional image data transfer processing device. In the figure, 1 is a microprocessor for performing image processing of the image data transfer processing device, and 2 is a first image memory incorporated in the image data transfer processing device, which is a first image holding image data to be transferred. A memory (source surface) 3 is a second image memory (destination surface) to which image data is transferred.

Next, the operation will be described. A microprocessor 1 for performing image processing of the image data transfer processing device is a first image memory 2 built in the image data transfer processing device.
(Source surface) is controlled to read out the image data held therein. Then, the read image data is loaded into the buffer memory inside the microprocessor 1.
In the inside of the microprocessor 1, after the image data taken in the buffer memory is subjected to arithmetic processing, this time, the second image memory 3 (destination surface) is controlled so that the buffer memory inside the microprocessor 1 is operated. The taken-out image data is written on the destination surface.

[0005]

SUMMARY OF THE INVENTION According to the present invention, a memory controller and an arithmetic circuit dedicated to image data are provided outside the microprocessor for the transfer processing of the image data to which the arithmetic operation is applied, and the image data is stored inside the microprocessor. It is configured so that it can be performed without taking in.

The present invention has been made in order to solve the above-mentioned problems, and does not require complicated data arithmetic processing inside the microprocessor, and can perform transfer processing in which image data is arithmetically operated at high speed. The purpose is to do so.

[0007]

An image data transfer processing device according to the present invention uses a memory controller and an arithmetic circuit for image data processing, which are provided outside a microprocessor, to perform transfer processing in which image data is processed. It is configured so that it can be performed.

Further, there is provided means for selecting the image data to be transferred to the destination surface, between the image data after the arithmetic processing and the image data not subjected to the arithmetic processing from the source surface.

Further, in the course of the arithmetic processing, the control from the microprocessor is initialized and a control sequence for repeating one image data by using the same arithmetic processing using hardware is used.

Further, it is configured such that one system of image memory (source surface) has two systems of arithmetic circuits and two systems of image memory (destination surface).

Further, it has a two-system image memory (source surface) and a two-system arithmetic circuit, and is configured so that the image data calculated in each can be added and transferred to one image memory (destination surface). It was done.

Further, the image memory of one system (source surface) has two systems of image memory (destination surface), and the destination surface can be arbitrarily switched.

In addition, the system has two systems of image memories (source side) and two systems of arithmetic circuit, and the image data calculated by each can be selected and transferred to one image memory (destination side). It was done. Since the conventional image data transfer processing device is configured as described above, when performing a transfer process in which calculation is added to image data,
There is a problem in that it takes a long processing time because various data controls are required to fetch image data into the microprocessor and perform arithmetic processing.

[0014]

According to the present invention, since the transfer process in which the image data is calculated can be performed by using the arithmetic circuit dedicated to the image data provided outside the microprocessor,
With simple control from the microprocessor, complex image data arithmetic processing can be performed at high speed.

[0015]

EXAMPLES Example 1. Embodiment 1 of the present invention will be described below with reference to the drawings. FIG. 1 is a block diagram showing an image data transfer processing apparatus according to a first embodiment of the present invention. The same reference numerals as those in FIG. 7 denote the same or corresponding portions, and up to the second image memory 3 (destination surface). Since the configuration is the same as that of the conventional example of FIG. 2, the description will be omitted. In FIG. 1, 4 is a memory controller that receives a command from a microprocessor and controls a read cycle and a write cycle of the memory by hardware, and 5 operates on image data read from a first image memory 2 (source surface). A first arithmetic circuit 6 that performs processing and a switch circuit 6 that selects an output to the second image memory (destination surface) 3.

Next, the operation will be described. The microprocessor 1 that performs image processing of the image data transfer processing device is
A data transfer command is issued to the memory controller 4. The memory controller 4 controls the first image memory 2 (source surface) built in the image data transfer processing device, and reads the image data held therein in a read cycle. The image data read out there is the first
Is sent to the arithmetic circuit 5 and the switch circuit 6.

The arithmetic circuit 5 adds arithmetic processing to the image data under the control of the microprocessor 1. The image data to which the arithmetic processing is applied in this way is the switch circuit 6
Entered in. In the switch circuit 6, the image data to which the above arithmetic processing has been applied and the first image memory 2 (source surface)
After the input image data is selected, it is sent to the second image memory 3 (destination surface) again in the write cycle by the memory controller 4.

Further, by controlling the switch circuit 6 by the microprocessor 1, it is possible to switch the output image data to the destination surface 3 pixel by pixel in the transfer process.

FIG. 2 is a block diagram showing an internal configuration of the first arithmetic circuit 5. The structure up to the second image memory (destination surface) 3 is the same as that of the first embodiment shown in FIG. In FIG. 2, 13 is a register for temporarily storing control information from the microprocessor 1, 14 is a buffer memory for temporarily storing output image data from the first image memory (source surface) 2, and 15 is the register 13 described above. It is a logic circuit that receives control information from and executes a logical operation.

Next, the operation will be described. The image data read from the first image memory (source surface) 2 is temporarily stored in the buffer memory 14 and then sent to the logic circuit 15. On the other hand, the control information from the microprocessor 1 is temporarily stored in the register 13, and the logic circuit 15
Then, a logical operation is performed according to the control information from the register 13. The image data that has been subjected to the logical operation is output to the second image memory 3. The control sequence of the logic circuit 15 is shown below.

The logic circuit 15 uses two types of control sequences. The first method is to re-apply control information from the microprocessor on a pixel-by-pixel basis in the process of transferring image data to change the logical operation. In the second method, the logical operation is fixed in advance by the control information from the microprocessor 1 before starting the transfer processing, and the logical operation is performed without involvement from the microprocessor 1 in the image data transfer processing process. Is the way to do. In particular, by performing transfer processing using the second method, about
The transfer process can be performed in about 4 hours.

Example 2. FIG. 3 is a block diagram showing an image data transfer processing device according to a second embodiment of the present invention. First
Since the operation circuit 5 up to the above has the same configuration as that of the first embodiment of FIG. 1, the description thereof is omitted. In FIG. 3, 7 is a second arithmetic circuit, and 8 is a third image memory (destination surface).
Is.

Next, the operation will be described. The microprocessor 1 that performs image processing of the image data transfer processing device is
A data transfer command is issued to the memory controller 4. The memory controller 4 controls the first image memory 2 (source surface) built in the image data transfer processing device, and reads the image data held therein in a read cycle. The image data read out there is sent to the first arithmetic circuit 5 and the second arithmetic circuit 7, and under the control of the microprocessor 1, different arithmetic processing is applied to each. The image data thus processed is transferred again to the second image memory 3 (destination surface) and the third image memory 6 (destination surface) by the memory controller 4 in the write cycle.

Example 3. FIG. 4 is a block diagram showing an image data transfer processing device according to a third embodiment of the present invention. First
Since the arithmetic circuit 5 up to and the second arithmetic circuit 7 have the same configuration as that of the second embodiment of FIG. 3, description thereof will be omitted. In FIG.
Reference numeral 9 is a fourth image memory (source surface), and 10 is an adding circuit for adding output image data from the first arithmetic circuit 5 and the second arithmetic circuit 7.

Next, the operation will be described. The microprocessor 1 that performs image processing of the image data transfer processing device is
A data transfer command is issued to the memory controller 4. The memory controller 4 controls the first image memory 2 (source surface) and the fourth image memory 8 (source surface) built in the image data transfer processing device, and the image data held therein in the read cycle. Read out. The image data read out there is sent to the first arithmetic circuit 5 and the second arithmetic circuit 7 and subjected to different arithmetic processing under the control of the microprocessor 1. The two pieces of image data that have undergone arithmetic processing in this way are sent to the adder circuit 10 and added together. The image data thus obtained is transferred again to the second image memory 3 (destination surface) by the memory controller 4 in the write cycle.

Further, by controlling the adder circuit 10 by the microprocessor 1, it is possible to change the addition process in pixel units in the transfer process.

Example 4. FIG. 5 is a block diagram showing an image data transfer processing device according to a fourth embodiment of the present invention. First
Since the arithmetic circuit 5 up to and the third image memory 8 (destination surface) have the same configuration as in the second embodiment of FIG.
The description is omitted. In FIG. 5, reference numeral 11 is a switch circuit for switching the image memory surface for outputting the image data from the first arithmetic circuit.

Next, the operation will be described. The microprocessor 1 that performs image processing of the image data transfer processing device is
A data transfer command is issued to the memory controller 4. The memory controller 4 controls the first image memory 2 (source surface) built in the image data transfer processing device, and reads the image data held therein in a read cycle. The image data read out there is the first
Is sent to the arithmetic circuit 5 and is subjected to arithmetic processing under the control of the microprocessor 1. The image data thus processed is sent to the switch circuit 11,
The image memory surface to be output is selected under the control of the microprocessor 1. Then, it is transferred again to the second image memory 3 (destination surface) and the third image memory 8 (destination surface) by the memory controller 4 in the write cycle.

Example 5. FIG. 6 is a block diagram showing an image data transfer processing device according to a fifth embodiment of the present invention. First
Since the arithmetic circuit 5 up to and the second arithmetic circuit 7 and the fourth image memory 9 (source surface) have the same configurations as those in the third embodiment of FIG. In FIG. 6, reference numeral 12 is a switch circuit for selecting output image data from the first arithmetic circuit 5 and the second arithmetic circuit 7.

Next, the operation will be described. The microprocessor 1 that performs image processing of the image data transfer processing device is
A data transfer command is issued to the memory controller 4. The memory controller 4 controls the first image memory 2 (source surface) and the fourth image memory 8 (source surface) built in the image data transfer processing device, and the image data held therein in the read cycle. Read out. The image data read out there is sent to the first arithmetic circuit 5 and the second arithmetic circuit 7 and subjected to different arithmetic processing under the control of the microprocessor 1. The first and second processings thus added
The output image data from the arithmetic circuit is sent to the switch circuit 12, the output data is selected, and again transferred to the second image memory 3 (destination surface) in the write cycle by the memory controller 4.

Further, by controlling the switch circuit 12 by the microprocessor 1, it is possible to switch the output image data to the destination surface 3 pixel by pixel in the transfer process.

[0032]

As described above, according to the present invention, the image data transfer processing device performs the transfer processing of the image data by using the memory controller provided outside the microprocessor and the arithmetic circuit dedicated to the image data. Since it is configured so that the image data can be performed without being taken into the inside of the microprocessor, there is an effect that the control from the microprocessor can be simplified and the image data can be processed at high speed.

Since the image data to be transferred to the destination surface is provided with a means for selecting the image data after the arithmetic processing and the image data to which the arithmetic processing from the source surface is not applied, the arithmetic processing is performed. If there is not, there is an effect that a higher speed data transfer process can be realized.

Further, in the course of the arithmetic processing, the control from the microprocessor is performed only by the initial setting, and by using the control sequence in which one piece of image data is repeated by using the same arithmetic processing using hardware, a higher speed is achieved. There is an effect that arithmetic processing can be realized.

Since one system of image memory (source surface) has two systems of arithmetic circuits and two systems of image memory (destination surface), two sets of image data can be obtained simultaneously from one image data. There is an effect that the image data added with the calculation of can be obtained at high speed.

Further, there is provided a structure having two systems of image memories (source surface) and two systems of arithmetic circuits so that the image data calculated respectively can be added and transferred to one image memory (destination surface). Therefore, there is an effect that one image data can be combined from two image data at high speed with a simple control sequence.

Further, since one system of image memory (source surface) has two systems of image memory (destination surface) and the destination surface can be arbitrarily switched, one image data is divided. There is an effect that the transfer processing can be performed at high speed.

Further, it has a structure in which it has two systems of image memory (source surface) and two systems of arithmetic circuit, and can select the image data calculated respectively and transfer it to one image memory (destination surface). Therefore, there is an effect that one image data can be edited from two image data at high speed with a simple control sequence.

[Brief description of drawings]

FIG. 1 is a block diagram showing an image data transfer processing device according to a first embodiment of the present invention.

FIG. 2 is a block diagram showing a configuration of a first arithmetic circuit according to the first embodiment.

FIG. 3 is a block diagram showing an image data transfer processing device according to a second embodiment of the present invention.

FIG. 4 is a block diagram showing an image data transfer processing device according to a third embodiment of the present invention.

FIG. 5 is a block diagram showing an image data transfer processing device according to a fourth embodiment of the present invention.

FIG. 6 is a block diagram showing an image data transfer processing device according to a fifth embodiment of the present invention.

FIG. 7 is a block diagram showing a conventional image data transfer processing device.

[Explanation of symbols]

 1 Microprocessor 2 1st image memory (source side) 3 2nd image memory (destination side) 4 Memory controller 5 1st arithmetic circuit 6 Switch circuit 7 2nd arithmetic circuit 8 3rd image memory (distinct) Nation side) 9 Fourth image memory (source side) 10 Adder circuit 11 Switch circuit 12 Switch circuit 13 Register 14 Buffer memory 15 Logic circuit

─────────────────────────────────────────────────── ─── Continuation of the front page (51) Int.Cl. ⁶ Identification code Internal reference number FI technical display location G06T 1/60

Claims (8)

[Claims] 1. A first image memory (source surface) and a second image memory (destination surface), a microprocessor for performing image processing, a memory controller,
In an image data transfer processing device comprising a first arithmetic circuit and a selection means for switching input to the second image memory (destination surface), image data is transferred from the source surface to the destination surface. An image data transfer device characterized in that, when performing a transfer process with an arithmetic operation, the image data is not taken into the microprocessor but is processed using the first arithmetic circuit provided outside the microprocessor. . 2. The data transfer control of the first image memory (source surface) and the second image memory (destination surface) is performed by using a memory controller controlled by the microprocessor. The image data transfer processing device according to claim 1. 3. The output from the first image memory (source surface) and the output from the first arithmetic circuit are selected by the selection means, and the image data to be output to the second image memory (destination surface) is switched. The image data transfer processing device according to claim 1, wherein the image data transfer processing device has a configuration. 4. The arithmetic processing course of the image data is defined in advance by the control of the microprocessor before starting the transfer processing in the control sequence of the first arithmetic circuit, and during the transfer processing, the arithmetic processing course defined above is also set. The image data transfer processing apparatus according to claim 1, characterized in that the transfer processing is performed first. 5. A first image memory (source surface), second and third memory (destination surface), a microprocessor for performing image processing, a memory controller,
In the image data transfer processing device including the first and second arithmetic circuits, when performing transfer processing in which image data is arithmetically operated from the source surface to the destination surface, the first image memory (source surface) is used. Output to the first and second arithmetic circuits, and after performing different arithmetic processing on each of them, outputs to the second and third image memories (destination surface). A characteristic image data transfer processing device. 6. A first and a fourth image memory (source surface) and a second image memory (destination surface).
And an image data transfer processing device including a microprocessor for performing image processing, a memory controller, first and second arithmetic circuits, and an adder circuit for adding outputs from the first and second arithmetic circuits, When performing the transfer process in which the image data is calculated from the source surface to the destination surface, the first and second arithmetic circuits respectively perform different arithmetic processes and combine the output image data to synthesize the image data. An image data transfer processing device characterized by outputting to a second image memory (destination surface). 7. A first image memory (source surface), second and third image memories (destination surface), a microprocessor for performing image processing, a memory controller, a first arithmetic circuit, and the first image memory. In an image data transfer processing device comprising a selection means for switching an image memory (destination surface) to which image data output from an arithmetic circuit is transferred, a transfer process in which image data is operated from the source surface to the destination surface. The image data transfer processing device is configured to output the output data from the first arithmetic circuit by selecting the second and third image memories (destination surface) when performing the above. 8. A first and a fourth image memory (source surface), a second image memory (destination surface),
An image data transfer processing device comprising a microprocessor for performing image processing, a memory controller, first and second arithmetic circuits, and selection means for switching output to the destination surface, in the destination from the source surface to the destination. In the case of performing a transfer process in which image data is added to a surface, image data output by performing different arithmetic processing on the second image memory (destination surface) by the first and second arithmetic circuits. An image data transfer processing device characterized by being configured to select and output.