JPH0722444A - Method for mounting semiconductor element - Google Patents

Method for mounting semiconductor element

Info

Publication number
JPH0722444A
JPH0722444A JP5191919A JP19191993A JPH0722444A JP H0722444 A JPH0722444 A JP H0722444A JP 5191919 A JP5191919 A JP 5191919A JP 19191993 A JP19191993 A JP 19191993A JP H0722444 A JPH0722444 A JP H0722444A
Authority
JP
Japan
Prior art keywords
adhesive
wafer
film
adhesives
tape
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP5191919A
Other languages
Japanese (ja)
Inventor
Teru Okunoyama
輝 奥野山
Tatsuya Onishi
龍也 大西
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Kyocera Chemical Corp
Original Assignee
Toshiba Chemical Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Chemical Corp filed Critical Toshiba Chemical Corp
Priority to JP5191919A priority Critical patent/JPH0722444A/en
Publication of JPH0722444A publication Critical patent/JPH0722444A/en
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/683—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping
    • H01L21/6835—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/683—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping
    • H01L21/6835—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support
    • H01L21/6836—Wafer tapes, e.g. grinding or dicing support tapes
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L24/27—Manufacturing methods
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L24/28—Structure, shape, material or disposition of the layer connectors prior to the connecting process
    • H01L24/29—Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/74—Apparatus for manufacturing arrangements for connecting or disconnecting semiconductor or solid-state bodies
    • H01L24/741—Apparatus for manufacturing means for bonding, e.g. connectors
    • H01L24/743—Apparatus for manufacturing layer connectors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L24/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2221/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof covered by H01L21/00
    • H01L2221/67—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere
    • H01L2221/683—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping
    • H01L2221/68304—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support
    • H01L2221/68327—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support used during dicing or grinding
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2221/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof covered by H01L21/00
    • H01L2221/67—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere
    • H01L2221/683—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping
    • H01L2221/68304—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support
    • H01L2221/68327—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support used during dicing or grinding
    • H01L2221/68336—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support used during dicing or grinding involving stretching of the auxiliary support post dicing
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/27—Manufacturing methods
    • H01L2224/274—Manufacturing methods by blanket deposition of the material of the layer connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/74—Apparatus for manufacturing arrangements for connecting or disconnecting semiconductor or solid-state bodies and for methods related thereto
    • H01L2224/741—Apparatus for manufacturing means for bonding, e.g. connectors
    • H01L2224/743—Apparatus for manufacturing layer connectors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H01L2224/83009—Pre-treatment of the layer connector or the bonding area
    • H01L2224/83048—Thermal treatments, e.g. annealing, controlled pre-heating or pre-cooling
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H01L2224/8319—Arrangement of the layer connectors prior to mounting
    • H01L2224/83191—Arrangement of the layer connectors prior to mounting wherein the layer connectors are disposed only on the semiconductor or solid-state body
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H01L2224/838—Bonding techniques
    • H01L2224/8385—Bonding techniques using a polymer adhesive, e.g. an adhesive based on silicone, epoxy, polyimide, polyester
    • H01L2224/83855—Hardening the adhesive by curing, i.e. thermosetting
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01047—Silver [Ag]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01078—Platinum [Pt]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01082—Lead [Pb]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/06—Polymers
    • H01L2924/078—Adhesive characteristics other than chemical
    • H01L2924/07802—Adhesive characteristics other than chemical not being an ohmic electrical conductor

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Manufacturing & Machinery (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Die Bonding (AREA)
  • Dicing (AREA)

Abstract

PURPOSE:To provide a mounting method for semiconductor elements which can cope with various chip sizes and by which workability is excellent without causing discharge variance of die bonding paste, cobwebbing, etc., and generating voids, by peeling off a semiconductor element with adhesives from a dicing tape and thermocompression bonding it on an adherend. CONSTITUTION:After a face with a film adhesives 1 is overlaid bonded on a wafer 4 placed on a heat plate 5, a roll 6 is thermocompression on a carrier film 2 to transfer the adhesives 1 from the film 2 onto the wafer 4, thus obtaining the wafer 4 with the adhesives. The obtained wafer 4 is bonded onto a dicing tape 7 while the adhesives 1 side thereof is facing the tape 7. Then it is cut into chips by a dicing saw and they are expanded thereafter. Individual chip 8 with the adhesive which is cut and separated on the tape 7 is sucked by a vacuum suction means 9 to be peeled off from the tape 7. The semiconductor chip 8 is firmly and thermocompression bonded onto a silver plating pattern 13 of a lead frame 12 which is preheated by a preheater 11.

Description

【発明の詳細な説明】Detailed Description of the Invention

【０００１】[0001]

【産業上の利用分野】本発明は、ボイドの発生がなく作
業性に優れ、いかなるチップサイズにも対応して接着剤
付きの半導体素子に分割しマウントする半導体素子の取
付け方法に関する。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method of mounting a semiconductor element which is excellent in workability without generation of voids and which is divided and mounted on a semiconductor element with an adhesive corresponding to any chip size.

【０００２】[0002]

【従来の技術】従来、半導体チップの取付方法は、被固
着体、例えばリードフレームにダイボンディングペース
トを塗布して半導体チップを配置し、ダイボンディング
ペーストを乾燥硬化させて固着・マウントするのが一般
的である。2. Description of the Related Art Conventionally, as a method of attaching a semiconductor chip, it is general to apply a die bonding paste to an adherend, for example, a lead frame, dispose the semiconductor chip, and dry and cure the die bonding paste to fix and mount the die chip. Target.

【０００３】すなわち、図５に示したように、半導体ウ
エハー２０には多数の半導体素子２１が形成されてお
り、この半導体ウエハー２０の表面をダイサーでスクラ
イブする。続いて半導体ウエハー２０の表面および裏面
にダイシングテープを貼り付け、裏面側からローラー等
により押し上げてスクライブ線に沿って多数のチップに
分割する。次いで表面のダイシングテープを剥がし、下
面のテープを四方に伸張し各半導体チップを相互に隔離
する。一方、リードフレームは、図６（a ）の部分断面
図に示したように、リードフレーム２３上には銀メッキ
層２２が形成されており、図６（b ）に示したとおり、
この銀メッキ層２２上の接着部には、液状又はシート状
の接着剤２４を塗布又は配置し、図５の分割された半導
体チップ２１を接着剤２４上に配置して加熱接着する。That is, as shown in FIG. 5, a large number of semiconductor elements 21 are formed on the semiconductor wafer 20, and the surface of the semiconductor wafer 20 is scribed by a dicer. Subsequently, a dicing tape is attached to the front surface and the back surface of the semiconductor wafer 20, and pushed up from the back surface side by a roller or the like to divide into a large number of chips along the scribe line. Next, the dicing tape on the front surface is peeled off, and the tape on the lower surface is stretched in all directions to isolate the respective semiconductor chips from each other. On the other hand, in the lead frame, as shown in the partial cross-sectional view of FIG. 6A, the silver plating layer 22 is formed on the lead frame 23, and as shown in FIG. 6B,
A liquid or sheet adhesive 24 is applied or placed on the adhesive portion on the silver plating layer 22, and the divided semiconductor chips 21 of FIG. 5 are placed on the adhesive 24 and heat-bonded.

【０００４】ダイボンディングペーストをリードフレー
ムに塗布する方法としては、ディスペンサーによる圧力
吐出方式、スクリーン印刷方式、ピンヘッド等による転
写方式等の技術が知られている。ディスペンサーによる
圧力吐出方式は、シリンジの中にダイボンディングペー
ストを入れ、ディスペンサーによる空気圧でペーストを
ニードルの先端から吐出する方法で、使用するニードル
の内径、圧力、時間の違いによってペーストの吐出量を
変化させることができる。スクリーン印刷方式は、ナイ
ロン、テトロンやステンレスの版上にダイボンディング
ペーストをのせてスキージによって、版上からペースト
を押し出す方法であり、一度に多数の部分にペーストを
塗布することができる方式である。転写方式はピン等の
ヘッドによってダイボンディングペーストを塗布する方
法で、ヘッドの大きさによって塗布面積を変化させるこ
とができる方式である。As a method for applying the die bonding paste to the lead frame, there are known techniques such as a pressure discharge method using a dispenser, a screen printing method, and a transfer method using a pin head. The pressure discharge method using a dispenser is a method in which the die bonding paste is placed in a syringe and the paste is discharged from the tip of the needle by air pressure using the dispenser.The discharge amount of paste changes depending on the inner diameter of the needle used, pressure, and time. Can be made. The screen printing method is a method in which a die bonding paste is placed on a nylon, tetron, or stainless plate and the paste is extruded from the plate by a squeegee, and the paste can be applied to a large number of parts at one time. The transfer method is a method in which the die bonding paste is applied by a head such as a pin, and the application area can be changed depending on the size of the head.

【０００５】[0005]

【発明が解決しようとする課題】しかしながら、ボンデ
ィングする半導体素子サイズが大きくなると、ディスペ
ンサー方式では吐出バラツキが大きく制御が困難とな
り、印刷方式では塗布スピードが向上せず、転写方式で
はダイボンディングペーストの性能上糸引き等で不具合
となる欠点があった。また、ダイボンディングペースト
を塗布した後に速やかに半導体素子をマウントするた
め、上記従来方式ではダイボンディングペースト中の希
釈溶剤が硬化乾燥の際にボイドを発生する。さらにフィ
ルム状の接着剤を配置するものは、ボイド等の問題はな
くなるがチップ 1つずつの大きさに接着剤サイズを合わ
せること等が困難であまり使用されていないのが現状で
ある。However, when the size of the semiconductor element to be bonded is large, the dispenser method causes a large variation in discharge, which makes it difficult to control, the printing method does not improve the coating speed, and the transfer method does not improve the performance of the die bonding paste. There was a drawback that it became a problem due to needle thread pulling and the like. Further, since the semiconductor element is mounted promptly after the die bonding paste is applied, in the above conventional method, the diluting solvent in the die bonding paste causes voids during curing and drying. Further, the film-shaped adhesive is not used so much because the problem of voids and the like is eliminated, but it is difficult to adjust the adhesive size to the size of each chip.

【０００６】本発明は、上記の欠点を解消するためにな
されたもので、ダイボンディングペーストの吐出バラツ
キや糸引き等がなく作業性に優れ、また、ボイドの発生
もなく、いかなるチップサイズにも対応できる優れた半
導体素子の取付け方法を提供しようとするものである。The present invention has been made in order to solve the above-mentioned drawbacks and has excellent workability without variations in discharge of die-bonding paste or stringing. In addition, voids do not occur and any chip size can be obtained. It is intended to provide an excellent method of mounting a semiconductor device that can be used.

【０００７】[0007]

【課題を解決するための手段】本発明者は、上記の目的
を達成しようとその取付け方法について鋭意研究を重ね
た結果、後述の取付け方法が上記の目的を達成できるこ
とを見いだし、本発明を完成したものである。The present inventor has conducted extensive studies on the mounting method for achieving the above object, and as a result, found that the below-described mounting method can achieve the above object, and completed the present invention. It was done.

【０００８】即ち、本発明は、キャリヤフィルム上に熱
硬化性樹脂をベースバインダーとする接着剤をフィルム
状かつウエハーサイズに塗布乾燥し、離型フィルムをか
ぶせて接着剤付きキャリヤシートを作成する工程と、接
着剤付きキャリヤシートにおける前記接着剤をウエハー
の裏面に熱転写して接着剤付きウエハーとする工程と、
接着剤付きウエハーをダイシングテープ上に貼り付けた
後、ダイシングをして接着剤付き半導体素子に分割する
工程と、接着剤付き半導体素子をダイシングテープから
引き剥がして被固着体に熱圧着し、半導体素子を該被固
着体に固着させる工程を含む半導体素子の取付け方法で
ある。That is, according to the present invention, a step of forming an adhesive having a thermosetting resin as a base binder on a carrier film in a film form and in a wafer size and drying it, and then covering it with a release film to prepare a carrier sheet with an adhesive. And a step of thermally transferring the adhesive in a carrier sheet with an adhesive to the back surface of the wafer to form a wafer with an adhesive,
After sticking the wafer with adhesive on the dicing tape, dicing and dividing into semiconductor elements with adhesive, and peeling the semiconductor element with adhesive from the dicing tape and thermocompression bonding to the adherend, semiconductor A method of mounting a semiconductor element, comprising the step of fixing the element to the adherend.

【０００９】[0009]

【実施例】以下、本発明の実施例を図面を用いて工程順
に詳細に説明する。Embodiments of the present invention will now be described in detail in the order of steps with reference to the drawings.

【００１０】図１（Ａ）の斜視図のように、キャリヤフ
ィルム２上には、熱硬化性樹脂をベースバインダーとす
る接着剤をロールコーター印刷等で、破線で示されるウ
エハーサイズに塗布乾燥させて半硬化状態の膜状（以
下、フィルム状ともいう）接着剤１とし、その上に離型
フィルム３を重ねて、接着剤付きキャリヤシートを得
る。図１（Ｂ）はその接着剤付きキャリヤシートの断面
図である。As shown in the perspective view of FIG. 1A, an adhesive having a thermosetting resin as a base binder is applied on the carrier film 2 by roll coater printing or the like to a wafer size shown by a broken line and dried. To form a semi-cured film-like (hereinafter also referred to as film-like) adhesive 1, and a release film 3 is laminated thereon to obtain an adhesive-attached carrier sheet. FIG. 1B is a sectional view of the carrier sheet with the adhesive.

【００１１】本発明に用いる熱硬化性樹脂をベースバイ
ンダーとする接着剤としては、熱硬化性樹脂をベースと
してフィルム状または膜状になるものであれば特に制限
はなく広く使用することができる。フィルム状接着剤に
は、必要な条件、状態に応じて、そのベースに導電性粉
末や絶縁性粉末を組み合わせたもの等を適宜選択して使
用することができる。The adhesive having a thermosetting resin as a base binder used in the present invention is not particularly limited as long as it is a film or film based on the thermosetting resin and can be widely used. As the film adhesive, a combination of a conductive powder and an insulating powder can be appropriately selected and used according to the necessary conditions and conditions.

【００１２】本発明に用いるキャリヤフィルムとして
は、熱可塑性樹脂からなるプラスチックフィルム、例え
ば、ポリプロピレン、ポリエステル等のものが挙げら
れ、また、接着剤付きキャリヤシートの離型フィルムと
しては、ポリプロピレンフィルム等が挙げられる。The carrier film used in the present invention may be a plastic film made of a thermoplastic resin, such as polypropylene or polyester, and the release film of the carrier sheet with an adhesive may be a polypropylene film or the like. Can be mentioned.

【００１３】次に、図１の（Ｃ）に示したように接着剤
付きキャリヤシートの離型フィルム３を剥がし、フィル
ム状接着剤１側をヒート板５上に置かれたウエハー４に
重ねて、キャリヤフィルム２の上からロール６で熱圧着
してフィルム状接着剤１をキャリヤフィルム３からウエ
ハー４に転写して接着剤付きウエハーを作った。その断
面図を図２の（Ｄ）に示した。Next, as shown in FIG. 1C, the release film 3 of the carrier sheet with adhesive is peeled off, and the film adhesive 1 side is placed on the wafer 4 placed on the heating plate 5. Then, the adhesive film 1 was transferred from the carrier film 3 to the wafer 4 by thermocompression bonding from the carrier film 2 with a roll 6 to produce a wafer with an adhesive. The sectional view is shown in FIG.

【００１４】本発明に使用される半導体素子（ウエハ
ー）としては、シリコン半導体素子（ウエハー）、化合
物半導体素子（ウエハー）など、特に限定されるもので
はなく各種半導体を使用することができる。The semiconductor element (wafer) used in the present invention is not particularly limited, and various semiconductors such as a silicon semiconductor element (wafer) and a compound semiconductor element (wafer) can be used.

【００１５】この接着剤付きウエハー４は、図２（Ｅ）
に示したように接着剤１側をダイシングテープ７に接着
させる。これを図２（Ｆ）に示したようにダイシングソ
ーで1 チップ毎に切断して展張する。This adhesive-attached wafer 4 is shown in FIG.
The adhesive 1 side is adhered to the dicing tape 7 as shown in FIG. As shown in FIG. 2 (F), this is cut into individual chips with a dicing saw and expanded.

【００１６】ダイシングテープ７上で切断隔離された接
着剤付きチップ８は、図３（Ｇ）に示したように、真空
吸着手段９で吸着しダイシングープ７から引剥がしをす
る。この場合ダイシングテープ７の下方から接着剤付き
チップ８を押上棒１０で少し突き上げて接着剤付きチッ
プ８の引剥がしを容易にする。The chip 8 with the adhesive cut and separated on the dicing tape 7 is sucked by the vacuum suction means 9 and peeled off from the dicing loop 7, as shown in FIG. In this case, the chip 8 with the adhesive is slightly pushed up from below the dicing tape 7 with the push-up bar 10 to facilitate the peeling of the chip 8 with the adhesive.

【００１７】図３（Ｈ）に示したように真空吸着手段９
で吸着した接着剤付き半導体チップ８は、予熱ヒーター
１１で予熱したリードフレーム１２の銀メッキパターン
１３上に強く熱圧着する。半硬化状態のフィルム状接着
剤１が溶融し、半導体チップ８が容易に接着固着され
る。As shown in FIG. 3H, the vacuum suction means 9
The adhesive-attached semiconductor chip 8 adsorbed in step 1 is strongly thermocompression bonded onto the silver plating pattern 13 of the lead frame 12 preheated by the preheater 11. The semi-cured film adhesive 1 is melted, and the semiconductor chip 8 is easily adhered and fixed.

【００１８】ここでは、半導体チップをリードフレーム
に接着する場合を示したが、被固着体としては、これに
限定されることはなく絶縁基板、電極パターン付き基板
等が挙げられる。また、接着剤は必要条件、状態に応じ
て導電性粉末や絶縁性粉末を組み合わせたものを適宜選
択して適切な接着剤を使用する。もちろん、半導体素子
も何等限定されるものはなく、各種のものを接着取付け
することができる。Although the case where the semiconductor chip is adhered to the lead frame is shown here, the adherend is not limited to this and may be an insulating substrate, a substrate with an electrode pattern, or the like. Further, as the adhesive, a combination of conductive powder and insulating powder is appropriately selected according to the necessary conditions and state, and an appropriate adhesive is used. Of course, the semiconductor element is not limited in any way, and various kinds can be adhesively attached.

【００１９】[0019]

【発明の効果】以上の説明から明らかなように、本発明
の半導体素子の取付け方法によれば、熱硬化性樹脂をベ
ースバインダーとする接着剤が予めキャリヤフィルム上
にウエハーサイズに塗布乾燥された接着剤付きキャリヤ
シートを使用し、離型フィルムを剥がしてウエハーの裏
面上に熱転写するため、吐出バラツキや糸引き等がな
く、半導体素子ひとつずつに接着剤を塗布または設置す
る必要がなく効率的であり、かつ半硬化状態に乾燥され
ていて瞬時にダイボンディングするために接着塗布スピ
ードに優れ、また接着塗布後において均一な厚さとなり
またボイドの発生もない。さらに、いかなるチップサイ
ズにも対応できるものである。As is apparent from the above description, according to the method of mounting a semiconductor device of the present invention, an adhesive containing a thermosetting resin as a base binder is applied and dried on a carrier film in a wafer size in advance. Since the release film is peeled off and heat-transferred onto the back surface of the wafer using a carrier sheet with adhesive, there is no variation in discharge or stringing, and there is no need to apply or set adhesive on each semiconductor element for efficient operation. In addition, since it is dried in a semi-cured state and is instantly die-bonded, the adhesive coating speed is excellent, the thickness is uniform after the adhesive coating, and voids are not generated. Further, it can be applied to any chip size.

【図面の簡単な説明】[Brief description of drawings]

【図１】図１は本発明実施例の接着剤転写までの工程を
示す説明図である。FIG. 1 is an explanatory view showing steps up to transfer of an adhesive according to an embodiment of the present invention.

【図２】図２は図１以後ダイシングまでの工程を示す説
明図である。FIG. 2 is an explanatory diagram showing a process from FIG. 1 to dicing.

【図３】図３は図２以後接着固定までの工程を示す説明
図である。FIG. 3 is an explanatory view showing the steps from FIG. 2 onward until adhesive fixing.

【図４】図４は本発明の主要な工程を工程順に説明する
要約図である。FIG. 4 is a summary diagram illustrating the main steps of the present invention in the order of steps.

【図５】図５は本発明に関連する半導体ウエハーの斜視
図である。FIG. 5 is a perspective view of a semiconductor wafer related to the present invention.

【図６】図６は従来の半導体素子の取付け方法を工程順
に示す説明図である。FIG. 6 is an explanatory view showing a conventional method of mounting a semiconductor element in the order of steps.

【符号の説明】[Explanation of symbols]

１ 熱硬化性樹脂フィルム状接着剤 ２ キャリヤフィルム ３ 離型フィルム ４ ウエハー ５ ヒート板 ６ ロール ７ ダイシングテープ ８ 半導体チップ ９ 真空吸着手段 １０ 押上棒 １１ 予熱ヒータ １２ リードフレーム １３ 銀メッキパターン ２０ ウエハー ２１ 半導体チップ ２２ 銀メッキ層 ２３ リードフレーム ２４ 接着剤 1 Thermosetting Resin Film Adhesive 2 Carrier Film 3 Release Film 4 Wafer 5 Heat Plate 6 Roll 7 Dicing Tape 8 Semiconductor Chip 9 Vacuum Adsorption Means 10 Push-Up Rod 11 Preheater 12 Lead Frame 13 Silver Plating Pattern 20 Wafer 21 Semiconductor Chip 22 Silver plated layer 23 Lead frame 24 Adhesive

───────────────────────────────────────────────────── フロントページの続き (51)Int.Cl.6 識別記号 庁内整理番号 ＦＩ 技術表示箇所 Ｈ０１Ｌ 21/78 Ｐ ─────────────────────────────────────────────────── ─── Continuation of the front page (51) Int.Cl. 6 Identification code Internal reference number FI technical display location H01L 21/78 P

Claims (1)

【特許請求の範囲】[Claims] 【請求項１】 キャリヤフィルム上に熱硬化性樹脂をベ
ースバインダーとする接着剤をフィルム状かつウエハー
サイズに塗布乾燥し、離型フィルムをかぶせて接着剤付
きキャリヤシートを作成する工程と、接着剤付きキャリ
ヤシートにおける前記接着剤をウエハーの裏面に熱転写
して接着剤付きウエハーとする工程と、接着剤付きウエ
ハーをダイシングテープ上に貼り付けた後、ダイシング
をして接着剤付き半導体素子に分割する工程と、接着剤
付き半導体素子をダイシングテープから引き剥がして被
固着体に熱圧着し、半導体素子を該被固着体に固着させ
る工程を含む半導体素子の取付け方法。1. A step of applying a thermosetting resin-based adhesive as a base binder on a carrier film in a film-like and wafer-sized size and drying it, and then covering it with a release film to prepare a carrier sheet with an adhesive. A step of thermally transferring the adhesive on the back surface of the wafer to a wafer with an adhesive, and attaching the wafer with an adhesive onto a dicing tape and then dicing to divide into semiconductor devices with an adhesive. A method of mounting a semiconductor element, comprising the steps of: peeling a semiconductor element with an adhesive from a dicing tape and thermocompression-bonding the semiconductor element to the adherend, and fixing the semiconductor element to the adherend.
JP5191919A 1993-07-06 1993-07-06 Method for mounting semiconductor element Pending JPH0722444A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP5191919A JPH0722444A (en) 1993-07-06 1993-07-06 Method for mounting semiconductor element

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP5191919A JPH0722444A (en) 1993-07-06 1993-07-06 Method for mounting semiconductor element

Publications (1)

Publication Number Publication Date
JPH0722444A true JPH0722444A (en) 1995-01-24

Family

ID=16282633

Family Applications (1)

Application Number Title Priority Date Filing Date
JP5191919A Pending JPH0722444A (en) 1993-07-06 1993-07-06 Method for mounting semiconductor element

Country Status (1)

Country Link
JP (1) JPH0722444A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2012156341A (en) * 2011-01-27 2012-08-16 Furukawa Electric Co Ltd:The Method of manufacturing semiconductor wafer processing tape, and semiconductor wafer processing tape

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2012156341A (en) * 2011-01-27 2012-08-16 Furukawa Electric Co Ltd:The Method of manufacturing semiconductor wafer processing tape, and semiconductor wafer processing tape

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