JPH07221996A - Method and device for image processing - Google Patents

Abstract

PURPOSE:To provide the image processing method and its device not requiring the provision of an exclusive processing section for each applied coding system when plural coding systems are applied to the processing method. CONSTITUTION:A CPU 109 sets a processing program corresponding to an applied coding system to an instruction memory 108 sequentially. A DSP 104 applies coding sequentially to image data stored in a picture memory 102 by the processing program of the different coding system set in the instruction memory 108 and stores the data to a coding memory 105.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an image processing method and an apparatus therefor, and more particularly to an image processing apparatus such as an image communication apparatus for encoding / decoding image data.

[0002]

2. Description of the Related Art In order to transmit a huge amount of image data, its compression technique is indispensable. Image data encoding methods include monochrome image data encoding methods such as MR encoding method used in group 3 facsimile and MMR encoding method used in group 4 facsimile, JPEG (Joint Photographic Experts Group). ), Which is being standardized by JBIG (Joint Bi-level Image Experts Group) and JBIG (Joint Bi-level Image Experts Group). There is a color image data encoding method. An optimal one of these encoding methods is applied according to the property of the image data to be encoded, the decoded image quality, and the encoding efficiency (compression rate).

1 to 4 are block diagrams showing the configuration of an encoding / decoding unit in a conventional image processing apparatus. In a conventional image processing device, when a monochrome image is MR-coded or MMR-coded, a binary coding unit 2 is configured as shown in FIG. 1, and a color image is coded by the JPEG system or the JBIG system. In this case, the multi-level encoding unit 3 was configured as shown in FIG. Further, in the case of simultaneously encoding a monochrome image and a color image, as shown in FIG.
Simultaneous processing is possible by configuring the coding units of the respective coding methods.

Further, when encoding and decoding by the same encoding method or encoding and decoding by different encoding methods are alternately performed, as shown in FIG. 4, a dedicated section 5 for performing encoding and decoding, and 6 was provided.

[0005]

However, the above-mentioned conventional example has the following problems. That is, in the conventional image processing apparatus, when a plurality of encoding methods are applied, there is a drawback that a dedicated processing unit must be provided for each encoding method to be applied. Also, when performing encoding and decoding, there is a drawback that dedicated processing units, that is, an encoding unit and a decoding unit, are required. In that case, encoding
/ Space and cost including the peripheral circuit of the decoding unit, and when multiple encoding methods are applied, the control of the peripheral circuit and each encoding / decoding unit becomes complicated.

[0006]

SUMMARY OF THE INVENTION The present invention is intended to solve the above problems, and has the following structure as one means for solving the above problems. That is, the image processing method is one in which image data is sequentially encoded by different encoding methods according to the set processing procedure.

Further, a storage means for storing the image data,
The processing means is provided with a processing means for encoding the image data according to the set processing procedure, and a control means for sequentially setting the processing procedure of a different encoding method in the processing means, and the processing means is set by the control means. According to the processing procedure, the image processing apparatus sequentially encodes the image data stored in the storage unit by different encoding methods.

Further, there is provided an image processing method of sequentially encoding image data and decoding the encoded data in accordance with the set processing procedure. Further, a first storage means for storing the image data, a second storage means for storing the code data, a processing means for encoding the image data and decoding the code data according to a set processing procedure, and the processing described above. And a control means for sequentially setting different processing procedures to the means, wherein the processing means
An image processing apparatus that sequentially encodes image data stored in the first storage unit and decodes code data stored in the second storage unit according to a processing procedure set by the control unit. To do.

[0009]

With the above arrangement, it is possible to provide an image processing method and an apparatus for sequentially encoding image data by different encoding methods according to a set processing procedure. For example, a plurality of encoding methods are applied. Even in such a case, it is not necessary to provide a dedicated processing unit for each applied encoding method, and the space and cost for providing the dedicated processing unit can be reduced.

Further, it is possible to provide an image processing method and an apparatus for sequentially encoding image data and decoding the encoded data according to the set processing procedure. For example, even when encoding and decoding are performed, respectively. It is possible to reduce the space and cost for providing the dedicated processing unit without requiring the dedicated processing unit, and to facilitate the control.

[0011]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS An image processing apparatus according to an embodiment of the present invention will be described in detail below with reference to the drawings.

[0012]

[First Embodiment] FIG. 6 is a block diagram showing an example of the arrangement of an image communication apparatus including an image processing apparatus according to the first embodiment of the present invention. In the figure, reference numeral 101 denotes a document reading unit which reads image data of a document by an image scanner or the like. In the following description, the band scan method is used, and the image data to be encoded and the image data to be decoded are in a unit of shuttle having a width of, for example, 128 lines in the sub-scanning direction as shown in FIG.

An image memory 102 is composed of, for example, a RAM and stores image data read by the document reading unit 101 or decoded image data. An image output unit 103 is a display or printer that displays or prints an image of the image data stored in the image memory 102. Reference numeral 104 denotes a DSP, which encodes image data or decodes encoded data according to a processing program stored in the instruction memory 108 and a coefficient stored in the local memory 104.

Reference numeral 105 denotes a code memory, which is composed of, for example, a RAM, and stores code data coded by the DSP 104 or code data to be decoded. Reference numeral 106 denotes a line control unit (hereinafter referred to as “CCU”), which sends the code data stored in the code memory 105 to the transmission line 110,
The code data received from 10 is output to the code memory 105.

109 is a microprocessor (hereinafter "CP
U ”), which has a built-in ROM or RAM, for example, and stores the image memory 102, DS in accordance with the program stored in the ROM.
It controls the P 104, the code memory 105, and the like, and sends a control signal to the above-described other configurations through a signal line, a bus, or the like not shown. Further, the CPU 109 sets the coefficients and the like required for the processing of the DSP 104 in the local memory 107, and
The processing program of P104 is downloaded to the instruction memory 108. The local memory 10
7 and the instruction memory 108 are composed of RAM or the like.

The image output unit 103 can be provided with a storage device, and read image data, decoded image data, etc. can be stored and encoded or displayed when necessary. Further, the coded data obtained by coding the read image data and the coded data received from the transmission path 110 can be stored, and the coded data can be transferred to the code memory 105 and transmitted or decoded under the control of the CPU 109. Hard disks, floppy disks, magneto-optical disks, etc. are used as storage devices.

8 and 9 are flowcharts showing an example of the processing procedure of this embodiment. When the present embodiment is activated, the CPU 109 downloads a program for performing initial processing to the instruction memory 108.
If there is a coefficient to be set in the local memory 107, the local memory 107 is also set at the same time. DS
The P104 monitors the download of the initial processing program in step S101, and when the download is completed, executes the initial processing in step S102.

Next, the CPU 109 loads the processing program corresponding to the first encoding method into the instruction memory 1
At the same time when the download is started in 08, a control signal is sent to cause the document reading unit 101 to start reading the document. The image data for one scan output from the document reading unit 101 is sequentially stored in the image memory 102. On the other hand, DSP1
04 monitors the download of this processing program in step S103, and when the download is completed, starts encoding the image data stored in the image memory 102. That is, the image data is read from the image memory 102 in a predetermined unit in step S104, the encoding is executed by the program (first encoding method) stored in the instruction memory 108 in step S105, and the encoded data is encoded in step S106. Write to the memory 105.

At this time, if the image data stored in the image memory 102 is multi-valued image data and the encoding method of the processing program stored in the instruction memory 108 is for binary images, the DSP 104 The image data read from the image memory 102 is binarized and then encoded. A coefficient set in the local memory 107 may be used as the threshold value for this binarization.

Next, the DSP 104 carries out step S107.
Then, it is determined whether or not the encoding of the image data for one shuttle is completed, and if it is not completed, the processing is returned to step S104. That is, steps S104 to S107 are repeated until all the image data of the first shuttle has been encoded. When all the image data of the first shuttle is encoded by the first encoding method, the DSP 104 notifies the CPU 109 that the encoding by the first encoding method is completed, and by the CPU 109 in step S108. Wait for the processing program of the second encoding method to be downloaded.

When this download is completed, the DSP 10
In 4, the image data of the first shuttle is encoded by the second encoding method. That is, step S
In step 109, the image data is read from the image memory 102 in a predetermined unit, and in step S110 encoding is executed by the program (second encoding method) stored in the instruction memory 108. In step S111, the encoded data is transferred to the code memory 105. Write. In addition, in step S111, the code data by the second encoding method is the first
The data is stored in an area different from the area in which the code data according to the encoding method is stored. That is, the code data according to the first coding method and the code data according to the second coding method are stored in different areas of the code memory 105.

Next, the DSP 104 carries out step S112.
Then, it is determined whether or not the encoding of the image data for one shuttle has been completed, and if not completed, the process returns to step S109. That is, steps S109 to S112 are repeated until all the image data of one shuttle has been encoded. When all the image data of the first shuttle has been encoded by the second encoding method, the DSP 104 proceeds to step S1.
At 13, it is determined whether or not the encoding of all the original images is completed, and if so, the encoding standby state is set,
If not completed, image data of the next shuttle is requested to the CPU 109 in step S114. CPU10 that received this request
9 sends a control signal to cause the document reading unit 101 to start reading the next shuttle. DSP104, step S1
In step 15, the image data of the next shuttle is monitored to be stored in the image memory 102, and when the image data is stored, the process returns to step S103 and waits for the processing program of the first encoding method to be downloaded. When the download is completed, the image data of the second shuttle is encoded in the same procedure as described above.

In this way, the DSP 104 repeats the above-described processing until the encoding of the entire original image is completed, and enters the encoding standby state when the entire encoding is completed.
It should be noted that in the standby state, when the CPU 109 again issues an encoding instruction, the processing is restarted from step S103. The code data stored in the code memory 105 according to the two coding methods is transmitted to the transmission path 110 via the CCU 106 under the control and selection of the CPU 109. The selection of the coded data by the CPU 109 is performed according to the coded data amount, the coding method supported by the communication partner, and the like. Further, the selection may be made according to the characteristics of the image of each shuttle, for example, the binary image and the multi-valued image.

As described above, according to this embodiment,
By changing the processing program downloaded to the instruction memory 108 for each shuttle, one image can be encoded by different encoding methods.
The first and second encoding methods described above include, for example, an MMR method suitable for binary image compression, a so-called JBIG dynamic arithmetic encoding method, and a so-called JPEG ADCT method suitable for multi-value image compression. Can be applied. Moreover, the combination can be performed arbitrarily.

[0025]

[Second Embodiment] An image processing apparatus according to a second embodiment of the present invention will be described below. In the second embodiment, the first
About the same configuration as the embodiment, the same reference numerals are given,
Detailed description thereof will be omitted. 10 and 11 are flowcharts showing an example of the processing procedure of this embodiment.

When this embodiment is started, the CPU 109
A program for performing initial processing is downloaded to the instruction memory 108. If there is a coefficient to be set in the local memory 107, the local memory 107 is also set at the same time. The DSP 104 monitors the download of the initial processing program in step S201, and when the download is completed, the step S20 is performed.
Initial processing is executed at 2.

Next, the CPU 109 starts downloading the encoding program to the instruction memory 108, and at the same time, sends a control signal to cause the document reading unit 101 to start reading the document. Image data for one scan output from the document reading unit 101 is sequentially stored in the image memory 102.
Stored in. On the other hand, the DSP 104 has a step S203.
Then, the download of this encoding program is monitored, and when the download is completed, the encoding of the image data stored in the image memory 102 is started. That is, step S2
In 04, the image data is read from the image memory 102 in a predetermined unit, and in step S205, the instruction memory 1
Encoding is executed by the encoding program stored in 08, and the encoded data is stored in the code memory 105 in step S206.
Write to.

At this time, if the image data stored in the image memory 102 is multi-valued image data and the encoding program stored in the instruction memory 108 is for a binary image, the DSP 104 causes the image memory 102 to operate.
The image data read from is binarized and then encoded. A coefficient set in the local memory 107 may be used as the threshold value for this binarization.

Next, the DSP 104 carries out step S207.
Then, it is determined whether or not the encoding of the image data for one shuttle has been completed, and if not completed, the process returns to step S204. That is, steps S204 to S207 are repeated until all the image data of the first shuttle has been encoded. When all the image data of the first shuttle has been encoded, the encoding is interrupted and the standby state for encoding or decoding is entered.

Subsequently, the DSP 104 carries out step S208.
Then, it is determined whether the code data received from the transmission path 110 is in the code memory 105, that is, whether there is code data that has not been decoded.
The process jumps to, and if there is, the process proceeds to step S209. On the other hand, when the code data received in the code memory 105 is stored when the encoding of the image data of the first shuttle is completed, the CPU 109 executes the decoding program corresponding to the encoding method of the code data. Download to the memory 108. In other words, if the received code data is JPEG-encoded, download a decoding program that conforms to it, and if the received code data is MMR-encoded, use the same method. Download the decryption program. The code data encoded by the DSP 104 and the received code data are stored in different areas of the code memory 105.

In step S209, the DSP 104 sends the CPU 1
Wait until the decoding program is downloaded by 09, and when this download is completed, the code memory 10
The decoding of the code data stored in 5 is started. That is,
The code data is read from the code memory 105 in step S210, the decoding is executed by the decoding program stored in the instruction memory 108 in step S211, and the image data decoded in step S212 is written in the image memory 102. Note that the decoded image data and the image data to be encoded are stored in different areas of the image memory 102.

Next, the DSP 104 causes the step S213.
Then, it is determined whether or not the decoding of the code data for one shuttle has been completed, and if it has not been completed, the process returns to step S210. That is, steps S210 to S213 are repeated until the image data for one shuttle is decoded. If the image data for one shuttle has been decoded, or if there is no undecoded code data in step S208, the DSP 104 determines in step S214 whether or not all the original images have been coded. If completed, the process proceeds to step S216, and if not completed, the process proceeds to step S215.

If all the original images have not been encoded, CP
The U104 requests the CPU 109 for the image data of the next shuttle in step S215. CPU10 that received this request
9 sends a control signal to cause the document reading unit 101 to start reading the next shuttle. The DSP 104 performs step S2
At 18, the image data of the next shuttle is monitored to be stored in the image memory 102. When the image data is stored, the process returns to step S203, waits for the encoding program to be downloaded, and when the download is completed, The image data of the second shuttle is encoded by the same procedure as described above. If there is no code data that has not been decoded in step S208, the coding program has already been downloaded.

On the other hand, when the encoding of all the original images is completed, the CPU 104 determines in step S216 whether or not the decoding of all the encoded data is completed, and if so, the standby state is set, If not completed, step S
At 217, the CPU 109 requests the code data for the next shuttle to the CPU 109, returns to step S209, waits for the decoding program to be downloaded, and when the download is completed,
The image data for the second shuttle is decoded by the same procedure as described above. If all the original images have been encoded in step S214, the decoding program has already been downloaded.

In this way, the DSP 104 repeats the above-described encoding until the encoding of the entire original image is completed,
The above decoding is repeated until the decoding of the received coded data is completed, and when the entire coding and decoding is completed, the standby state is entered. If the coding ends earlier than the decoding, only the decoding is repeated, and if the decoding ends earlier than the coding, only the coding is repeated. Further, in the standby state, when the CPU 109 again issues an encoding instruction, the processing is restarted from step S203, and the CPU 1
If there is a decoding instruction again from 09, the processing is restarted from step S209.

The code data stored in the code memory 105 is transmitted to the transmission line 110 via the CCU 106 under the control of the CPU 109. The image data stored in the image memory 102, that is, the decoded image data, is sent to the image output unit 103 and the image is output. As described above, according to the present embodiment, by changing the processing program downloaded to the instruction memory 108 in shuttle units (predetermined block units), encoding and decoding are alternately performed by a common processing circuit. You can Therefore, the document reading unit 101 serving as an image input unit
The image input and encoding from the CCU 106, the decoding of the code data received via the CCU 106, and the output to the image output unit 103 can be performed in a time-divisional manner in parallel in shuttle units.

[0037]

[Third Embodiment] An image processing apparatus according to a third embodiment of the present invention will be described below. In the third embodiment, the first
About the same configuration as the embodiment, the same reference numerals are given,
Detailed description thereof will be omitted. In the first embodiment described above, as shown in an example in FIG. 5, the encoding unit is composed of a digital signal processor (hereinafter referred to as “DSP”) 7,
An example of the image processing apparatus that switches the encoding method by changing the processing program downloaded to the instruction memory 8 has been described. However, such an image processing apparatus has a problem that the encoding time becomes long when the processing of the applied encoding method is complicated or when there are many processing steps, and the present embodiment solves this problem. Is.

FIG. 12 is a block diagram showing an example of the arrangement of an image communication apparatus equipped with the image processing apparatus of this embodiment. In the figure, reference numeral 104a denotes a DSP, which is a program stored in the instruction memory 107a by the CPU 109 and CP.
The image data stored in the image memory 102 or the image data to be written in the image memory 102 is processed according to the coefficient and the like stored in the local memory 108a by the U109.

104b is also a DSP, and the image data stored in the image memory 102 or the image memory 102 is stored in the image memory 102 according to the program stored in the instruction memory 107b by the CPU 109 and the coefficient stored in the local memory 108b by the CPU 109. Process the image data to be written. 111 is dual port RAM
(Hereinafter referred to as "DPRAM"), DSP104a and DSP104
It is arranged between both DSPs and is controlled by the CPU 109 to mediate the exchange of data with b.

Further, 114 and 115 are synchronization signals, respectively. The synchronization signal 114 is sent from the DSP 104a to the DSP 104b, and the synchronization signal 115 is sent from the DSP 104b to the DSP 104a. 13 and 14 show the DSP 104
FIG. 15 and FIG. 16 show an example of the processing procedure of FIG.
4b is a flowchart showing an example of each processing procedure of 4b, which will be described later in detail, but is executed in synchronization with the synchronization signals 114 and 115.

When this embodiment is started, the CPU 109
A program for performing initial processing is downloaded to the instruction memories 108a and 108b. Also,
If there are coefficients to be set in the local memories 107a and 107b, the local memories 107a and 107b must be simultaneously set.
Also set b. The DSPs 104a and 104b respectively monitor the download of the initial processing program in steps S301 and S401, and when the download is completed,
Initial processing is executed in steps S302 and S402.

Next, the CPU 109 instructs the instruction memory 1 of the processing program corresponding to the first encoding method.
Download to 08a and 108b is started. When the image to be encoded is in color, for example, the first half of the JPEG or JBIG processing program described above is downloaded to the instruction memory 108a, and the second half is downloaded to the instruction memory 108b. Note that, for example, the processing in the first half is orthogonal transformation such as color space conversion and discrete cosine transform (hereinafter referred to as “DCT”), and the processing in the second half is quantization and Huffman coding. When the image to be encoded is black and white, for example, the first half of the processing program of the MR encoding system or the MMR encoding system is downloaded to the instruction memory 108a and the second half of the processing program is downloaded to the instruction memory 108b.
Note that, for example, the first half processing is binarization for converting a multivalued image into a binary image, and the second half processing is encoding.

That is, the two downloaded processing programs are used to encode the image data by one method. Therefore, it is desirable that the loads of the respective divided processes be about the same. This is the same when the decoding process is divided. The CPU 109 sends a control signal together with the download of the processing program to cause the document reading unit 101 to start reading the document. The image data for one scan output from the document reading unit 101 is sequentially stored in the image memory 10.
Stored in 2.

[Processing Procedure of DSP 104a] DSP 104a
Monitors the download of the processing program in step S303, and when the download is completed, step S11
In step 5, the image data of the next shuttle is monitored to be stored in the image memory 102, and when the image data is stored, the processing of the image data stored in the image memory 102 is started. That is, in step S305, the image data is read from the image memory 102 in a predetermined unit, the synchronization signal 115 is determined in step S306, and the writing to the DPRAM 111 is waited, and when it is possible, the instruction memory 108a is stored in step S307. Encoding processing is executed by the executed program, and the processing data is written in the DPRAM 111 in step S308.

Subsequently, the DSP 104a carries out step S30.
After inverting the synchronization signal 114 in step S9, it is determined in step S310 whether the processing of the image data of one shuttle has been completed. If not completed, the processing is returned to step S305. That is, steps S305 to S310 are repeated until all the image data of the first shuttle has been processed. 1
When the shuttle image data processing is complete, the DSP 104
In step S311, a determines whether or not the current process is the second encoding method, and if so, determines step S313.
Proceed to. If not, step S31
In step 2, after requesting the CPU 109 to download the processing program of the second encoding method, the processing is returned to step S303, and in steps S303 to S310, the same processing as the above is executed by the second encoding method, All image data of the first shuttle is processed by the second encoding method.

If the current processing is the second encoding method, the DSP 104a determines in step S313 whether or not the processing of all original images has been completed, and if so, the standby state is established. If not completed, the CPU 109 is requested to download the processing program of the first encoding method in step S314, and the image data of the next shuttle is requested to the CPU 109 in step S315. Receiving this request, the CPU 109 downloads the processing program of the first encoding method into the instruction memory 107a and sends a control signal to send the original reading section 10a.
Cause 1 to start reading the next shuttle. After issuing this request, the DSP 104a returns the process to step S303, and when the download and the setting of the image data of the second shuttle are completed, the same process as described above is performed by the first encoding method in steps S305 to S310. After that, all the image data of the second shuttle is processed by the first encoding method.

In this way, the DSP 104a repeats the above-described processing until the processing of the entire original image is completed, and enters the standby state when the entire processing is completed. In the standby state, when the CPU 109 issues a processing instruction again, the processing is restarted from step S303. [Processing Procedure of DSP 104b] The DSP 104b executes step S
When the download of the processing program is monitored in 403 and the download is completed, the synchronization signal 1 is detected in step S404.
When it is determined that the data can be read from the DPRAM 111, the processing of the data stored in the DPRAM 111 is started. That is, step S405
In step S406, the data is read from the DPRAM 111 in a predetermined unit, and the synchronization signal 115 is inverted in step S406.
In step 7, the encoding process is executed by the program stored in the instruction memory 108b, and step S408 is performed.
Write the code data to the code memory 105 with step S
At 409, it is determined whether the processing of the image data for one shuttle has been completed, and if not completed, the processing is returned to step S404. That is, steps S404 to S409 are repeated until all the image data of the first shuttle has been processed.

When the processing of the image data for one shuttle is completed, the DSP 104b determines in step S410 whether or not the current processing is the second encoding method, and if so, advances the processing to step S412. Otherwise, in step S411, after requesting the CPU 109 to download the processing program of the second encoding method, the process returns to step S403, and steps S403 to S410.
Then, the same processing as described above is executed by the second encoding method, and the processing of the second encoding method is performed on all the image data of the first shuttle.

If the current processing is the second encoding method, the DSP 104b determines in step S412 whether or not the processing of all original images has been completed, and if so, the standby state is reached. If not completed, the CPU 109 is requested to download the processing program of the first encoding method in step S413. CPU that received this request
109 downloads the processing program of the first encoding method to the instruction memory 107b. After issuing this request, the DSP 104b returns the process to step S403, and when the download is completed, the step S4
From 04 to S409, the same processing as described above is executed by the first encoding method, and the processing of the first encoding method is performed on all the image data of the second shuttle.

[Synchronization Method] Both DSPs perform writing and reading in the DPRAM 111 based on the states of the synchronization signals 114 and 115. In other words, when encoding, DSP1
04a writes to the DPRAM 111 when the states of both sync signals are different, and the DSP 104b reads from the DPRAM 111 when the states of both sync signals match.

FIG. 17 is a timing chart for explaining the synchronous relationship between the DSPs 104a and 104b. In the figure, if the synchronization signal 114 is set to the L level and the synchronization signal 115 is set to the H level in the initial processing of 601 and 613, the states of both the synchronization signals are different, and therefore the DSP 104a uses 603 to set the image memory 102. The image data is read from, the encoding process is performed in 604, and 605
Write the processed data to DPRAM111 with
Since 4 is inverted, the image data is read again in 606, and then the standby state is entered in 607.

On the other hand, the DSP 104b is the DPRAM 111 at first.
Since it cannot be read from, it enters the standby state at 614. When the sync signal 114 is inverted, DPRA is performed at 615.
The processed data is read from M111, the synchronizing signal 115 is inverted, the encoding process is performed in 616, the encoded data is written in the encoded memory 105 in 617, and the standby state is established in 618.

When the synchronization signal 115 is inverted, the DSP 104
a performs encoding processing at 608 and DPRAM 11 at 609.
Since the processed data is written to 1 and the synchronizing signal 114 is inverted, after the image data is read again at 610, the standby state is reached at 611. When the sync signal 114 is inverted,
The DSP 104b reads the processed data from the DPRAM 111 again at 619 and inverts the synchronization signal 115.

In this way, both DSPs repeat the above-described encoding until the encoding of the entire original image is completed while timing the processing, and when the entire encoding is completed, the DSP enters the standby state. In the standby state, CP
When the U109 again issues an encoding instruction, the DSP 104a restarts the process from step S303, and the DSP 104b restarts the process from step S403.

The code data stored in the code memory 105 is transmitted to the transmission line 110 via the CCU 106 under the control of the CPU 109. As described above, according to this embodiment, in addition to the same effect as the first embodiment, two DS
Since the coding process is shared by P, the coding time does not become long even when the process of the applied coding method is complicated or the number of processing steps is large. In addition, DPRAM between the two DSPs
Since it is connected, the DSP does not have to store the processed data in its internal memory, which also has the effect of facilitating the exchange of data.

[0056]

[Fourth Embodiment] An image processing apparatus according to a fourth embodiment of the present invention will be described below. In the fourth embodiment, the third
About the same configuration as the embodiment, the same reference numerals are given,
Detailed description thereof will be omitted. In the above-described second embodiment, the image processing apparatus having the configuration shown in FIG. 5 for switching the encoding / decoding by changing the processing program has been described. However, such an image processing apparatus has a problem that the encoding / decoding time becomes long when the processing of the applied encoding method is complicated or when there are many processing steps, and this embodiment solves this problem. To do.

FIG. 18 is a flowchart showing an example of the processing procedure of the DSP 104b, and FIG. 19 is a flowchart showing an example of the processing procedure of the DSP 104a. Since the basic processing procedure is the same as that described in the third embodiment, only the part related to decoding is shown in FIGS. 18 and 19. That is, FIG.
8 is steps S410 and S412 (see FIG. 1) of the third embodiment.
6), FIG. 19 is inserted between steps S311 and S313 (FIG. 14) of the third embodiment.

[Processing procedure of DSP 104b] Image memory 1
When the image data of one shuttle stored in 02 is encoded by two encoding methods, the DSP 104b executes step S
In 421, it is determined whether the code data received from the transmission path 110 is in the code memory 105, that is, whether there is code data that has not been decoded.
Processing jumps to 412, and if there is, step S422
Proceed to.

On the other hand, when the code data received in the code memory 105 is stored when the encoding of the image data for one shuttle is completed, the CPU 109 executes the decoding processing program corresponding to the encoding method of the code data. Is downloaded to the instruction memory 108b. That is,
If the received code data is JPEG encoded, download a decoding processing program that conforms to the same method. If the received code data is MMR encoded, the same decoding method is used. Download the processing program. The code data encoded by the DSP 104b and the received code data are stored in different areas of the code memory 105.

In step S422, the DSP 104b sends the CPU
Waiting for the decoding processing program to be downloaded by 109, and when this downloading is completed, decoding of the code data stored in the code memory 105 is started. That is, the code data is read from the code memory 105 in step S423, the synchronization signal 114 is determined in step S424, and the writing to the DPRAM 111 is waited,
When it becomes possible, the decryption processing is executed by the decryption processing program stored in the instruction memory 108b in step S425, and the processed data is DPRA in step S426.
Write to M111. The decoded data and the encoded data are stored in different areas of the DPRAM 111.

Subsequently, the DSP 104b carries out step S42.
After inverting the synchronization signal 115 in step 7, it is determined in step S428 whether or not the processing for one shuttle has been completed. If completed, the processing proceeds to step S412. If not completed, the processing proceeds to step S423. return. That is, steps S423 to S423 are performed until the code data for one shuttle is processed.
428 is repeated.

[Processing procedure of DSP 104a] Image memory 1
When the image data of one shuttle stored in 02 is encoded by the two encoding methods, the DSP 104a executes step S
In step 321, the undecrypted processed data is DPRAM111.
If there is, the process jumps to step S313 if there is no, and the process proceeds to step S322 if there is.

On the other hand, if the CPU 109 stores the undecoded processing data in the DPRAM 111 when the encoding of the image data of one shuttle is completed, the CPU 109 stores the decoding processing program corresponding to the encoding method in the instruction memory. Download to 108a. DSP104a is
In step S322, the CPU 109 waits for the decryption processing program to be downloaded. When this download is completed, the synchronization signal 115 is determined in step S323 to wait for reading from the DPRAM 111, and when it is possible, the DPRAM 111 is read. The decoding process of the stored process data is started. That is, in step S324, DP
The processing data is read from the RAM 111, and step S325
The sync signal 114 is inverted in step S326, the process is executed by the decoding process program stored in the instruction memory 108a in step S326, and the image data decoded in step S327 is written to the image memory 102. Note that the decoded image data and the image data to be encoded are stored in different areas of the image memory 102.

Subsequently, the DSP 104a carries out step S32.
In step 8, it is determined whether or not the decoding process for one shuttle has been completed, and if it is completed, the process proceeds to step S313, and if it is not completed, the process returns to step S323. That is, step S32 is performed until the code data for one shuttle is processed.
3 to S328 are repeated. Although not shown in detail in FIGS. 18 and 19, in steps S412 and S313, branching is performed according to the end state of the process. That is, when both the encoding and the decoding are completed, the standby state is entered, and when neither is completed or only the decoding is completed, the process proceeds to steps S413 and S314, and only the encoding is completed and the decoding is completed. If is not completed, steps S423 and S32
The process proceeds to 3.

As described above, according to this embodiment,
In addition to the same effects as the second embodiment, the encoding / decoding processing is shared by the two DSPs, so even if the processing of the applied encoding method is complicated or there are many processing steps, the encoding / decoding time Will never be long. In addition, D between the two DSPs
Since the PRAM is connected, the DSP does not need to store the processed data in its internal memory, which also has the effect of facilitating the exchange of data.

[0066]

[Fifth Embodiment] An image processing apparatus according to a fifth embodiment of the present invention will be described below. In addition, in the fifth embodiment, the third
About the same configuration as the embodiment, the same reference numerals are given,
Detailed description thereof will be omitted. In the above-described third embodiment, the configuration in which both DSPs exchange data with the DPRAM provided between the two DSPs is shown. However, as shown in an example in FIG. 20, this embodiment eliminates this DPRAM. The image communication device includes an image processing device.

FIG. 21 is a flowchart showing an example of the processing procedure of the DSP 104a, and FIG. 22 is a flowchart showing an example of the processing procedure of the DSP 104b. Since the basic processing procedure is the same as that described in the third embodiment, only the characteristic parts of this embodiment are shown in FIGS. 21 and 22. That is, steps S501 to S504 shown in FIG. 21 are steps S306 to S309 of the third embodiment (see FIG.
4), which is step S60 shown in FIG.
Steps 1 to S605 replace steps S404 to S408 (FIGS. 15 and 16) of the third embodiment.

[Processing Procedure of DSP 104a] DSP 104a
In step S305, the image data is read from the image memory 102 in a predetermined unit, and in step S501, the encoding process is executed by the program stored in the instruction memory 108a and is temporarily stored in the built-in memory or the like.
In step S502, the synchronization signal 115 is determined to wait for transfer of processed data. When transfer is possible, the synchronization signal 114 is inverted in step S503, and then the processed data is transmitted to the DSP 104b in step S504. It should be noted that the synchronization signal for determining whether transfer is possible is such that its state is inverted depending on whether the unit of the image data to be encoded is an even-numbered or odd-numbered unit. Further, data transfer is performed by changing both sync signals for each predetermined number of data determined as a transfer unit in advance.

Subsequently, the DSP 104a carries out step S31.
At 0, it is determined whether or not the processing of the image data for one shuttle is completed, and if not completed, the processing is returned to step S305. That is, the above processing is repeated until all the image data of one shuttle has been processed. [Processing Procedure of DSP 104b] The DSP 104b executes step S
At 403, the download of the processing program is monitored, and when the download is completed, at step S601, the synchronization signal 1
When it is possible to transfer the data by judging 14 and the transfer becomes possible, in step S602, the processed data is received from the DSP 104b and temporarily stored in the built-in memory or the like. That is, step S602 and step S504 are executed in synchronization.

Subsequently, the DSP 104b carries out step S60.
In step S604, the encoding process is executed by the program stored in the instruction memory 108b in step S3.
Write the code data in the code memory 105 with step S
After inverting the synchronization signal 115 in 605, step S40
In step 9, it is determined whether or not the processing of the image data for one shuttle has been completed. If not completed, the processing returns to step S601. That is, steps S601 to S409 are repeated until all image data of one shuttle has been processed.

As described above, according to this embodiment,
Since the encoding processing is shared by the two DSPs, even when the processing of the applied encoding method is complicated or there are many processing steps,
The encoding time does not become long, and since the DPRAM is not used, the configuration is simpler and the cost can be reduced as compared with the third embodiment.

[0072]

[Sixth Embodiment] An image processing apparatus according to a sixth embodiment of the present invention will be described below. In the sixth embodiment, the third
About the same configuration as the embodiment, the same reference numerals are given,
Detailed description thereof will be omitted. In the above-described third embodiment, the configuration in which both DSPs exchange data with the DPRAM provided between the two DSPs is shown. However, as shown in an example in FIG. 20, this embodiment eliminates this DPRAM. It is an image communication apparatus having a configuration.

FIG. 23 is a flowchart showing an example of the processing procedure of the DSP 104b, and FIG. 24 is a flowchart showing an example of the processing procedure of the DSP 104a. Since the basic processing procedure is the same as that described in the third embodiment, only the part related to decoding is shown in FIGS. 23 and 24. That is, FIG.
3 is steps S410 and S412 of the third embodiment (see FIG.
24) is inserted between steps S311 and S313 (FIG. 14) of the third embodiment.

[Processing procedure of DSP 104b] Image memory 1
When the image data of one shuttle stored in 02 is encoded by two encoding methods, the DSP 104b executes step S
At 431, it is determined whether the code data received from the transmission path 110 is in the code memory 105, that is, whether there is code data that has not been decoded. If not, step S
Processing jumps to 412, and if there is, step S432
Proceed to.

On the other hand, as described in the fourth embodiment, the CPU 109 determines that the code data received in the code memory 105 when the image data of one shuttle has been coded is stored in the code memory 105. The decoding processing program corresponding to the encoding method of the instruction memory 108b
To download. The DSP 104b has a step S43.
In step 2, the CPU 109 waits for the decoding processing program to be downloaded, and when this downloading is completed, the decoding of the code data stored in the code memory 105 is started. That is, in step S433, the code memory 10
5, the coded data is read from step 5, the decoding process is executed by the decoding process program stored in the instruction memory 108b in step S434, the synchronization signal 114 is determined in step S435, and the process data is transferred. When it becomes possible, the synchronization signal 115 is inverted in step S436, and then the processed data is transmitted to the DSP 104a in step S437.

Subsequently, the DSP 104b carries out step S43.
In 8 it is judged whether the processing for 1 shuttle has been completed,
If completed, the process proceeds to step S412. If not completed, the process returns to step S433. That is, steps S433 to S438 are repeated until the code data for one shuttle is processed. [Processing Procedure of DSP 104a] When the image data of one shuttle stored in the image memory 102 is encoded by two encoding methods, the DSP 104b determines in step S331 whether the undecoded processed data is in the DPRAM 111. It is determined whether or not, and if not, the process jumps to step S313, and if there is, the process proceeds to step S332.

On the other hand, as described in the fourth embodiment, the CPU 109, if there is undecoded processing data when the encoding of the image data of one shuttle is completed, the decoding corresponding to the encoding method. The processing program is downloaded to the instruction memory 108a. DSP104a
Waits for the decryption processing program to be downloaded by the CPU 109 in step S332, and when this download is completed, the synchronization signal 11 is transmitted in step S333.
When it is possible to read the processed data, the process waits until it becomes possible to read the processed data. That is, the process data is received in step S334 synchronized with step S437, the process is executed by the decoding process program stored in the instruction memory 108a in step S335, and the synchronization signal 11 is received in step S336.
4 is inverted, and the image data decoded in step S337 is written in the image memory 102.

Subsequently, the DSP 104a carries out step S33.
In step S8, it is determined whether or not the decoding process for one shuttle has been completed, and if it is completed, the process proceeds to step S313, and if it is not completed, the process returns to step S333. That is, step S33 is performed until the code data for one shuttle is processed.
3 to S338 are repeated. Although not shown in detail in FIGS. 23 and 24, in steps S412 and S313, branching is performed according to the end state of the process. That is, when both the encoding and the decoding are completed, the standby state is entered, and when neither is completed or only the decoding is completed, the process proceeds to steps S413 and S314, and only the encoding is completed and the decoding is completed. Is not completed, steps S433 and S33
The process proceeds to 3.

As described above, according to this embodiment,
Since the encoding / decoding processing is shared by the two DSPs, the encoding / decoding time does not increase even when the processing of the applied encoding method is complicated or there are many processing steps. As compared with the fourth embodiment, the structure is simple and the cost can be reduced.

[0080]

Seventh Embodiment An image processing apparatus according to the seventh embodiment of the present invention will be described below. In the seventh embodiment, the third
About the same configuration as the embodiment, the same reference numerals are given,
Detailed description thereof will be omitted. In each of the embodiments described above, there is a problem in that it takes time to process the margin data when the JPEG method is applied, and this embodiment solves this problem.

First, encoding of image data by the JPEG system will be described. The JPEG system consists of multiple systems, the most basic of which is the baseline system. FIG. 25 is a diagram showing a data compression procedure of the baseline system. First, the input image data read by a document reading device such as an image scanner is divided into blocks of 8 × 8 pixels. The subsequent compression processing is performed in this block unit. In the JPEG method, there is no regulation on the color space in which the image data read by the document reading device is coded, but a color space conversion process is often performed as a process prior to the coding process. As the color space to be converted, a color space that enables highly efficient coding processing, for example, a color space YCbCr, YIQ, Lab or the like composed of a luminance signal and a color signal is often used. In many cases, subsampling processing is performed on the color signal after color space conversion. In the baseline system, image data of each divided block (color space read by an image scanner or image data after color space conversion) is a kind of orthogonal transformation DC
Apply T (401).

The DCT converts the input image data into spatial frequency component data. The upper leftmost coefficient of the 8 × 8 coefficient after conversion is called a direct current (DC) component, and has a value corresponding to the average value of the image data of the block before conversion. Excluding that
The 63 coefficients are called alternating current (AC) components, and indicate how many spatial frequency components corresponding to the position are included in the image data of the block before conversion.

A scale factor (hereinafter, “Q factor”) is added to 8 × 8 threshold values (hereinafter, “quantization table”).
The DCT transform coefficient after conversion is divided by a value obtained by multiplying by () and quantized (402). In the case of the JPEG method, quantization is a major factor in determining the compression rate. In other words, when the Q factor is increased, the threshold value of the quantization table to be used is increased overall, so that the compression rate is improved, but the image information is suppressed by that much, and the image quality is deteriorated. Conversely, if the Q factor is made smaller, the threshold value of the quantization table used becomes smaller overall, so the compression rate becomes worse, but the image quality improves. In the JPEG-based baseline system, the quantization table used to quantize one page of image data has only one type of luminance component and one color component.

The quantized DCT coefficient is subjected to different encoding processing for the DC component and the AC component. The DC component uses the strength of the correlation between adjacent blocks to
Huffman coding is performed on the difference from the DC component of the × 8 block (403, 404). The AC component is subjected to zigzag scanning from low to high spatial frequencies in the block, rearranged in a one-dimensional array, and coefficients other than zero (effective coefficient) and the number of consecutive zeros (ineffective coefficient) ( Run length) and perform two-dimensional Huffman coding (405 to 40).
9).

Now, the coding unit of the image communication apparatus needs to perform a margin process in addition to the coding or decoding. The margin processing is to add a margin necessary for communication on the transmitting side, and in many cases, the margin data added as a margin is “white”. Therefore, when encoding by the JPEG system, it is necessary to encode not only the image data read by the image reading device but also the added margin data.

In the following, in order to simplify the explanation,
In the present embodiment, it is assumed that only the JPEG system encoding is executed. However, as in the third embodiment and the like, the encoding system is switched,
It goes without saying that one image can be encoded by different encoding methods. [Processing Procedure of DSP 104a] FIGS.
It is a flow chart which shows an example of the processing procedure of a.
Since the processing procedure in the embodiment is substantially the same as the processing procedure described in FIGS. 13 and 14, the same steps are denoted by the same reference numerals and detailed description of each step is omitted. However, as described above, since the present embodiment executes only the JPEG encoding, steps S311, S312, S31 of the third embodiment are executed.
There is no 4.

[Processing Procedure of DSP 104b] FIGS. 28 to 30 are flowcharts showing an example of the processing procedure of the DSP 104b. When this embodiment is activated, the CPU 109
A program for performing initial processing is downloaded to the instruction memory 108b. DSP104b is
In step S701, the download of the initial processing program is monitored, and when the download is completed, the initial processing is executed in step S702.

Next, the CPU 109 starts the download of the processing program corresponding to the JPEG system to the instruction memory 108b. The DSP 104b monitors the download of the processing program in step S703, and when the download is completed, sets the synchronization signal 115 to the write prohibition of the DPRAM 111 in step S704. Then, D
The SP 104b sends the local memory 10 in step S705.
The previous block data flag register (hereinafter simply referred to as "register") 2201 mapped to 7b is set to "1", and the coded value of the margin data is set in the margin code memory 2202 mapped to the local memory 107b in step S706. The local memory 107b
FIG. 31 shows an example of the mapping state of.

Further, in the margin code memory 2202, it is assumed that the block data to be encoded is the same as the data of the previous block, and the code data is set. When the signals to be encoded are three signals and the encoding processing form is block interleaving of the JPEG system, the code in which the DC difference of the first signal is zero and the AC components of the first signal are all zero (EOB: End of
Block), the code in which the DC difference of the second signal is zero, the second
Is a code in which the AC component of the signal is zero (EOB), the code in which the DC difference of the third signal is zero, and the code in which the AC component of the third signal is all zero (EOB). The color space to be encoded is YCbCr, and the Huffman table referenced during encoding is JPE.
In the case of the G recommendation table, the sign '0 where the DC difference of the Y signal is zero
0 ', a signal' 1010 'in which the AC component of the Y signal is all zero, and C
Since the signal '00' in which the DC difference between b and Cr is zero and the code '00' in which the AC components of the Cb and Cr signals are all zero are connected, '00101000000000' is stored in the blank code memory 2202.
Is set.

FIG. 32 is a diagram showing an example of the structure of block image data to be encoded. The data 1401 to 1413 are block data to be processed by the JPEG system (8 × 8 pixels).
1414 indicates the initial value of the register 2201 by 1415.
˜1427 indicate the value of the register 2201 after encoding 1401 to 1413, respectively, and 1428 to 1
Reference numeral 440 indicates whether or not color space conversion, DCT, quantization, and Huffman coding are to be performed at the time of encoding 1401 to 1413, with a symbol ◯ (performs) and a symbol x (does not perform). In this embodiment, when the block image data to be encoded is blank space data and the value of the register 2201 at that time is “1”, color space conversion, DCT, quantization, and Huffman encoding are not performed. The data 1401 is assumed to be the first data of the page to be encoded.

If the image data to be coded is the first data of the page in step S707, the DSP 104b advances the process to step S715. Then, in step S715, it is determined whether the data to be encoded in the step is blank space data. Since the data 1401 is blank space data, blank space data is encoded in step S716. That is, the margin data for one block (three signal components)
It is generated and encoded according to the process of the block shown in FIG. The generated code data is sequentially stored in the code memory 10
Written to 5. Subsequently, the DSP 104b performs step S
In 723, the value of the register 2201 is set to “0” (14 in FIG. 32).
15).

If the encoding of the entire original document to be transmitted is completed, the DSP 104b notifies the CPU 109 of the completion of encoding through an interrupt process or the like through step S714, and enters the standby state.
Since the following exists, the process proceeds to step S708. DSP10
4b determines in step S708 whether or not it is blank space data. Since the data 1402 is blank space data, the flow advances to step S709, and in step S709 the value of the previous block data flag is determined, and at this time, the register 2201
Is '0' (1415 in FIG. 32), so step S7
In step S711, the register 2201 is set to "1" (1416 in FIG. 32), the margin data is generated as three signal components in step S712, and the code data generated in step S713 is written in the code memory 105.

Since the following data 1403 is also margin data, it passes through steps S714 and S708 and then to step S709.
The register 2201 is set to "1" (Fig. 32).
1416), the process proceeds to step S710, and the code data set in the margin code memory 2202 is written in the code memory 105 in step S710 without performing the coding.

Since the following data 1404 is not blank space data, steps S714 and S708 are carried out, and then step S71.
7, the sync signal 115 is sent to DPRAM in step S717.
The write permission of 111 is set, and in step S718, the synchronization signal 114 waits for the read permission state. During this time, the DSP 104a writes the processing data to the DPRAM 111,
The sync signal 114 is inverted. When the read permission status is reached, DS
The P104b reads the processed data from the DPRAM 111 in step S719, inverts the synchronization signal 115 in step S720, executes the encoding process in step S721, and writes the encoded data in the code memory 105 in step S722.

Subsequently, the DSP 104b carries out step S72.
In step 3, the value of the register 2201 is set to “0” (141 in FIG. 32).
8), and in step S714, it is determined again whether or not the coding of all image data has been completed. In this way, both DSPs repeat the above-described encoding until the encoding of the entire original image is completed while keeping the processing timing, and when the entire encoding is completed, the DSP enters the standby state. In the standby state, when the CPU 109 again issues an encoding instruction, the DSP 104a restarts the process from step S303, and the DSP 104b restarts the process from step S703.

The code data stored in the code memory 105 is transmitted to the transmission line 110 via the CCU 106 under the control of the CPU 109. As described above, according to the present embodiment, in addition to the same effect as the third embodiment, there is an effect of speeding up the processing of the margin data when the image data is encoded by the JPEG system.

In the above-described first to seventh embodiments, the image memory 102 for storing the image data read by the document reading unit 101 and the code memory 105 for storing the code data are different from each other. Although an example has been described, it goes without saying that the same memory may be used. Further, the amount of image data to be encoded or decoded at one time is one shuttle, but it may be two shuttles or more.

Further, the above-mentioned first embodiment, third embodiment,
In the fifth embodiment, an example of two encoding methods has been described, but the present embodiment is not limited to this, and it is also possible to support three or more encoding methods. Further, in the above-described second embodiment, fourth embodiment, and sixth embodiment, the coding schemes of coding and decoding may be the same, or different, for example, JPEG scheme and MMR coding scheme. As for the encoding, a plurality of encodings can be performed as in the first embodiment.

According to each of the above-described embodiments, the applied coding method can be changed by changing the processing program of the DSP for performing the encoding / decoding, so that a plurality of different image data units can be selected. Encoding can be performed.
It is also possible to alternately perform encoding and decoding for each predetermined image data unit. In addition, since it is not necessary to provide a dedicated processing unit for each encoding method applied,
It is possible to minimize the space and cost including the peripheral circuit of the decoding unit.

Furthermore, simply by changing the processing program,
Since multiple different coding schemes can be applied,
Control of the encoding / decoding unit and its peripheral circuits becomes easy. The present invention may be applied to a system including a plurality of devices or an apparatus including a single device. Further, it goes without saying that the present invention can be applied to the case where it is achieved by supplying a program to a system or an apparatus.

[0101]

As described above, according to the present invention, it is possible to provide an image processing method and apparatus for sequentially encoding image data by different encoding methods according to a set processing procedure. For example, a plurality of encoding methods can be provided. Even when the system is applied, it is not necessary to provide a dedicated processing unit for each encoding system to be applied, and there is an effect of reducing the space and cost for providing the dedicated processing unit.

Further, it is possible to provide an image processing method and an apparatus for sequentially encoding image data and decoding the encoded data according to the set processing procedure. For example, even when encoding and decoding are performed, There is an effect that a dedicated processing unit is not required, a space and a cost for providing the dedicated processing unit are reduced, and control is facilitated.

[Brief description of drawings]

FIG. 1 is a block diagram showing a coding configuration in a conventional image processing apparatus.

FIG. 2 is a block diagram showing a coding configuration in a conventional image processing apparatus.

FIG. 3 is a block diagram showing a coding configuration in a conventional image processing apparatus.

FIG. 4 is a block diagram showing configurations of an encoding unit and a decoding unit in a conventional image processing device.

FIG. 5 is a block diagram showing a schematic configuration of an image processing apparatus that switches an encoding method according to the present invention.

FIG. 6 is a block diagram illustrating a configuration example of an image communication apparatus including an image processing apparatus according to an embodiment of the present invention.

FIG. 7 is a diagram illustrating an example of a band scan method.

FIG. 8 is a flowchart showing an example of a processing procedure of the present embodiment.

FIG. 9 is a flowchart showing an example of a processing procedure of the present embodiment.

FIG. 10 is a flowchart showing an example of a processing procedure of a second embodiment according to the present invention.

FIG. 11 is a flowchart showing an example of the processing procedure of the second embodiment.

FIG. 12 is a block diagram illustrating a configuration example of an image communication apparatus including an image processing apparatus according to a third embodiment of the present invention.

13 is a flowchart showing an example of the processing procedure of the DSP 104a shown in FIG.

14 is a flowchart showing an example of the processing procedure of the DSP 104a shown in FIG.

15 is a flowchart showing an example of the processing procedure of the DSP 104b shown in FIG.

16 is a flowchart showing an example of the processing procedure of the DSP 104b shown in FIG.

FIG. 17 is a timing chart illustrating a synchronization relationship between DSPs 104a and 104b shown in FIG.

FIG. 18 is a flowchart showing an example of the processing procedure of the DSP 104b according to the fourth embodiment of the present invention.

FIG. 19 is a flowchart showing an example of the processing procedure of the DSP 104a according to the fourth embodiment.

FIG. 20 is a block diagram showing a configuration example of an image communication apparatus including an image processing apparatus according to a fifth embodiment of the present invention.

21 is a flowchart showing an example of the processing procedure of the DSP 104a shown in FIG.

22 is a flowchart showing an example of the processing procedure of the DSP 104b shown in FIG.

FIG. 23 is a flowchart showing an example of the processing procedure of the DSP 104b according to the sixth embodiment of the present invention.

FIG. 24 is a flowchart showing an example of the processing procedure of the DSP 104a according to the sixth embodiment.

FIG. 25 is a diagram showing a data compression procedure of the JPEG baseline system.

FIG. 26 is a flowchart showing an example of the processing procedure of the DSP 104a according to the seventh embodiment of the present invention.

FIG. 27 is a flowchart showing an example of the processing procedure of the DSP 104a according to the seventh embodiment.

FIG. 28 is a flowchart illustrating an example of a processing procedure of the DSP 104b according to the seventh embodiment.

FIG. 29 is a flowchart showing an example of the processing procedure of the DSP 104b according to the seventh embodiment.

FIG. 30 is a flowchart illustrating an example of the processing procedure of the DSP 104b according to the seventh embodiment.

FIG. 31 is a diagram showing an example of the mapping state of the local memory of the seventh embodiment.

[Fig. 32] Fig. 32 is a diagram illustrating a configuration example of block image data to be encoded.

[Explanation of symbols]

101 Document Reading Unit 102 Image Memory 103 Image Output Unit 104 DSP 105 Code Memory 106 Line Control Unit (CCU) 107 Local Memory 108 Instruction Memory 109 Microprocessor (CPU) 111 Dual Port RAM (DPRAM) 114,115 Sync Signal 2201 Previous Block Data flag register (register) 2202 Margin code memory

Claims (12)

[Claims] 1. An image processing method, wherein image data is sequentially encoded by different encoding methods according to a set processing procedure. 2. The image processing method according to claim 1, wherein the encoding method is switched for each predetermined unit of image data. 3. An image processing method, wherein image data is sequentially coded and the coded data is decoded according to a set processing procedure. 4. The image processing method according to claim 3, wherein encoding and decoding are switched for each predetermined unit of image data. 5. Storage means for storing image data, processing means for encoding image data according to a set processing procedure, and control means for sequentially setting processing procedures of different encoding methods in the processing means. The image processing apparatus, wherein the processing means sequentially encodes the image data stored in the storage means by different encoding methods according to the processing procedure set by the control means. 6. The control means switches the encoding method for each predetermined unit of image data.
The image processing device according to item 1. 7. A first storage means for storing the image data, a second storage means for storing the code data, and a processing means for encoding the image data and decoding the code data according to a set processing procedure. And a control unit configured to sequentially set different processing procedures in the processing unit, wherein the processing unit sequentially stores the image data stored in the first storage unit according to the processing procedure set by the control unit. And an encoded data stored in the second storage means is decoded. 8. The control means switches between encoding and decoding for each predetermined unit of image data.
The image processing device according to item 1. 9. The processing means has at least two processing units connected in series to execute a set processing procedure, and the control means divides a series of processing procedures into each of the processing sections. The image processing apparatus according to claim 5, wherein the image processing apparatus is set. 10. The image processing apparatus according to claim 9, wherein the processing procedure is divided so that loads of the processing units are substantially equal. 11. The image processing apparatus according to claim 9, wherein data is exchanged between the processing units via a memory. 12. An image processing method for encoding input image data in block units using a plurality of processors, wherein code data obtained as a result of encoding image data of a blank block is stored in a first memory. An image processing, wherein one of the plurality of processors writes the code data in a second memory when the preceding block of the target block is a blank block and the target block is a blank block Method.