JPH0774961A - Image communication equipment - Google Patents

Abstract

PURPOSE:To attain high speed processing without requiring general various encoding processing by previously setting up a code indicating the continuation of two blocks for specific block picture data, e.g. white data in a digital signal processor for executing encoding processing. CONSTITUTION:When a main CPU 108 down loads a processing program of a DSP 104, the DSP 104 is allowed to execute initialization to set up encoding processing to a stand-by state. When encoding processing is started, the main CPU 108 allows the DSP 104 to execute the encoding processing. At the time of ending the processing, the DSP 104 sets up '1' in a preblock flag register 105 and sets up the same code as the data of the register 105 in a blank value code memory 106. When the first data is blank data, an original reading part 101 reads out picture of each block stored in a picture memory 103 and the DSP 104 writes code data obtd. by subjecting the picture data to color spacial conversion processing to be encoded in a code memory 109.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an image communication apparatus which performs a coding process using a digital signal processor.

[0002]

2. Description of the Related Art In this type of apparatus, an international standard encoding method for compressing a huge amount of information of natural image color image data is a JPEG (Joint Photographic) method.
c Experts Group). The encoding method proposed by JPEG is referred to as "JPEG encoding method". This JPEG encoding method is composed of a plurality of systems, and the most basic one is the baseline system.

FIG. 8 shows a data compression procedure of the baseline system by the JPEG encoding method. First, the input image data read by a document reading device such as a scanner is divided into blocks of 8 pixels × 8 pixels. The subsequent compression processing is performed in this block unit. In the JPEG encoding method, there is no stipulation for the color space to be encoded in the image data read by the document reading device.
In most cases, color space conversion processing is performed prior to encoding processing. The color space to be converted is often a color space capable of performing encoding processing with high efficiency, for example, a color space including a luminance signal and a color signal (YCbCr, YIQ, Lab, etc.).

In the conventional baseline system, as shown by 401 in FIG. 8, each divided block image data (original color space or image data after color space conversion) is a discrete cosine which is a kind of orthogonal transformation. Conversion (hereinafter "DCT: Di
screte cosine transform ”). The DCT transforms the original input image data into spatial frequency component data. After conversion, the upper leftmost coefficient of the 8 × 8 block is called a direct current (DC) component, and has a value corresponding to the average value of the image data of the block before conversion. Other than that 6
The three coefficients are called alternating current (AC) components, and show how much the spatial frequency component corresponding to the position is included in the block image data before conversion.

Next, at 402, the transformed DCT transform coefficient is divided by a value obtained by multiplying 8 × 8 threshold values by a scale factor that determines how many times the threshold value is used. Quantize by doing. The quantized DCT coefficient is subjected to different encoding processing for the DC component and the AC component as shown in 403 and thereafter. 403 and 4 for the DC component
As indicated by 04, the difference between the DC component of the processing block and the DC component of the previous block is Huffman-encoded using the strength of the correlation between the adjacent blocks.

First, in step 405, the AC components are subjected to zigzag scanning from the low frequency region to the high frequency region of the spatial frequency and rearranged in a one-dimensional array. Then, at 406, AC
Check whether the coefficient is zero. Then, at 407 and 408, two-dimensional Huffman coding is performed at a subsequent 409 by combining a coefficient (effective coefficient) other than zero and the number (run length) of consecutive zeros (ineffective coefficient).

The decoding process procedure is basically the reverse of the encoding process. FIG. 9 shows a conventional decoding procedure of the baseline system. The code data sent (transmitted) from another device via the communication transmission path is decoded by the Huffman decoding process, as indicated by 501 in FIG. Then, in 502, the data of the one-dimensional array after the decoding process is rearranged into the original data of the two-dimensional array.

Then, as shown by 503, the DC component of the preceding block and the DC component of the processing block are subjected to addition processing with respect to the DC component, and the result is used as the DC component of the processing block. Since the AC component is not subjected to the difference processing or the like at the time of the encoding processing, the rearranged data is valid as it is at 504 and the subsequent processing is performed. That is, both of them perform inverse quantization processing in the following 505, and in 506, two-dimensional inverse discrete cosine transform (hereinafter referred to as “IDCT: Inverse Discrete
By executing the "Cosine Transform" process, the decoding process for one block is completed. However, when the color space conversion is necessary, the decoding process for one block ends after the color space conversion.

The encoding / decoding processing unit of the color image communication apparatus needs to perform a margin process in addition to the encoding or decoding process. The margin processing is to add a margin required on the receiving side on the transmitting side. In many cases, the margin data added as a margin is “white”. Therefore, when the baseline system of the JPEG encoding method is applied to the color image communication device, color space conversion processing, DCT is performed only on image data read by an image reading unit such as a scanner.
Instead of performing such processing as described above, similar processing to be performed on the image data must be performed on the margin data (white data) added on the transmitting side.

Also, in the decoding process, the Huffman decoding process, the inverse quantization process, the IDCT process, and the color space conversion process, which are the series of decoding processes, must be performed regardless of the code data to be decoded. . Therefore, in the conventional color image communication apparatus to which the JPEG encoding method is applied, the blank space block data (white data) in the blank area, the white block image data read by a scanner or the like, or the block image data other than white is used as the color space. Conversion processing, DCT processing,
Quantization processing and Huffman coding processing are performed, and at the time of decoding processing, Huffman decoding processing, dequantization processing, IDCT processing, and color space conversion processing are performed on all code data.

[0011]

As described above, in the encoding processing section of the conventional color image communication apparatus, white block image data read by the document reading section such as a scanner or blank block data of the blank area. For (white data), the same processing as that for block image data other than white, that is, color space conversion processing, DCT processing, quantization processing, and Huffman coding processing is performed for each block. There is a problem that the encoding processing time of all image data including margin data becomes long.

[0012]

The present invention has been made for the purpose of solving the above-mentioned problems, and has the following structure as one means for solving the above-mentioned problems. That is, input means for inputting original image data, image data storage means for storing the image data input by the input means, and image data stored in the storage means are encoded using a digital signal processor. Encoding means, code data storage means for storing the code data encoded by the encoding means, code storage means for storing the code when two blocks of specific block image data continue, and a block for encoding processing. A block configuration storage unit that stores that the image data of the previous block of the image data has the specific block image data configuration, and an instruction memory that stores the encoding processing program of the encoding unit are provided, and the code is stored in the instruction memory. Download processing program of digital signal processor And a control means for controlling said code data storing means to control said encoding means Te.

For example, when the block image data to be encoded is the same as the specific block image data set in advance, the image data of the previous block of the block image data to be encoded is determined by the encoding means. A block configuration storage unit that stores a specific block image data configuration is included, and a code when the specific block image data continues for two blocks is output according to the storage data of the block configuration storage unit.

Further, receiving means for receiving the code data sent through the communication transmission path, code data storing means for storing the code data received by the receiving means, and the code data storing means. Decoding means for decoding the encoded data using a digital signal processor,
Image data storage means for storing the image data decoded by the decoding means, output means for outputting the decoded image data stored in the image data storage means, and DC up to the block before the block to be decoded. The pre-block DC component storage means for storing the difference between the components, and the instruction memory capable of storing the decoding processing program of the decoding means are provided, and the processing program of the digital signal processor of the decoding means is downloaded to the instruction memory. And a control means for controlling the decoding means and the code data storage means.

For example, the decoding means executes the decoding process in units of blocks consisting of a predetermined number of pixels, and the difference between the DC component of the block to be decoded by the digital signal processor for decoding and the DC component of the preceding block is At zero,
In addition, when the code is read when all the AC components in the block are zero, the value of the DC component in the transmission color space up to the block before the block to be decoded indicates the specific color in the color space. When the value is the value, the image data of the specific color is output as the decoded image data for each color in the color space in which the decoded image is output.

[0016]

With the above-described structure, during the encoding process, the digital signal processor that performs the encoding process sets the code in the case where the specific block image data (for example, white data) continues for two blocks in advance. In the case where the set specific block image data continues for two or more blocks, high speed processing is enabled by using the set code data. Also, on the decoding side, high speed processing can be performed by using this coded data.

Further, during the decoding process, the digital signal processor for performing the decoding process reads the code when the difference in the DC component from the previous block is zero and all the AC components in the block are zero. In this case, when the value of the DC component of the previous block is a specific color, the image data representing the specific color (for example, “white”) in the color space for outputting the decoded image is decoded image data for each color signal. By outputting as, high-speed processing becomes possible.

[0018]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS An embodiment of the present invention will be described in detail below with reference to the accompanying drawings. [First Embodiment] FIG. 1 is a block diagram showing the arrangement of an embodiment according to the present invention. In the figure, 101 is an original reading unit for reading image data of an original with a scanner or the like, 103 is an image memory for storing color image data read by the original reading unit 101, and 102 is an image of color image data read by the original reading unit 101. A direct memory access controller (hereinafter, referred to as “DMAC”) for transferring to the memory 103, and a digital signal processor (hereinafter, referred to as “DMAC”) 104 for performing an encoding process.
"DSP").

Reference numeral 105 denotes a previous block data flag register for storing the data structure of the previous block of the block to be encoded by the DSP 104. Reference numeral 106 denotes the case where the encoding process block and the image data of the preceding block of the encoding process block are the same. A blank value code memory that stores encoded data, 107 is an instruction memory that stores a processing program of the DSP 104, and 109 is the DSP 104.
A code memory for storing code data that has been coded by means of 110, a line controller 110 for reading the code data stored in the code memory 109 and sending it to a communication transmission line (hereinafter referred to as “CCU”), and 108 for the image memory 10
3. A microprocessor (hereinafter, referred to as “main CPU”) that controls the DSP 104 and the code memory 109, and further downloads the processing program of the DSP 104 to the instruction memory 107.

The processing contents of this embodiment having the above configuration will be described in detail below. In the following description, specific block image data is white image data. 2 and 3 are diagrams showing the processing steps of this embodiment. In this embodiment, when the apparatus is activated, the main CPU 10
The CPU 8 first downloads the processing program of the DSP 104 to the instruction memory 107 at the time of startup.

The main CPU 107 allows the DSP 104
When the processing program of is downloaded, DSP10
4 performs initial setting and holds the standby state of the encoding process. As a result, the process moves from step S201 to step S202 in FIG. 2 and waits for the main CPU 108 to start the encoding process by an interrupt or the like. When the main CPU 108 activates the encoding process by an interrupt or the like, the process shifts from step S202 to step S203, and the DSP 104 performs the initial process of the encoding process. That is, the DSP 104 sets the parameters required for the encoding process in the internal memory of the DSP 104.

After the initial processing of the encoding processing is completed, DS
P104 sets "1" in the previous block data flag register 105 in step S204, and further in step S20.
In step 5, a code is set in the blank value code memory 106 when the block data to be encoded is the same as the data of the previous block. Then, the process proceeds to step S206 shown in FIG.

Here, when the signals to be coded are three signals and the code processing form is block interleaving of the JPEG coding method, the code set is such that the DC difference of the first signal is "0". A code, a code in which the AC component of the first signal is all “0” (EOB: End of Block), a code in which the DC difference of the second signal is “0”, and a AC component of the second signal is all “0” The code of (EOB), the code of which the DC difference of the third signal is "0", and the AC component of the third signal are all "0" (EO
It is a code obtained by connecting the codes of B).

When the color space to be encoded is YCbCr and the Huffman table referred to at the time of encoding is a recommended table of JPEG, the code "00" with the DC difference of Y signal being "0" and the AC component of Y signal Connects the code "1010" indicating all "0", the code "00" indicating that the DC difference of the Cb and Cr signals is "0", and the code "00" indicating that all the AC components of the Cb and Cr signals are "0". Therefore, “00101000000000” is set in the margin value code memory 106.

In the following description, FIG. 4 is also used. Figure 4
It is a figure which shows the block image data structure which carries out an encoding process, and the data shown by 301-313 in FIG.
Block data (8 × 8 pixels) processed by the PEG encoding method, 314 is the previous block data flag register 105.
, 315 to 327 are stored data values of the previous block data flag register 105 after the encoding processing of the respective data items 301 to 313.

328 to 340 are 301 to 313.
Color space conversion processing, DC
It indicates whether to perform T processing, quantization processing, and Huffman coding processing. In this embodiment, when the block image data to be encoded is the image data of all white or the margin data, and the value of the previous block data flag register 105 at that time is "1", the color space conversion process, DCT
Processing, quantization processing, and Huffman coding processing are not performed. The data 301 is the first data of the page to be encoded.

DSP 1 which has proceeded to step S206 of FIG.
The process of 04 checks here whether it is the first data of the page. Here, since the image data 301 to be encoded is the first data of the page, the process proceeds from step S206 to step S214 to check whether this data is blank space data. For example, if the first data is blank space data, such as the data indicated by reference numeral 301 in FIG. 4, the process proceeds to step S215. In the present embodiment, since the margin data is added by the DSP 104, the DSP 104 generates the margin data (white image data) for one block (three signal components) in step S215. The generated block image data of the blank space is processed by the DSP 104 in a succeeding step S216.
The previous block data flag register 105 to "0"
Is set to (reference numeral 315 in FIG. 4).

On the other hand, if the first data is not the blank area in step S214, the process proceeds to step S221, the image data stored in the image memory 103 by the document reading unit 101 is read in block units, and step S2 is performed.
Proceed to 16. Then, in step S217, the same process as the image data read by the document reading unit 101, that is, the conversion process of the color space is performed, and similarly, the following step S21.
8, DCT processing, step S219 quantization processing,
Huffman coding processing is performed in step S220 (reference numeral 328), and the flow advances to step S213. The encoded code data is written in the code memory 109 by the DSP 104.

Then, in step S213, it is checked whether or not the encoding processing of all the image data is completed. If the encoding processing of all the image data is not completed, step S213 is performed.
Proceed to 207. On the other hand, when the encoding process of all the image data is completed, the DSP 104 terminates the encoding process, notifies the main CPU 108 of the end of the encoding process by an interrupt or the like, and holds the standby state of the encoding process again. Figure 4
In this case, since there is a coding process for the image data block after 302, the process proceeds to step S207.

In step S207, it is checked whether it is a blank area. In the example of FIG. 4, since the data 302 is blank space data, the process proceeds to step S208, and the DSP 104 generates blank data for one block (three signal components) as in step S215. Then, in a succeeding step S211, it is checked whether or not the value of the previous block data flag register 105 is "1". In the example of FIG. 4, since the value of the previous block data flag register 105 is "0" by the reference numeral 315, the process proceeds from step S211 to step S222, and the DSP 10
In step 4, the value of the previous block data flag register 105 is set to "1" (reference numeral 316), and the processing proceeds to step S217 and thereafter.

That is, the processes from the color space conversion process to the Huffman encoding process are sequentially performed (reference numeral 329), and the process returns from step S213 to step S207 to proceed to the image data encoding process 303. Since the image data of 303 is blank space data, steps S207 to S208 are performed.
And the encoding process of the DSP 104,
The blank data is generated for one block (three signal components).

Here, the image data to be encoded is the margin data, and the previous block data flag register 10
The value of 5 is “1” according to the reference numeral 316. Therefore, in this case, the DSP 104 proceeds from step S211 to step S212, and outputs the data set in the blank value code memory 106 to the code memory 109. Then, the process proceeds to step S213.

In the example of FIG. 4, since the encoding process of all the image data has not been completed yet, the encoding process of the DSP 104 moves to step S207 again. Since the image data 304 is not blank data this time, the processing of the DSP 104 moves from step S207 to step S209. Then, the image data stored in the image memory 103 by the document reading unit 101 is read in block units. Then, it is checked whether all the block image data read in step S210 are white data. If all the read block image data are white data, the process proceeds to step S211. Then, the value of the previous block data flag register 105 is confirmed, and the processing is sequentially performed according to the value. That is, when the value of the previous block data flag register 105 is "0", after changing the set value to "1", the color space conversion process of step S217 to the Huffman coding process of step S220 are performed in order. Block data flag register 10
When the value of 5 is "1", the code data set in the blank value code memory 106 in step SS212 is output to the code memory 109.

When the block image data read in step S210 is not all white data (when the value of the previous block data flag register 105 is "1"), the process proceeds to step S216. Since the image data of 304 is image data other than white, in this case, the process proceeds to step S216. Then, in step S216, the value of the previous block data flag register 105 is set to "0" (reference numeral 31).
8) Then, the color space conversion process of step S217 to the Huffman coding process of step S220 are performed in order (code 3).
31).

With the above control, the DSP 1
The code data encoded by 04 is sequentially stored in the code memory 109. Then, under the control of the CPU 108, a communication path is formed between the CCU 110 and another communication device connected to the transmission path, and the encoded data stored in the code memory 109 read by the CCU 110 is transmitted via the transmission path. And send it to the other device. The above first
In the embodiment, the code memory written by the CCU 101 has a different configuration from the image memory written by the DSP 104. However, it is needless to say that what is shown in this embodiment can be realized even if the same memory is used.

As described above, according to the present embodiment, when the specific block image data (white image data) set at the start of the encoding process continues for two or more blocks, the encoded data that has been previously encoded is processed. Since the output is controlled to be output, the color space conversion process, the DCT process, the quantization process, and the Huffman coding process performed on the set specific block image data (white image block data) are unnecessary. As a result, the number of steps required for the above processing in the DSP processing program is reduced, so that it is possible to shorten the encoding processing time of all image data.

[Second Embodiment] Although the above description has mainly described the encoding process, the present invention is not limited to the above example, and at the same time receives encoded data from another device. It is also possible to decrypt and output from the image output unit.
Next, the decoding processing unit which is the second embodiment of the present invention will be described. In the second embodiment, the same components as those in the first embodiment shown in FIG. 1 are designated by the same reference numerals and detailed description thereof will be omitted.

FIG. 5 is a block diagram showing the configuration of the second embodiment according to the present invention. In the figure, the DMAC10
2, image memory 103, DSP 104, instruction memory 107, CPU 108, code memory 109,
The CCU 110 also uses the same configuration as that of FIG. 1 described above for the decoding process. However, the present invention is not limited to the above example, and the above-described configurations may be provided separately.

In FIG. 5, reference numeral 120 is a previous block DC storage memory for storing the DC difference value of each color signal in the previous block of the block to be decoded, and 121 is the image memory 1.
The image output unit outputs a decoded image obtained from the image data stored in 03. Further, the CCU 110 receives code data sent from another device through the communication transmission line by a predetermined communication control procedure and stores it in the code memory 109. The DSP 104 reads the code data stored in the code memory 109 and performs a decoding process. Image memory 1
03 stores the image data decoded by the DSP 104. The DMAC 102 transfers the image data stored in the image memory 103 to the image output unit 121 by the direct memory access controller.

The instruction memory 107 stores the processing program of the digital signal processor 104. The main CPU 108 includes a code memory 109 and a DS
P104 controls the image memory 103 and downloads the processing program of the DSP 104 to the instruction memory 107. The operation of the second embodiment having the above configuration will be described below with reference to the flow chart of FIG. FIG. 6 is a diagram showing the decoding processing steps of the second embodiment.

When the apparatus of this embodiment is activated, the main CPU 10
8 downloads the processing program of the DSP 104 to the instruction memory 107. Main CPU1
When the processing program of the DSP 104 is downloaded by 08, the processing of the DSP 104 proceeds from step S301 to step S302, where initialization is performed and the standby state of the decoding process is held. When the decryption process is activated by the main CPU 108 due to an interrupt or the like, step S3 is executed.
From 02, the process proceeds to step S303, and the DSP 104 performs the initial process of the decoding process.

That is, the DSP 104 stores a parameter required for the decoding process, a code in which the DC difference between the decoding process block and the preceding block is “0”, and all the coefficients of the AC components are “0” in the internal memory of the DSP 104. Set to. When the signals to be decoded are three signals and the decoding processing form is block interleaving of the JPEG coding system, the setting code is a code in which the DC difference of the first signal is “0”,
AC component of all signals is "0" (EOB: End of Bloc
k), a code in which the DC difference of the second signal is “0”, a code in which the AC components of the second signal are all “0” (EOB), and a code in which the DC difference of the third signal is “0” , The third signal AC
It is a code in which the components are all "0" (EOB).

The third decoding color space is YCbCr.
Then, the Huffman table that is referenced during the decryption process is JPE
An example of the setting code in the case of the G recommended table is shown. That is, the code “00” in which the DC difference of the Y signal is “0”, the code “1010” in which the AC components of the Y signal are all “0”, and C
Symbols “00” and C where the DC difference between the b and Cr signals is “0”
A code "0" indicating that the AC components of the b and Cr signals are all "0"
Since this is a code in which 0's are connected, the code set in this example is "00101000000000". An example of this code is shown in FIG.

In the following description, the color space for decoding is YC.
It is performed as a bCr color space. After the completion of the initial decryption processing in step S303, the DSP 104 executes step S3.
At 04, the reading of the code data stored in the code memory 109 is started. The code read in the subsequent step S305 is the set code, that is, "00101000000.
It is checked whether or not it is 000 ". If the read code is not the set code, the process proceeds to step S309.

In step S309 and subsequent steps, normal decoding processing in the JPEG encoding system is performed. That is, in step S309, the Huffman decoding process is performed to restore the quantized data (one-dimensional data).
Sort into dimensional data. Then, in step S311, differential decoding processing is performed on the DC component, and in subsequent step S3
Inverse quantization processing is performed in 12 and IDC is performed in step S313.
The T process and the color space conversion process are sequentially performed in step S314. Then, in step S315, the processed image data is written in the image memory 103. And step S30
Go to 8. In step S308, it is checked whether or not the decoding processing of all coded data is completed. If the decoding process of all code data has not been completed, the process returns to step S304 again, and the code data is read again and the decoding process is performed.

When the decoding processing of all coded data is completed in step S308, the DSP 104 notifies the main CPU 108 of the completion of the decoding processing by an interrupt or the like, and holds the encoding or decoding processing standby state again. On the other hand, if the code data read in step S305 is the same as the set code data, step S306
Then, the DSP 104 proceeds to the next processing, that is, the previous block DC.
The setting value of the minute storage memory 120 is checked to determine whether the value of the previous block DC minute storage memory 120 is code data indicating “white”. If the value in the previous block DC storage memory 120 is not code data indicating "white", step S309
Proceed to.

On the other hand, the previous block DC storage memory 120
DC component setting value of each color signal of, in the transmission color space,
If the value is “white”, the DSP 104 performs step S30.
9 to step S314 without performing the processing of step S314.
In step 07, one block of a signal indicating "white" in the data on the color space for outputting the decoded image is written in the image memory 103 for each signal component. For example, if the color space for outputting the decoded image is red (R), green (G), and blue (B), the data precision is 8
In the case of a bit, “0FF” H is written in the image memory 103 for each of R, G and B. Then, the process proceeds to step S308.

The image data decoded by the above-described decoding process of the DSP 104 and stored in the image memory 103 is transferred from the image memory 103 to the image output unit 121 under the control of the DMAC 102. The image output unit 121 sequentially outputs the transferred image data as a decoded image. In the second embodiment described above, the code memory written by the CCU 101 and the image memory written by the DSP 104 have different configurations. However, even if they are configured by the same memory, it is possible to realize the present embodiment. Needless to say.

As described above, according to the second embodiment, when the DSP 104 which performs the decoding process reads a code in which the DC difference from the previous block is "0" and the AC components are all "0", DC component (DC difference) of each color signal of the previous block
Indicates "white" in the transmission color space, the "white" in the color space for outputting the decoded image is displayed without performing the Huffman decoding process, the inverse quantization process, the IDCT process, and the color space conversion process. Since the image data to be represented is written in the image memory for one block, the number of steps required for the processing in the DSP processing program is reduced, so that the decoding processing time of all the image data can be shortened.

In the above description, the first embodiment and the second embodiment
Although described separately in the embodiments, in an actual device, all the configurations can operate in parallel at the same time. Then, for example, when reading by the document reading unit 101 is activated, the encoding process of the first embodiment is executed and the read data is transmitted to another device. Then, when the CCU 110 receives coded data from another device, the decoding process of the second embodiment is executed, and the decoded image data is controlled to be output from the image output unit 121.

The present invention may be applied to a system composed of a plurality of devices or an apparatus composed of a single device. Further, it goes without saying that the present invention can be applied to the case where it is achieved by supplying a program to a system or an apparatus.

[0052]

As described above, according to the present invention, the digital signal processor for performing the encoding process, when performing the encoding process, determines the code when the specific block image data (for example, white data) continues for two blocks. By setting in advance, when the set specific block image data continues for two or more blocks, by encoding using the set code data, various general encoding processes can be omitted, It enables high-speed processing. Also, on the decoding side, high speed processing can be performed by using this coded data. That is, when the digital signal processor performing the decoding process reads the code when the difference between the direct current component and the previous block is zero and all the alternating current components in the block are zero during the decoding process. , When the value of the DC component of the previous block is a specific color, the image data representing the specific color (for example, “white”) is output as the decoded image data for each color signal in the color space for outputting the decoded image. As a result, general decoding processing can be omitted, and high-speed processing becomes possible.

[Brief description of drawings]

FIG. 1 is a block diagram showing a configuration of an embodiment according to the present invention.

FIG. 2 is a flow chart showing an encoding process of the present embodiment.

FIG. 3 is a flow chart showing an encoding process of this embodiment.

FIG. 4 is a diagram for explaining an example of processing contents in the present embodiment corresponding to data of an encoding processing block.

FIG. 5 is a block diagram showing a configuration of a second exemplary embodiment according to the present invention.

FIG. 6 is a flow chart showing a decoding process of the second embodiment.

FIG. 7 is a diagram showing an example of codes when the DC difference from the preceding block is “0” and all the AC components are “0” in the second embodiment.

FIG. 8 is a processing block diagram at the time of encoding in the conventional JPEG encoding method.

FIG. 9 is a processing block diagram at the time of decoding in the conventional JPEG encoding method.

[Explanation of symbols]

101 original reading unit 102 direct memory access controller (D
MAC) 103 image memory 104 digital signal processor (DSP) 105 previous block data flag register 106 margin value code memory 107 instruction memory 108 microprocessor (CPU) 109 code memory 110 line control unit (CCU) 120 previous block DC component storage memory 121 Image output section

Claims (5)

[Claims] 1. Input means for inputting original image data, image data storage means for storing image data input by the input means, and image data stored in the storage means encoded using a digital signal processor. Encoding means for performing encoding processing, code data storage means for storing code data encoded by the encoding means, code storage means for storing a code when two blocks of specific block image data continue, A block configuration storage unit that stores that the image data of the previous block of the block image data to be processed has the specific block image data configuration; and an instruction memory that can store the encoding processing program of the encoding unit, A processing program of the digital signal processor of the encoding means in the instruction memory And a control unit for controlling the encoding unit and controlling the encoded data storage unit. 2. Code data storage means for storing code data, decoding means for decoding the code data stored in the code data storage means using a digital signal processor, and decoding by the decoding means. Image data storage means for storing the decoded image data, output means for outputting the decoded image data stored in the image data storage means, and before storing the difference in DC component up to the block preceding the block to be decoded. A block DC component storage means and an instruction memory capable of storing the decoding processing program of the decoding means are provided, and the processing program of the digital signal processor of the decoding means is downloaded to the instruction memory to control the decoding means. And a control means for controlling the code data storage means. Image communication apparatus according to claim. 3. An original reading unit for reading original image data, an encoding unit for encoding the image data read by the original reading unit using a digital signal processor, and an encoding unit encoded by the encoding unit. Code data storage means for storing code data, code storage means for storing a code when two blocks of specific block image data continue, and image data of a block preceding the block image data to be encoded is the specific block image. Block configuration storage means for storing the data configuration, transmission means for sending out the code data stored in the code data storage means to a communication transmission line, and receiving code data sent via the communication transmission line The receiving means and the code data received by the receiving means are stored in the code data storage means, and the code data is stored. Decoding means for decoding the coded data stored in the data storage means using the digital signal processor, image data storage means for storing the image data decoded by the decoding means, and the image data storage Output means for outputting the decoded image data stored in the means, pre-block DC component storage means for storing the difference of DC components up to the preceding block of the block to be decoded, decoding processing program of the decoding means, and An instruction memory capable of storing the encoding processing program of the encoding means is provided, and the encoding means and the decoding are performed by downloading the processing program of the decoding means and the digital signal processor of the encoding means to the instruction memory. Control for controlling the means and the code data storage means Image communication apparatus, characterized in that it comprises a stage. 4. The image communication apparatus according to claim 1 or 3, wherein the encoding means has the same block image data to be encoded as the specific block image data set in advance. Includes block configuration storage means for storing that the image data of the previous block of the block image data to be encoded has the specific block image data configuration, and the specific block image is stored according to the storage data of the block configuration storage means. An image communication apparatus, which outputs a code when data continues for two blocks. 5. The image communication apparatus according to claim 2 or 3, wherein the decoding unit executes the decoding process in block units each including a predetermined number of pixels, and further performs the decoding process. If the difference between the DC component of the block to be decoded by the signal processor and the preceding block is zero and all the AC components in the block are zero, the code reads the preceding block of the block to be decoded. When the value of the DC component in the transmission color space up to is a value representing the specific color in the color space, the image data of the specific color is output as the decoded image data of each color in the color space that outputs the decoded image. An image communication device characterized by the above.