JPH07212427A - Quadrature modulator and quadrature degree correction device for quadrature modulator - Google Patents

Abstract

PURPOSE:To accurately correct a quadrature degree by providing a quadrature degree error information computing means and a quadrature degree correction means, using quadrature degree error information and correcting the quadrature degree. CONSTITUTION:Two mutually orthogonally crossing carrier wave signals obtained by passing signals from a carrier wave oscillator 1 through a 90 deg. hybrid circuit 2 are used, frequency conversion is conducted to two mutually orthogonally crossing quadrature amplitude signals I and Q and quadrature modulation is performed. At the time, in the quadrature degree error information computing means 6, the quadrature degree error information is obtained based on the two carrier wave signals from the 90 deg. hybrid circuit 2. Further, in the quadrature degree correction means 7, the quadrature degree error information from the quadrature degree error information computing means 6 is used, the carrier wave signals or the quadrature amplitude signals are corrected and the quadrature degree is corrected. The quadrature degree correction means 7 is constituted as a phase correction means for instance and the phase correction is conducted to one of the carrier wave signals from the 90 deg. hybrid circuit 2.

Description

Detailed Description of the Invention

(Table of Contents) Industrial Application Field of the Prior Art (FIGS. 9 to 11) Problems to be Solved by the Invention Means for Solving the Problems (FIGS. 1 and 2) Operation (FIGS. 1 and 2) Example • Description of first example (FIG. 3) • Description of second example (FIG. 4) • Description of third example (FIG. 5) • Description of fourth example (FIG. 6) • Fifth example Description of Example (FIG. 7) -Explanation of Sixth Embodiment (FIG. 8)

[0002]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a quadrature amplitude correction device for a quadrature amplitude modulator and a quadrature amplitude demodulator in a radio device.

[0003]

2. Description of the Related Art Conventionally, in quadrature amplitude modulation, two mutually orthogonal carrier signals obtained by passing a signal from a carrier oscillator (local oscillator) through a 90 ° hybrid circuit are mutually orthogonal. The two quadrature amplitude signals are subjected to frequency conversion (up-conversion processing) to perform quadrature amplitude modulation, while at the time of quadrature amplitude demodulation, the signals from the carrier wave oscillator are mutually quadrature obtained by passing them through a 90 ° hybrid circuit. The two quadrature amplitude modulated signals that are orthogonal to each other are subjected to frequency conversion (down conversion processing) using the two carrier signals to be subjected to low-pass filtering processing to perform quadrature amplitude demodulation.

Thus, in quadrature amplitude modulation / demodulation, 9
A 90 ° hybrid circuit is used to obtain two carriers that are 0 ° out of phase. However, this 90 ° hybrid circuit causes an error δ of orthogonality (this error δ changes depending on the frequency f of the carrier) (see FIG. 11). As a method of correcting the error δ of the orthogonality, a method of directly correcting the phase of the carrier wave (method 1) and a method of canceling the error δ of the orthogonality by processing the baseband signal (method 2).
There is.

Next, these techniques will be described in the case of a modulator. (A) Method 1 (see FIG. 9) In this method 1, as shown in FIG. 9, the sine wave signal sin ωt from the carrier wave oscillator 1 is converted into a 90 ° hybrid circuit 2.
Two mutually orthogonal carrier signals sin ωt obtained by passing the same (simply called the hybrid 2),
cos (ωt + δ (f)) [hereinafter, cos (ωt + δ (f)) may be abbreviated as cos (ωt + δ). ], The frequency setting signal f of the carrier wave oscillator 1 is subjected to the orthogonality error by the f / δ converter 9 when frequency conversion is performed on the two orthogonal amplitude signals I and Q which are orthogonal to each other. The quadrature from the f / δ converter 9 is converted to δ (the f / δ conversion characteristic is obtained by actually measuring the frequency characteristic δ (f) of the orthogonality error of the 90 ° hybrid circuit 2 to be used). By inputting the degree error δ into the phase corrector 71 including a variable capacitance capacitor and the like,
The phase corrector 71 shifts the phase of the carrier wave by −δ.

In the figure, reference numeral 3 is a multiplier for multiplying the I signal by the carrier wave sin ωt from the 90 ° hybrid circuit 2, and 4 is a multiplier by which the Q signal is multiplied by the output cos ωt of the phase corrector 71. Reference numeral 5 is an adder that adds the outputs of the multipliers 3 and 4. (B) Method 2 (FIG. 10) Also in the case of Method 2, as shown in FIG. 10, the sine wave signal sin ωt from the carrier wave oscillator 1 is orthogonal to each other obtained by passing through the 90 ° hybrid circuit 2. Two carrier signals sin ωt, cos (ωt + δ) are used to perform frequency conversion on two quadrature amplitude signals I and Q that are orthogonal to each other to perform quadrature amplitude modulation. After obtaining δ in the same manner as in the above method 1, the following processing is performed.

First, Q multiplied by tan δ is added to the signal I,
Multiply the carrier wave sinωt. As a result, (I + Q tan δ) × sin ωt = I sin ωt + Q tanδ s
in ωt. Further, when the signal Q is divided by cosδ and the other carrier cos (ωt + δ) is multiplied, (Q / cosδ) × cos (ωt + δ) = (Q / cosδ) × {cosωt cosδ−sinωt sin
δ} = Q cos ωt−Q tan δ sin ωt.

By adding these, I sin ωt + Q cos ωt, and the orthogonality error δ can be canceled. Then, in order to realize the method 2, as shown in FIG. 10, correction coefficient setting devices 72 and 73 for multiplying the Q signal by tan δ and dividing by the cos δ are provided. Reference numeral 8 in the figure denotes an I signal and an output Q from the correction coefficient setting unit 72.
It is an adder that adds tan δ.

[0009]

However, the problem in each of the above methods is the f / δ conversion. That is,
This conversion characteristic can be obtained by actually measuring the frequency characteristic δ (f) of the orthogonality error of the 90 ° hybrid circuit 2 used, but if the 90 ° hybrid circuit 2 is replaced with another type or the carrier wave Whenever the frequency of the oscillator 1 is changed, the frequency characteristic δ (f) of the orthogonality error is measured again each time, and f / f is calculated according to the δ (f).
The delta converter 9 must be rebuilt.

Further, there is a possibility that the orthogonality cannot be accurately corrected due to variations in the frequency characteristic δ (f) of the orthogonality error of the hybrid 2. The above-mentioned problems occur not only in quadrature amplitude modulation but also in quadrature amplitude demodulation. The present invention has been devised in view of such a problem, detects an error of orthogonality, and can correct the orthogonality accurately by the detected orthogonality error, a quadrature amplitude modulator, and An object of the present invention is to provide an orthogonality correction device for a quadrature amplitude demodulator.

[0011]

FIG. 1 is a block diagram showing the principle of a quadrature amplitude correction apparatus for a quadrature amplitude modulator according to the first invention. In FIG. 1, 1 is a carrier wave oscillator and 2 is 90.
° Hybrid circuits, 3 and 4 are multipliers, whereby two orthogonal carrier signals obtained by passing the signal from the carrier oscillator 1 through the 90 ° hybrid circuit 2 are mutually orthogonal. It is possible to perform frequency conversion on the two quadrature amplitude signals I and Q to perform quadrature amplitude modulation. Reference numeral 5 is an adder that adds the outputs of the multipliers 3 and 4.

Further, 6 is an orthogonality error information calculating means, which calculates the orthogonality error information based on the two carrier signals from the 90 ° hybrid circuit 2. Further, 7 is an orthogonality correction means,
The orthogonality correction means 7 uses the orthogonality error information from the orthogonality error information calculating means 6 to correct the carrier signal or the orthogonal amplitude signal to perform the orthogonality correction.

By the way, in the first aspect of the invention, the orthogonality correcting means 7 is constituted as a phase correcting means for correcting the phase of one carrier signal from the 90 ° hybrid circuit 2, and the orthogonality error information calculating means 6 is provided. Is a multiplication means for multiplying the output from the phase correction means with the other carrier signal from the 90 ° hybrid circuit 2, and low-pass filtering for obtaining orthogonality error information by low-pass filtering the multiplication result by this multiplication means. By including the processing means, the phase correcting means uses the orthogonality error information from the orthogonality error information calculating means 6 to perform phase correction on one carrier signal from the 90 ° hybrid circuit 2. You may

In the first aspect of the invention, the orthogonality correction means 7 is constituted as a phase correction means for correcting the phase of one carrier signal from the 90 ° hybrid circuit 2, and the orthogonality error information calculation means 6 is also provided. Is provided with multiplication means for multiplying two carrier signals from the 90 ° hybrid circuit 2 and low-pass filtering processing means for performing low-pass filtering processing on the multiplication result by this multiplication means to obtain orthogonality error information. Thus, the phase correcting means may use the orthogonality error information from the orthogonality error information calculating means 6 to perform the phase correction on one carrier signal from the 90 ° hybrid circuit 2.

Further, in the first aspect of the present invention, the quadrature degree correction means 7 is configured as means for adding correction relating to the quadrature degree error information to the quadrature amplitude signal, and the quadrature degree error information calculation means 6 is constituted by a 90 ° hybrid circuit. 2 out of 2
The orthogonality correction means 7 comprises the multiplication means for multiplying two carrier signals, and the low-pass filtering processing means for performing the low-pass filtering processing on the multiplication result of the multiplication means to obtain the orthogonality error information. The quadrature amplitude signal may be corrected by using the quadrature error information from the quadrature error information calculating means 6.

FIG. 2 is a block diagram showing the principle of a quadrature correction apparatus for a quadrature amplitude demodulator according to the second invention. In FIG. 2, 10 is a hybrid circuit, 11 is a carrier oscillator, and 12 is a 90 ° hybrid circuit. Reference numerals 13 and 14 are multipliers, and 18 and 19 are low-pass filtering processing means, whereby the signal from the carrier wave oscillator 11 is rotated by 90 °.
Quadrature amplitude modulation signals are frequency-converted using two carrier signals that are orthogonal to each other obtained by passing through the hybrid circuit 12, and low-pass filtering processing means 18 and 19 perform low-pass filtering processing to perform quadrature amplitude demodulation. Can be done.

Further, 16 is an orthogonality error information calculation means,
The orthogonality error information calculating means 16 obtains orthogonality error information based on the two carrier signals from the 90 ° hybrid circuit 12. Further, 17 is a quadrature correction unit, which corrects the carrier signal or the quadrature amplitude demodulation signal using the quadrature error information from the quadrature error information calculation unit 17 to obtain the quadrature. The degree is corrected.

In the second aspect of the present invention, the orthogonality correction means 17 is constituted as a phase correction means for correcting the phase of one carrier signal from the 90 ° hybrid circuit 12, and the orthogonality error information calculation means 16 is provided. Is a multiplication means for multiplying the output from the phase correction means and the other carrier signal from the 90 ° hybrid circuit 12, and low-pass filtering for obtaining orthogonality error information by low-pass filtering the multiplication result of this multiplication means. By including the processing means, the phase correcting means uses the orthogonality error information from the orthogonality error information calculating means 16 to perform phase correction on one carrier signal from the 90 ° hybrid circuit 12. You may

In the second aspect of the invention, the orthogonality correction means 17 is constituted as a phase correction means for correcting the phase of one carrier signal from the 90 ° hybrid circuit 12, and the orthogonality error information calculation means 16 is provided. 90 °
By providing a multiplication means for multiplying the two carrier signals from the hybrid circuit 12 and a low-pass filtering processing means for performing low-pass filtering processing on the multiplication result by this multiplication means to obtain orthogonality error information, the phase The correcting means may use the orthogonality error information from the orthogonality error information calculating means 16 to perform phase correction on one carrier signal from the 90 ° hybrid circuit 12.

Further, in the second aspect of the invention, the quadrature degree correction means 17 is configured as means for adding correction relating to the quadrature degree error information to the quadrature amplitude demodulated signal, and the quadrature degree error information calculation means 16 is a 90 ° hybrid. Circuit 1
Multiplication means for multiplying the two carrier signals from 2;
By providing a low-pass filtering processing means for performing low-pass filtering processing on the multiplication result of this multiplication means to obtain orthogonality error information, the orthogonality correction means 17 allows the orthogonality from the orthogonality error information calculating means 16 to be orthogonal. The quadrature amplitude demodulation signal may be corrected using the degree error information.

[0021]

In the quadrature amplitude correction apparatus for the quadrature amplitude modulator according to the first aspect of the present invention described above, as shown in FIG.
By using the two carrier signals obtained by passing the signal from (1) through 90 ° hybrid circuit 2, which are orthogonal to each other,
Two quadrature amplitude signals I and Q which are orthogonal to each other are frequency-converted and quadrature amplitude modulated. At this time, the quadrature degree error information calculation means 6 outputs 2 from the 90 ° hybrid circuit 2.
The orthogonality error information is obtained based on one carrier signal, and the orthogonality correction means 7 uses the orthogonality error information from the orthogonality error information calculation means 6 to correct the carrier signal or the orthogonal amplitude signal, Correct the orthogonality.

In the first aspect of the present invention, the orthogonality correction means 7 is configured as the phase correction means as described above, and the orthogonality error information calculation means 6 is configured to include the multiplication means and the low-pass filtering processing means. By doing so, the orthogonality error information calculation means 6
The phase correction may be applied to one carrier signal from the 90 ° hybrid circuit 2 by using the orthogonality error information from

Further, in the first aspect of the present invention, the orthogonality correction means 7 is configured as means for adding correction relating to orthogonality error information to the orthogonal amplitude signal, and the orthogonality error information calculation means 6 is used as multiplication means and low-pass filtering. The orthogonality correction means 7 may be configured to include the processing means to correct the orthogonal amplitude signal by using the orthogonality error information from the orthogonality error information calculating means 6.

In the quadrature correction device for the quadrature amplitude demodulator according to the second aspect of the present invention, as shown in FIG. 2, the signals from the carrier wave oscillator 11 are passed through the 90 ° hybrid circuit 12 so that they are mutually obtained. Two quadrature carrier signals are used to perform frequency conversion on the quadrature amplitude modulation signal, and further low pass filtering processing is performed by the low pass filtering processing means 18 and 19 to perform quadrature amplitude demodulation. The means 16 obtains the orthogonality error information based on the two carrier signals from the 90 ° hybrid circuit 12, and the orthogonality correction means 17 uses the orthogonality error information from the orthogonality error information calculating means 17 to obtain the carrier wave. Correction is performed on the signal or the quadrature amplitude demodulation signal to perform quadrature degree correction.

By the way, in the second aspect of the invention, the orthogonality correction means 17 is configured as a phase correction means as described above, and the orthogonality error information calculation means 16 is configured to include a multiplication means and a low-pass filtering processing means. By doing so, the phase correcting means may use the orthogonality error information from the orthogonality error information calculating means 16 to perform the phase correction on one carrier signal from the 90 ° hybrid circuit 12.

Further, in the second aspect of the invention, the quadrature degree correction means 17 is configured as means for adding a correction regarding quadrature degree error information to the quadrature amplitude demodulated signal, and the quadrature degree error information calculation means 16 is a multiplication means and a low pass. The quadrature amplitude correcting means 17 may be configured to include the filtering processing means to correct the quadrature amplitude demodulation signal using the quadrature degree error information from the quadrature degree error information calculating means 16.

[0027]

Embodiments of the present invention will be described below with reference to the drawings. (A) Description of First Embodiment FIG. 3 is a block diagram showing a quadrature amplitude correction apparatus for a quadrature amplitude modulator as a first embodiment of the present invention. The quadrature amplitude modulator shown in FIG. The up conversion unit 1 includes a conversion unit (frequency conversion unit) 100.
00 is a carrier wave oscillator 1, a 90 ° hybrid circuit 2,
It has a multiplier 3, 4 and a phase corrector (phase corrector) 71 as an orthogonality corrector. As a result, the up-conversion unit 100 outputs the signal from the carrier oscillator 1.
By passing sin ωt through the 90 ° hybrid circuit 2, two mutually orthogonal carrier wave signals (sin signal, cos signal) are obtained, and these carrier wave signals (sin signal, cos signal) are obtained.
By using two quadrature amplitude signals I and Q that are orthogonal to each other.
Is subjected to frequency conversion to perform quadrature amplitude modulation. The carrier wave oscillator 1 outputs the signal sinωt based on the instruction of the frequency setting signal.

The phase corrector 71 corrects the phase of one carrier signal cos (ωt + δ) from the 90 ° hybrid circuit 2 by -δ and outputs the signal cos ωt. In addition, the variable capacitor 71a and the like are included. By the way, 6 is an orthogonality detection circuit (orthogonality error information calculation means), which calculates orthogonality error information based on the two carrier signals from the 90 ° hybrid circuit 2. For this purpose, a multiplication unit (multiplication unit) 61 that multiplies the output cos ωt from the phase corrector 71 and the other carrier signal sin ωt from the 90 ° hybrid circuit 2, and the multiplication unit 6
A low-pass filter (low-pass filtering processing means) 62 that obtains the orthogonality error information sin δ by performing a low-pass filtering process that can cut the second harmonic of the carrier wave with respect to the multiplication result of 1 is configured.

Next, the principle of detecting the orthogonality error information sin δ by the orthogonality detection circuit 6 will be described. First, the output of the 90 ° hybrid circuit 2 is sinωt, cos (ωt + δ)
If the error of the orthogonality is δ, the output of the phase corrector 71 before control is cos (ωt + δ), so these two signals sinωt, cos (ωt + δ) are multiplied by the multiplier 61.
When input to, from the multiplier 61, sin ωt × cos (ωt + δ) = {sin (2ωt−δ) +
We get an output of sin δ} / 2.

When this signal is passed through a low-pass filter 62 capable of cutting the second harmonic of the carrier wave, the output of the low-pass filter 62 becomes (1/2) sin δ, which results in
It can be seen that the orthogonality error sin δ can be detected. Then, using this error sin δ, the following correction of orthogonality is performed. That is, the orthogonality error information sin δ from the orthogonality detection circuit 6 is fed back to the phase correction means 7 to change the capacitance of the capacitor 71a. As a result, the phase corrector 71 corrects the phase of the carrier signal cos (ωt + δ) from the 90 ° hybrid circuit 2 and shifts the phase by −δ to correct the signal.
The cos ωt is output from the phase corrector 71. Thus, when the signal cos ωt containing no error is output from the phase corrector 71, the output of the orthogonality detection circuit 6 becomes zero. Even after that, the negative feedback control is performed so that the output of the orthogonality detection circuit 6 becomes zero. As a result, the phase corrector 71 uses the orthogonality error information sin δ from the orthogonality detection circuit 6,
It means that the orthogonality is corrected by adding the correction to the carrier signal.

That is, in this embodiment, the present invention is applied to the method 1 described above, and one of the inputs of the orthogonality detection circuit 6 is used as the output of the phase corrector 71, so that the phase of the carrier wave is fed back. It is controlling. As described above, in the first embodiment, in the quadrature amplitude modulator, the quadrature degree detection circuit 6 detects the quadrature degree error, so that the phase of the carrier wave is directly corrected by the feedback control, and the quadrature degree Since the correction is performed, the orthogonality can be accurately maintained on the modulator side regardless of the type and frequency of the 90 ° hybrid circuit 2.

5 is the output of the multipliers 3 and 4 I sinω
This is an adder for adding t sin and Q cos ωt to obtain I sin ωt + Q cos ωt. (B) Description of Second Embodiment In the second embodiment, in the first embodiment described above, one of the inputs of the orthogonality detection circuit 6 is not the output of the phase corrector 71 but the output of the 90 ° hybrid circuit 2. By doing
Feedforward control is performed on the phase of the carrier wave.

That is, FIG. 4 is a block diagram showing a quadrature amplitude correction apparatus for a quadrature amplitude modulator as a second embodiment of the present invention. First, the quadrature amplitude modulator shown in FIG. , 90 ° hybrid circuit 2, multiplier 3,
4. Up-conversion unit (frequency conversion unit) having a phase corrector (phase correction unit) 71 as orthogonality correction unit
100, and this up-conversion unit 100
Then, the signal sin ωt from the carrier wave oscillator 1 is passed through the 90 ° hybrid circuit 2 to obtain two mutually orthogonal carrier wave signals (sin signal, cos signal), and these carrier wave signals are used to mutually orthogonalize. The point that frequency conversion is performed on the two quadrature amplitude signals I and Q to perform quadrature amplitude modulation is the same as in the first embodiment described above.

Further, since the phase corrector 71 is configured to include the variable capacitor 71a and the like, one carrier signal cos (ωt +) from the 90 ° hybrid circuit 2 is obtained.
The signal cos ωt is corrected by shifting the phase of δ) by −δ.
Is also the same as in the first embodiment described above. Further, 6 is an orthogonality detection circuit (orthogonality error information calculation means).
The orthogonality detection circuit 6 obtains orthogonality error information based on the two carrier signals from the 90 ° hybrid circuit 2, and has a multiplication unit (multiplication unit) 61 and a low-pass filter (low-pass filtering processing unit). 62, the multiplication unit 61 includes the first
Unlike the embodiment, the two output cos ωt from the phase corrector 71
, Cos (ωt + δ). The low-pass filter 62 performs a low-pass filtering process on the multiplication result of the multiplication unit 61 so that the second harmonic of the carrier wave can be cut, and the orthogonality error information sin δ
Is what you get.

Next, the principle of detecting the orthogonality error information sin δ by the orthogonality detection circuit 6 will be described. First, the output of the 90 ° hybrid circuit 2 is sinωt, cos (ωt + δ)
If the error of the orthogonality is δ and these two signals are input to the multiplier 61, sin ωt × cos (ωt + δ) = {sin (2ωt−δ) +
We get an output of sin δ} / 2.

When this signal is passed through a low-pass filter 62 capable of cutting the second harmonic of the carrier wave, the output of the low-pass filter 62 becomes (1/2) sin δ, which results in
It can be seen that the orthogonality error sin δ can be detected. Also in this case, the following correction of orthogonality is performed using the error sin δ. That is, the orthogonality detection circuit 6
The orthogonality error information sin δ from is input to the phase correction means 7 and the capacitance of the capacitor 71a is changed. As a result, the phase corrector 71
Carrier signal cos (ωt + δ) from hybrid circuit 2
Is corrected and the phase is shifted by −δ, and the signal cos ωt is output from the phase corrector 71. As a result, the phase corrector 71 can correct the orthogonality by correcting the carrier signal using the orthogonality error information sin δ from the orthogonality detection circuit 6.
In this case, unlike the first embodiment, the quadrature degree detection circuit 6 constantly outputs sin δ information.

Also in FIG. 4, 5 is obtained by adding the outputs I sin ωt and Q cos ωt of the multipliers 3 and 4 to obtain I s.
It is an adder that obtains inωt + Q cosωt. As described above, in the case of the second embodiment, in the quadrature amplitude modulator, the quadrature degree detection circuit 6 detects the quadrature degree error to directly correct the phase of the carrier wave by the feedforward control. Since the quadrature degree is corrected, the quadrature degree can be accurately maintained on the modulator side regardless of the type and frequency of the 90 ° hybrid circuit 2 as in the first embodiment. is there.

(C) Description of Third Embodiment This third embodiment is an example in which the present invention is applied to the method 2 described above. That is, FIG. 5 is a block diagram showing a quadrature correction device for a quadrature amplitude modulator as a third embodiment of the present invention. First, the quadrature amplitude modulator shown in FIG. An up-conversion unit (frequency conversion unit) 100 having a hybrid circuit 2 and multipliers 3 and 4 is provided. In this up-conversion unit 100, a signal sin ωt from a carrier wave oscillator 1 is passed through a 90 ° hybrid circuit 2. Obtain two carrier signals (sin signal, cos signal) orthogonal to each other, and perform quadrature amplitude modulation by performing frequency conversion on two orthogonal amplitude signals I and Q mutually orthogonal using these carrier signals. The points are the same as those of the first and second embodiments described above.

Further, 6 is an orthogonality detection circuit (orthogonality error information calculation means), which calculates orthogonality error information based on the two carrier signals from the 90 ° hybrid circuit 2. In addition, it is configured by including a multiplication unit (multiplication unit) 61 and a low-pass filter (low-pass filtering processing unit) 62 having the same configuration as the second embodiment.

That is, the multiplication unit 61 is adapted to multiply the two outputs sin ωt and cos (ωt + δ) from the 90 ° hybrid circuit 2, and the low-pass filter 62.
The low-pass filtering process capable of cutting the second harmonic of the carrier wave is performed on the multiplication result of the multiplication unit 61 to obtain the orthogonality error information sin δ. Also,
In the third embodiment, as in the case of the method 2, as shown in FIG. 5, correction coefficient setting devices 72 and 73 for multiplying the Q signal by tan δ and dividing it by cos δ are provided.
The correction coefficient setters 72 and 73 receive the orthogonality error information sin δ from the orthogonality detection circuit 6 and set tan δ and 1 / cos δ corresponding to δ. As a result, these correction coefficient setters 72, 73
Using the orthogonality error information from the orthogonality detection circuit 6,
The quadrature amplitude correction means is configured to add the correction to the quadrature amplitude signal to correct the quadrature.

Reference numeral 8 in the drawing is an adder for adding the I signal and the output Q tan δ from the correction coefficient setting unit 72. Therefore, also in the case of the third embodiment, as shown in FIG. 5, the sine wave signal sin ωt from the carrier wave oscillator 1 is 90 °.
Using two carrier signals (sin signal, cos signal) orthogonal to each other obtained by passing through the hybrid circuit 2, two orthogonal amplitude signals I and Q orthogonal to each other are subjected to frequency conversion to perform quadrature amplitude modulation. In this quadrature amplitude modulation, the quadrature degree error δ is obtained in the same manner as in the above method 1, and then the following processing is performed.

First, in accordance with the orthogonality error information (δ) from the orthogonality detection circuit 6, the correction coefficient setters 72 and 73 set t
Anδ and 1 / cosδ are set. Then, after that, the correction coefficient setter 72 adds Q multiplied by tan δ and the signal I in the adder 8, and the multiplier 3 multiplies the carrier wave sinωt. As a result, (I + Q tan δ) × sin ωt = I sin ωt + Q tanδ s
in ωt.

Further, the correction coefficient setting unit 73 sets the signal Q to cos.
Divide by δ, and then multiply by the other carrier cos (ωt
Multiplying by + δ), (Q / cosδ) × cos (ωt + δ) = Q cosωt−Qt
an δ sin ωt. By adding these by the adder 5, it becomes I sin ωt + Q cos ωt, and the orthogonality error δ can be canceled.

Thus, in the case of the third embodiment, in the quadrature amplitude modulator, the quadrature degree detection circuit 6 detects the quadrature degree error, thereby canceling the quadrature degree error by processing the baseband signal. Since the orthogonality is corrected, the orthogonality can be accurately maintained on the modulator side regardless of the type and frequency of the 90 ° hybrid circuit 2 as in the above-described embodiments.

(D) Description of Fourth Embodiment This fourth embodiment is an example in which the system of the first embodiment is applied to a demodulator. That is, FIG. 6 is a block diagram showing a quadrature amplitude correction apparatus for a quadrature amplitude demodulator as a fourth embodiment of the present invention. First, the quadrature amplitude demodulator shown in FIG. A section (frequency conversion section) 101 and low-pass filters 18 and 19 are provided.

Here, the down conversion section 101 has a carrier wave oscillator 11, a 90 ° hybrid circuit 12, multipliers 13 and 14, and a phase corrector (phase correcting means) 171 as an orthogonality correcting means. As a result, in the down-conversion unit 101, the signal sin ωt from the carrier oscillator 11 is passed through the 90 ° hybrid circuit 12 so that two mutually orthogonal carrier signals (sin signal, cos signal) are obtained.
Signal), using these carrier signals (sin signal, cos signal), the quadrature amplitude modulation signal (I sin ωt + Q cos ωt) branched in the hybrid circuit 10 is subjected to frequency conversion, and further low pass filters 18 and 19 are used. , Low-pass filtering processing can be performed to perform quadrature amplitude demodulation. The carrier wave oscillator 1
Outputs a signal sin ωt based on the instruction of the frequency setting signal.

Further, the phase corrector 171 has one carrier signal cos (ωt +) from the 90 ° hybrid circuit 12.
The signal cos ωt is corrected by shifting the phase of δ) by −δ.
To output the variable capacitor 1
71a etc. are comprised. Further, in the fourth embodiment, as in the first embodiment, the orthogonality detection circuit (orthogonality error information calculation for obtaining orthogonality error information based on two carrier signals from the 90 ° hybrid circuit 12). Means) 16 are provided. That is, the orthogonality detection circuit 16 outputs the output cos ωt from the phase corrector 171.
And the other carrier signal si from the 90 ° hybrid circuit 2
a multiplication unit (multiplication means) 161 for multiplying n ωt,
A low-pass filter (low-pass filtering processing means) 162 is provided for performing a low-pass filtering process capable of cutting the second harmonic of the carrier wave on the multiplication result of the multiplication unit 161 to obtain orthogonality error information sin δ. .

The principle of detection of the orthogonality error information sin δ by the orthogonality detection circuit 16 is similar to the principle of detection of the orthogonality error information sin δ by the orthogonality detection circuit 6 of the first embodiment described above. Is omitted. Then, the orthogonality error information sin δ from the orthogonality detection circuit 16 is the phase correction means 1.
71 is fed back to the capacitor 17 and the capacitor 17
The capacity of 1a is changed. As a result, the phase corrector 17
1, the carrier signal co from the 90 ° hybrid circuit 12
Phase correction is performed on s (ωt + δ), and the phase is corrected by shifting by −δ, and the signal cos ωt is corrected by the phase corrector 171.
Is output from. In this way, the error-free signal cos ω
When t is output from the phase corrector 171, the output of the orthogonality detection circuit 16 becomes zero. Even after that, the orthogonality detection circuit 1
Negative feedback control is performed so that the output of 6 becomes 0. As a result, the phase corrector 171 is operated by the orthogonality detection circuit 16
It means that the orthogonality error is corrected by adding the correction to the carrier signal using the orthogonality error information sin δ.

That is, the fourth embodiment is also the same as the first embodiment.
In the same manner as in the embodiment, one of the inputs of the orthogonality detection circuit 16 is used as the output of the phase corrector 171, thereby performing feedback control on the phase of the carrier wave. Thus, in the case of the fourth embodiment, in the quadrature amplitude demodulator, the quadrature degree detection circuit 16 detects the quadrature degree error, so that the phase of the carrier wave is directly corrected by the feedback control, and the quadrature is corrected. Since the degree is corrected, the orthogonality can be accurately maintained on the demodulator side regardless of the type and frequency of the 90 ° hybrid circuit 12.

(E) Description of Fifth Embodiment In the fifth embodiment, in the fourth embodiment described above, one of the inputs of the orthogonality detection circuit 16 is not the output of the phase corrector 171 but the 90 ° hybrid circuit 12. In this way, the quadrature amplitude demodulator performs feedforward control on the phase of the carrier wave.

That is, FIG. 7 is a block diagram showing a quadrature amplitude correction apparatus for a quadrature amplitude demodulator as a fifth embodiment of the present invention. First, the quadrature amplitude demodulator shown in FIG. , A 90 ° hybrid circuit 12, multipliers 13 and 14, and a down converter (frequency converter) 101 having a phase corrector (phase corrector) 171 as an orthogonality corrector, a hybrid circuit 10, a low-pass filter 18, It has nineteen. As a result, in the down-converting unit 101, the signal sin ωt from the carrier oscillator 11 is passed through the 90 ° hybrid circuit 12 so that two carrier signals (sin signal, sin signal,
cos signal) to obtain these carrier signals (sin signal, co
s signal), frequency conversion is performed on the quadrature amplitude modulation signal (I sin ωt + Q cos ωt) branched by the hybrid circuit 10, and low pass filtering processing is further performed by the low pass filters 18 and 19 to perform quadrature amplitude demodulation. This is the same as in the fourth embodiment described above.

Further, since the phase corrector 171 is configured to include the variable capacitor 171a and the like, 90 °
One carrier signal cos (ω from the hybrid circuit 12
The signal cos is corrected by correcting the phase of (t + δ) by −δ.
The point that ωt can be output is also the same as in the fourth embodiment.
Further, the orthogonality detection circuit (orthogonality error information calculation means) 16 according to the present embodiment is a 90 ° hybrid circuit 12
The orthogonality error information is obtained on the basis of the two carrier signals from, and is configured by including a multiplication unit (multiplication unit) 161 and a low-pass filter (low-pass filtering processing unit) 162. Unlike the above-described fourth embodiment, the two outputs co from the phase corrector 171
s ωt and cos (ωt + δ) are multiplied together. It should be noted that the low-pass filter 162 includes the multiplication unit 161.
Orthogonal error information by applying low-pass filtering processing that can cut the second harmonic of the carrier wave
to get sin δ. Therefore, it can be said that the fifth embodiment is an example in which the system of the second embodiment is applied to the demodulator.

The principle of detection of the orthogonality error information sin δ by the orthogonality detection circuit 16 is the same as the principle of detection of the orthogonality error information sin δ by the orthogonality detection circuit 6 of the second embodiment described above. Is omitted. And also in this case,
The orthogonality error information sin δ from the orthogonality detection circuit 6 is input to the phase corrector 171, and the capacitance of the capacitor 171a is changed.
Carrier signal cos (ωt from 0 ° hybrid circuit 12
+ Δ) is phase-corrected and the phase is shifted by −δ, and the signal cos ωt is output from the phase corrector 171. As a result, the phase corrector 171 can correct the orthogonality by correcting the carrier signal using the orthogonality error information sin δ from the orthogonality detection circuit 16. In this case, unlike the above-described fourth embodiment, the sin δ information is constantly output from the orthogonality detection circuit 16.

Thus, in the case of the fifth embodiment, in the quadrature amplitude demodulator, the quadrature degree detection circuit 16
By detecting the error of the quadrature, the phase of the carrier wave is directly corrected by the feedforward control to correct the quadrature.
It is possible to accurately maintain the orthogonality on the demodulator side, regardless of the type and frequency.

(F) Description of Sixth Embodiment This sixth embodiment is an example in which the system of the third embodiment described above is applied to a demodulator. That is, FIG. 8 is a block diagram showing a quadrature amplitude correction apparatus for a quadrature amplitude demodulator as a sixth embodiment of the present invention. First, the quadrature amplitude demodulator shown in FIG. Hybrid circuit 12,
In addition to the down conversion unit (frequency conversion unit) 101 having the multipliers 13 and 14, the hybrid circuit 10 and the low pass filters 18 and 19 are provided. This allows
In the down-conversion unit 101, two signals orthogonal to each other (sin signal, cos signal) are obtained by passing the signal sin ωt from the carrier oscillator 11 through the 90 ° hybrid circuit 12, and these carrier signals (sin Signal, cos signal), frequency conversion is applied to the quadrature amplitude modulation signal (I sin ωt + Q cos ωt) branched by the hybrid circuit 10, and the low pass filters 18 and 19 are further applied.
The point that the quadrature amplitude demodulation can be performed by performing the low-pass filtering process is the same as the above-described fourth and fifth embodiments.

Further, 16 is an orthogonality detecting circuit (orthogonality error information calculating means), and the orthogonality detecting circuit 16 is 90
The orthogonality error information is obtained based on the two carrier signals from the hybrid circuit 12, and the multiplication unit (multiplication unit) 161 and the low-pass filter (low-pass filtering processing unit) 162 have the same configuration as the fifth embodiment.
It is configured with.

That is, the multiplication unit 161 outputs two outputs from the 90 ° hybrid circuit 12 sin ωt, cos (ωt +
δ) are multiplied by each other, and the low-pass filter 162 performs a low-pass filtering process capable of cutting the double wave of the carrier wave on the multiplication result in the multiplication unit 161, so as to obtain the orthogonality error information sin δ. Has become.

In the sixth embodiment, as shown in FIG. 8, a correction coefficient setting unit 172 that multiplies the output of the low pass filter 18 by tan δ and a correction coefficient setting unit 173 that divides the output of the low pass filter 19 by cos δ. It is provided. Then, these correction coefficient setters 172, 173
However, it receives the orthogonality error information sin δ from the orthogonality detection circuit 16 and sets tan δ and 1 / cos δ according to δ. As a result, these correction coefficient setting devices 1
72 and 173 form an orthogonality correction means for correcting the orthogonality by correcting the orthogonal amplitude signal using the orthogonality error information from the orthogonality detection circuit 16.

Reference numeral 20 in the figure is a correction coefficient setting unit 1
It is an adder that adds the output signal of 72 and the output from the correction coefficient setting unit 173. Therefore, also in the case of the sixth embodiment, as shown in FIG. 8, two mutually orthogonal carrier wave signals (obtained by passing the sine wave signal sin ωt from the carrier wave oscillator 11 through the 90 ° hybrid circuit 12 ( sin
Signal, cos signal), the quadrature amplitude modulation signal (I sin ωt + Q cos ωt) branched by the hybrid circuit 10 is used.
Frequency conversion to the low pass filters 18 and 19
Then, the low-pass filtering process is performed to perform the quadrature amplitude demodulation. In this quadrature amplitude demodulation, the quadrature error δ is obtained in the same manner as in the above fourth and fifth embodiments, and then the following process is performed.

When the modulated wave is expressed as (I sin ωt + Q cos ωt), the output of the multiplier 13 on the I channel side is (I sin ωt + Q cos ωt) × sin ωt = I / 2 (1-cos2ωt) + Q / 2 sin2ωt, and The output of the multiplier 14 on the Q channel side is (I sinωt + Q cosωt) × cos (ωt + δ) = (I sinωt + Q cosωt) × (cosδ cosωt−s
in δ sin ωt) = I cos δ sin ωt cos ωt-I sin δ sin ² ωt + Q
cos δ cos ² ωt-Q sin δ cos ωt sin ωt = (I / 2) cos δ sin2 ωt- (I / 2) sin δ (1
− Cos2ωt) + (Q / 2) cosδ (1 + cos2ωt)
-(Q / 2) sinδ sin2ωt.

After that, when passing through the low-pass filters 18 and 19, I / 2 becomes I / 2 on the I channel side and − (I / 2) sin δ + (Q / 2) cos δ on the Q channel side. Then, the correction coefficient setter 172 multiplies the output on the I channel side by tan δ, and the correction coefficient setter 173
The output of the low-pass filter 19 on the Q channel side by cos δ
The output on the Q channel side as follows can be obtained by adding the value divided by and the adder 20.

(I / 2) tan δ + cos δ {-(I / 2)
sin δ + (Q / 2) cos δ} = (I / 2) tan δ− (I / 2) tan δ + Q / 2 = Q / 2 In this way, it can be seen that the orthogonality error δ can be canceled. The correction coefficient setters 172, 17 are provided according to the orthogonality error information (δ) from the orthogonality detection circuit 16.
Needless to say, tan δ and 1 / cos δ are set in 3.

Thus, in the case of the sixth embodiment, in the quadrature amplitude demodulator, the quadrature degree detection circuit 16 detects the quadrature degree error, thereby canceling the quadrature degree error by processing the baseband signal. Since the orthogonality is corrected, the orthogonality can be accurately maintained on the demodulator side regardless of the type and frequency of the 90 ° hybrid circuit 12.

(G) Others Although the phase corrector used in the above-mentioned embodiment is configured to include the variable capacitor 171a and the like, other than that, a combination of a memory and the like and an arithmetic unit is used. Then, the phase corrector can be configured.

[0065]

As described in detail above, according to the quadrature amplitude correction device and the quadrature amplitude correction device of the present invention (claims 1 and 5), the quadrature amplitude modulator and the quadrature amplitude demodulator can be used. , 90 ° hybrid circuit, the orthogonality error information calculating means for obtaining orthogonality error information based on the two carrier signals, and the orthogonality error information from the orthogonality error information calculating means are used to generate the carrier signal or the orthogonal amplitude. Since it is provided with the orthogonality correction means for correcting the signal to correct the orthogonality, there is an advantage that the orthogonality can be accurately maintained on the modulator and demodulator side.

Further, according to the quadrature amplitude modulator and the quadrature amplitude demodulator of the present invention, the quadrature correction device (claims 2 and 6),
The orthogonality correction means is configured as a phase correction means for correcting the phase of one carrier signal from the 90 ° hybrid circuit, and the orthogonality error information calculation means outputs the output from the phase correction means and the orthogonality error information calculation means. The multiplication means for multiplying the other carrier signal from the 90 ° hybrid circuit and the low-pass filtering processing means for performing the low-pass filtering processing on the multiplication result by the multiplication means to obtain the orthogonality error information are configured. Since the phase correcting means is configured to perform phase correction on one carrier signal from the 90 ° hybrid circuit using the orthogonality error information from the orthogonality error information calculating means, the phase of the carrier signal There is an advantage that the orthogonality can be accurately maintained on the modulator and demodulator side by executing the correction by the feedback control.

Further, according to the quadrature correction device for the quadrature amplitude modulator and the quadrature amplitude demodulator of the present invention (claims 3 and 7), the quadrature correction means is one carrier from the 90 ° hybrid circuit. Concerning the phase correction means for correcting the phase of the signal, the orthogonality error information calculation means calculates the multiplication means for multiplying the two carrier signals from the 90 ° hybrid circuit, and the multiplication result by the multiplication means. Low-pass filtering processing means for performing low-pass filtering processing to obtain orthogonality error information, wherein the phase correcting means uses the orthogonality error information from the orthogonality error information calculating means to perform the 90 ° hybrid. Since it is configured to perform phase correction on one carrier signal from the circuit, the carrier signal phase correction is performed by feedforward control. Run, modulator, demodulator side, there is an advantage that it is possible to maintain the orthogonality accurately.

Further, according to the quadrature amplitude correction device and the quadrature amplitude correction device for quadrature amplitude demodulator of the present invention (claims 4 and 8),
The orthogonality correction means is configured as means for adding correction relating to orthogonality error information to the orthogonal amplitude signal (or the orthogonal amplitude demodulation signal), and the orthogonality error information computing means is
It comprises a multiplication means for multiplying two carrier signals from the 90 ° hybrid circuit, and a low-pass filtering processing means for performing low-pass filtering processing on the multiplication result by the multiplication means to obtain orthogonality error information. Since the quadrature correction means is configured to correct the quadrature amplitude signal (or the quadrature amplitude demodulation signal) using the quadrature difference error information from the quadrature difference error information calculating means, the modulation is similarly performed. There is an advantage that the orthogonality can be accurately maintained on the side of the transmitter and the demodulator.

[Brief description of drawings]

FIG. 1 is a principle block diagram of a first invention.

FIG. 2 is a principle block diagram of a second invention.

FIG. 3 is a block diagram showing a first embodiment of the present invention.

FIG. 4 is a block diagram showing a second embodiment of the present invention.

FIG. 5 is a block diagram showing a third embodiment of the present invention.

FIG. 6 is a block diagram showing a fourth embodiment of the present invention.

FIG. 7 is a block diagram showing a fifth embodiment of the present invention.

FIG. 8 is a block diagram showing a sixth embodiment of the present invention.

FIG. 9 is a block diagram showing a conventional example.

FIG. 10 is a block diagram showing a conventional example.

FIG. 11 is a diagram showing orthogonality error characteristics.

[Explanation of symbols]

DESCRIPTION OF SYMBOLS 1 carrier wave oscillator 2 90 degree hybrid circuit 3,4 multiplier 5 adder 6 orthogonality detection circuit (orthogonality error information calculation means) 7 orthogonality correction means 8 adder 10 hybrid circuit 11 carrier oscillator 12 90 degree hybrid circuit 13, 14 Multiplier 16 Orthogonality detection circuit (Orthogonality error information calculation means) 17 Orthogonality correction means 18, 19 Low-pass filtering processing means 20 Adder 61 Multiplier (multiplication means) 62 Low-pass filter (low-pass filtering processing means) 71 Phase correction Device (phase correction means) 71a variable capacitor 72, 73 correction coefficient setting device 100 up-conversion unit 100 down-conversion unit 161 multiplication unit (multiplication unit) 162 low-pass filter (low-pass filtering processing unit) 171 phase correction unit (phase correction unit) 171 Variable capacitor 172, 173 the correction factor setting unit

Claims (8)

[Claims] 1. The signal from the carrier oscillator (1) is 90 °.
A quadrature amplitude modulator that performs quadrature amplitude modulation by performing frequency conversion on two quadrature amplitude signals that are mutually orthogonal using two carrier signals that are mutually orthogonal obtained by passing through the hybrid circuit (2), An orthogonality error information calculating means (6) for obtaining orthogonality error information based on two carrier signals from the 90 ° hybrid circuit (2), and an orthogonality error information from the orthogonality error information calculating means (6). And a quadrature amplitude signal for correcting the quadrature amplitude signal, and a quadrature degree correcting means (7) for correcting the quadrature degree. . 2. The orthogonality correction means (7) is configured as a phase correction means for correcting the phase of one carrier signal from the 90 ° hybrid circuit (2), and the orthogonality error information calculation means. (6) Multiplying means for multiplying the output from the phase correcting means and the other carrier signal from the 90 ° hybrid circuit (2), and the result of multiplication by the multiplying means is subjected to low-pass filtering processing and orthogonalized. And a 90 ° hybrid circuit (2) using the orthogonality error information from the orthogonality error information calculating means (6). 2. The quadrature amplitude correction apparatus for a quadrature amplitude modulator according to claim 1, wherein the quadrature amplitude correction apparatus is configured to perform phase correction on one of the carrier signals. 3. The orthogonality correction means (7) is configured as a phase correction means for correcting the phase of one carrier signal from the 90 ° hybrid circuit (2), and the orthogonality error information calculation means. (6) is multiplication means for multiplying two carrier signals from the 90 ° hybrid circuit (2), and low-pass filtering processing means for low-pass filtering the multiplication result in the multiplication means to obtain orthogonality error information. The phase correcting means uses the orthogonality error information from the orthogonality error information calculating means (6) to correct the phase of one carrier signal from the 90 ° hybrid circuit (2). The quadrature amplitude correction apparatus for a quadrature amplitude modulator according to claim 1, characterized in that 4. The orthogonality correction means (7) is configured as means for adding correction regarding orthogonality error information to the orthogonal amplitude signal, and the orthogonality error information calculating means (6) is the 90 ° hybrid. It comprises a multiplication means for multiplying two carrier signals from the circuit (2), and a low-pass filtering processing means for low-pass filtering the multiplication result of the multiplication means to obtain orthogonality error information. The degree correction means (7) is configured to correct the quadrature amplitude signal using the quadrature degree error information from the quadrature degree error information calculating means (6). Quadrature amplitude modulator quadrature correction device. 5. The signal from the carrier oscillator (11) is equal to 90.
° Quadrature amplitude demodulation for performing quadrature amplitude demodulation by performing frequency conversion on the quadrature amplitude modulation signal using two carrier signals that are orthogonal to each other and obtained by passing through the hybrid circuit (12), and further performing low-pass filtering processing. And a quadrature from the quadrature error information calculation means (16) for obtaining quadrature error information based on the two carrier signals from the 90 ° hybrid circuit (12). Of the quadrature amplitude demodulator, characterized in that the quadrature amplitude demodulator comprises a quadrature degree correcting means (17) for correcting the quadrature degree by correcting the carrier wave signal or the quadrature amplitude demodulation signal using the degree error information. Orthogonality correction device. 6. The orthogonality correction means (17) comprises the 90 °
It is configured as a phase correction means for correcting the phase of one carrier signal from the hybrid circuit (12), and the orthogonality error information calculation means (16) outputs the output from the phase correction means and the 90 ° hybrid circuit. And a low-pass filtering processing means for performing low-pass filtering processing on the multiplication result of the multiplication means to obtain orthogonality error information, and the phase correction means , The orthogonality error information calculation means (16)
6. The quadrature amplitude demodulator according to claim 5, wherein the quadrature amplitude demodulator is configured to perform phase correction on one carrier signal from the 90 ° hybrid circuit (12) using the quadrature error information from Orthogonality correction device. 7. The orthogonality correction means (17) comprises the 90 °
The orthogonality error information calculation means (16) is configured as a phase correction means for correcting the phase of one carrier signal from the hybrid circuit (12), and the orthogonality error information calculation means (16) is provided with two carrier waves from the 90 ° hybrid circuit (12). The phase correction means includes a multiplication means for multiplying the signals, and a low-pass filtering processing means for performing low-pass filtering processing on the multiplication result in the multiplication means to obtain the orthogonality error information, and the phase correction means includes the orthogonality error information. Computing means (16)
6. The quadrature amplitude demodulator according to claim 5, wherein the quadrature amplitude demodulator is configured to perform phase correction on one carrier signal from the 90 ° hybrid circuit (12) using the quadrature error information from Orthogonality correction device. 8. The orthogonality correction means (17) is configured as means for adding correction relating to orthogonality error information to the quadrature amplitude demodulated signal, and the orthogonality error information calculation means (16) is provided for the 90 °. And a multiplication means for multiplying the two carrier signals from the hybrid circuit (12), and a low-pass filtering processing means for performing low-pass filtering processing on the multiplication result by the multiplication means to obtain orthogonality error information. The orthogonality correction means (17) is configured to correct the orthogonal amplitude demodulation signal using the orthogonality error information from the orthogonality error information calculating means (16). 5. A quadrature correction device for a quadrature amplitude demodulator according to 5.