JPH07211934A - Semiconductor light emitting element array and its manufacture - Google Patents

Abstract

PURPOSE:To provide a semiconductor light emitting element array which can be improved in luminance and density by making the micro fabrication of its upper surface easier. CONSTITUTION:A reflecting layer 3, n-type clad layer 4, active layer 5, and p-type clad layer 6 are successively formed on a substrate 2 and a plurality of light emitting sections 7 arranged in a row are formed of etched grooves 8 having a narrower depth than the opening. Layers 9 are grown in the grooves 8 and a passivation film 11 is formed on the layers 9. Electrodes 10 are provided above the light emitting sections 7 and another electrode 13 is provided on the lower surface of the substrate 2. In addition, wiring electrodes 12 connected to the sections 7 are formed on the passivation film 11.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor light emitting device, and more particularly to a semiconductor light emitting device array having a flat upper surface and a method for manufacturing the same.

[0002]

2. Description of the Related Art In recent years, a light emitting diode array in which semiconductor light emitting elements are integrated at high density has been developed as a light source for an optical printer or an information processing element using light. As a method of integrating light emitting devices, a pn heterojunction structure or a double heterostructure formed on a substrate is used.
A method of etching away the necessary part to make a mesa structure,
Further, there is a method of separating each light emitting dot by diffusion of impurities. As a light emitting material, for example, a homojunction obtained by diffusing impurities in GaAsP or an AlGaAs double heterojunction which can be expected to have higher brightness is used. The specifications required for these semiconductor light emitting element arrays include high density and high brightness. However, as the density increases, the light emitting area of each dot naturally becomes small and high brightness is obtained. Things will be difficult.

[0003]

By the way, in a homojunction light-emitting diode array in which light-emitting portions are separated by impurity diffusion, dots are separated by performing impurity diffusion on a flat crystal plane to form a so-called planar structure. Therefore, fine processing on a flat surface is possible. However, in order to integrate the light emitting elements at a high density, the distance between the light emitting elements needs to be at least 20 μm or less. To achieve this distance, the diffusion depth is controlled to about 10 μm or less.
There is a problem that it is difficult to achieve this with good reproducibility in the conventional diffusion process. There is also a problem that the carrier injection efficiency is low and the emission brightness is relatively low.

On the other hand, the two light-emitting parts separated by etching
MOCVD for heavy heterojunction light emitting diode arrays
Method and MBE method can control the film thickness to perform fine etching, carrier injection efficiency is very high, and AlGaAs or the like with high differential quantum efficiency can be used as a material, which significantly improves the brightness. Can be expected. However, since a groove is formed by etching, it is necessary to overcome the step and perform pattern wiring, and it is extremely difficult to obtain a fine pattern with good reproducibility.

In order to solve the above problems, it is an object of the present invention to provide a semiconductor light emitting device array which facilitates fine processing on the upper surface and realizes high brightness and high density.

[0006]

A semiconductor light emitting device array according to the present invention comprises a p-n epitaxial layer grown on a substrate.
In a semiconductor light emitting device array in which a bonding surface is separated into a plurality of light emitting portions by etching grooves, an etching groove in which all side surfaces of the etching groove are forward tapered is formed and an epitaxial growth layer is formed by filling the etching groove. Then, an electrode is formed on the light emitting portion, a passivation film that transmits light is formed on the upper surface of the epitaxial growth layer and the upper surface of the epitaxial layer excluding the electrode to planarize the upper surface, and a metal wiring is connected to the electrode to By forming it on the passivation film, the above-mentioned object is achieved.

Further, in the method for manufacturing a semiconductor light emitting device array as described above, the etching groove having a forward tapered surface on all sides is formed by using a sulfuric acid / phosphoric acid mixed etchant, and the etching groove is completely formed. By embedding and epitaxially growing the epitaxial growth layer, the above-mentioned object is achieved.

[0008]

1 is a sectional view showing the structure of a light emitting diode array which is an embodiment of a semiconductor light emitting element array of the present invention. FIG. 2 is a sectional view perpendicular to the section of FIG. 1 and taken along the line AA. FIG. 3 is a diagram showing a manufacturing process of a light emitting diode of an embodiment of a method for manufacturing a semiconductor light emitting device array of the present invention. 1 and 2, the light emitting diode array 1 is shown.
Is a reflective layer 3, an n-type clad layer 4, an active layer 5, and a p-type clad layer 6 are stacked on the substrate 2, and the light emitting portion 7 is embedded and grown on the etching groove 8 by a buried growth layer 9.
Are electrically separated by. An electrode 10 is formed on the upper portion of the light emitting portion 7, a passivation film 11 is formed on the upper surfaces of the cladding layer 6 and the buried growth layer 9, and a wiring electrode 12 is formed on the upper surface of the passivation film 11 so as to be connected to the electrode 10. An electrode 13 is formed on the lower surface of the substrate.

The manufacturing process of the light emitting diode array 1 will be described below. First, in FIG. 3A, n-type G
On the aAs substrate 2, the multilayer reflective layer 3, the n-type AlGaAs cladding layer 4, the p-type AlGaAs active layer 5, and the p-type AlGa are formed.
The As clad layer 6 is sequentially laminated.

Next, in FIG. 1B, a photolithography process is performed and etching is performed using SiN or SiO ₂ as an etching mask 14 to separate into a plurality of light emitting portions 7 arranged in a line in the array direction. Here, the multilayer reflective layer 3 is composed of a multilayer semiconductor crystal layer, and reflects the light emitted from the active layer 5 to the substrate 2 side to eliminate the absorption of the light by the substrate 2 and take it out. Further, the etchant used is, for example, a H ₃ P0 ₄ / H ₂ S0 ₄ / H ₂ 0 ₂ system, so that etching is performed with a forward taper for all plane orientations, and all side surfaces are forward tapered. The etching groove 8 is formed.

Next, in FIG. 3C, the above-mentioned etching mask 14 is used as it is as an epi mask, and M
N is formed by the OCVD method so as to fill the etching groove 8.
Type AlGaAs is epitaxially grown to form a buried growth layer 9. Here, since all the side surfaces of the etching groove 8 are forward tapered, the buried growth layer 9 is grown substantially uniformly and flatly.

Thereafter, as shown in FIG.
By peeling off the upper surface of the p-type cladding layer 6 and the buried growth layer 9
A passivation film 11 of an oxide film or a nitride film is formed on the entire upper surface by a vapor phase growth method or the like, a hole is formed in the upper portion of the light emitting portion 7, and an electrode 10 is formed by a vapor deposition method or the like. Further, the electrode 13 is formed on the lower surface of the substrate and the wiring electrode 12 is formed on the upper surface of the passivation film 11 by connecting to the electrode 10 on the light emitting portion 7.

As described above, according to the light emitting diode array 1, the light emitting portion 7 is formed by the double hetero structure having high light emitting efficiency, has high brightness, and the etching groove 8 for separating the light emitting portion 7 is embedded. Since the embedded growth layer 9 is formed, the passivation film 11 is formed on the entire upper surface, and the upper surface is planarized, fine processing on the upper surface such as pattern wiring can be facilitated. Further, if fine processing is facilitated, the light emitting portions 7 can be integrated with higher density.

Further, compared with a semiconductor layer other than the semiconductor layer, for example, in which the etching groove is filled, it can be manufactured more consistently in the crystal growth process, and the thermal expansion coefficient is the same as that of other semiconductor layers. Therefore, there are effects such as improvement in yield and improvement in reliability.

Further, according to the method for manufacturing the light emitting diode array 1, since the H ₃ P0 ₄ / H ₂ S0 ₄ / H ₂ 0 ₂ system etchant is used, etching is performed with a forward taper for all plane orientations. It is possible to form the etching groove 8 in which all side surfaces are forward tapered. Therefore, the buried growth layer 9 can be grown well.

[0016]

As described above, according to the semiconductor light emitting device array of the present invention, the light emitting portion is formed by the double hetero structure having high light emitting efficiency, and the buried growth layer is formed so as to fill the etching groove for separating the light emitting portion. Is formed, and
Since the passivation film is formed on the upper surface of the buried growth layer and the upper surface is flattened, fine processing on the upper surface can be facilitated, and high brightness and high density can be realized.

Further, according to the method for manufacturing a semiconductor light emitting element array of the present invention, since the sulfuric acid / phosphoric acid mixed etchant is used, etching is performed with a forward taper for all plane orientations, and all side surfaces have a forward taper. Etching grooves can be formed. Therefore, the buried growth layer can be grown well.

[Brief description of drawings]

FIG. 1 is a cross-sectional view showing a structure of a light emitting diode array which is an embodiment of a semiconductor light emitting element array of the present invention.

FIG. 2 is a cross-sectional view perpendicular to the cross section of FIG. 1 and passing through line AA.

FIG. 3 is a diagram showing a manufacturing process of a light emitting diode array which is an embodiment of the semiconductor light emitting device array of the present invention.

[Explanation of symbols]

 1 Light Emitting Diode Array 2 Substrate 5 Active Layer 7 Light Emitting Section 8 Etching Groove 9 Buried Growth Layer 10 Electrode 11 Passivation Film 12 Wiring Electrode 13 Electrode 14 Mask

Claims (2)

[Claims] 1. A p-type epitaxial layer grown on a substrate.
In a semiconductor light emitting device array in which an n-junction surface is separated into a plurality of light emitting portions by etching grooves, etching grooves are formed in which all side surfaces of the etching grooves are forward tapered, and the etching grooves are filled to form an epitaxial growth layer. Forming an electrode on the light emitting portion, forming a passivation film that transmits light on the upper surface of the epitaxial growth layer and the upper surface of the epitaxial layer excluding the electrode to planarize the upper surface, and connect the metal wiring to the electrode. A semiconductor light emitting device array formed on the passivation film. 2. The method for manufacturing a semiconductor light emitting device array according to claim 1, wherein the etching groove having a forward tapered surface on all sides is formed by using a sulfuric acid / phosphoric acid mixed etchant. A method for manufacturing a semiconductor light emitting device array, characterized in that the epitaxial growth layer is epitaxially grown by embedding in the substrate.